}
}
+/**
+ * Reset the verticies ids of this and subsequent stages.
+ */
+void draw_reset_tmps( struct draw_stage *stage )
+{
+ unsigned i;
+
+ if (stage->tmp)
+ for (i = 0; i < stage->nr_tmps; i++)
+ stage->tmp[i]->vertex_id = UNDEFINED_VERTEX_ID;
+}
+
void draw_free_tmps( struct draw_stage *stage )
{
if (stage->tmp) {
}
}
+
boolean draw_use_sse(struct draw_context *draw)
{
return (boolean) draw->use_sse;
}
+void draw_reset_vertex_ids(struct draw_context *draw)
+{
+ struct draw_stage *stage = draw->pipeline.first;
+
+ while (stage) {
+ if (stage->reset_tmps)
+ stage->reset_tmps(stage);
+ else
+ draw_reset_tmps(stage);
+ stage = stage->next;
+ }
+
+ draw_vertex_cache_reset_vertex_ids(draw);
+}
void (*end)( struct draw_stage * );
+ /**
+ * Reset temporary vertices ids in this stage
+ *
+ * draw_free_tmps will be called instead if null.
+ */
+ void (*reset_tmps)( struct draw_stage * );
+
void (*reset_stipple_counter)( struct draw_stage * );
};
extern void draw_free_tmps( struct draw_stage *stage );
+extern void draw_reset_tmps( struct draw_stage *stage );
extern void draw_alloc_tmps( struct draw_stage *stage, unsigned nr );
+extern void draw_reset_vertex_ids( struct draw_context *draw );
+
extern int draw_vertex_cache_check_space( struct draw_context *draw,
unsigned nr_verts );
break;
case PIPE_PRIM_LINES:
hwprim = PRIM3D_LINELIST;
+ assert(nr % 2 == 0);
break;
case PIPE_PRIM_TRIANGLES:
hwprim = PRIM3D_TRILIST;
+ assert(nr % 3 == 0);
break;
default:
assert(0);
* issues uploading vertices if the hardware wants to flush when
* we flush.
*/
- draw_vertex_cache_reset_vertex_ids( vbuf->i915->draw );
+ draw_reset_vertex_ids( vbuf->i915->draw );
}
/* FIXME: handle failure */
* issues uploading vertices if the hardware wants to flush when
* we flush.
*/
- draw_vertex_cache_reset_vertex_ids( vbuf->draw_context );
+ draw_reset_vertex_ids( vbuf->draw_context );
}
stage->tri = vbuf_first_tri;