intel_bo_unreference(hw3d->kernel.bo);
hw3d->kernel.bo = intel_winsys_alloc_buffer(hw3d->cp->winsys,
- "kernel bo", new_size, 0);
+ "kernel bo", new_size, INTEL_DOMAIN_CPU);
if (!hw3d->kernel.bo) {
ilo_err("failed to allocate kernel bo\n");
return false;
p->invalidate_flags = ILO_3D_PIPELINE_INVALIDATE_ALL;
p->workaround_bo = intel_winsys_alloc_buffer(p->cp->winsys,
- "PIPE_CONTROL workaround", 4096, 0);
+ "PIPE_CONTROL workaround", 4096, INTEL_DOMAIN_INSTRUCTION);
if (!p->workaround_bo) {
ilo_warn("failed to allocate PIPE_CONTROL workaround bo\n");
FREE(p);
* won't point at the same address, which is needed for jmpbuf
*/
bo = intel_winsys_alloc_buffer(cp->winsys,
- "batch buffer", cp->bo_size * 4, 0);
+ "batch buffer", cp->bo_size * 4, INTEL_DOMAIN_CPU);
if (unlikely(!bo)) {
/* reuse the old one */
bo = cp->bo;
if (q->bo)
intel_bo_unreference(q->bo);
- q->bo = intel_winsys_alloc_buffer(winsys, name, size, 0);
+ q->bo = intel_winsys_alloc_buffer(winsys,
+ name, size, INTEL_DOMAIN_INSTRUCTION);
q->reg_total = (q->bo) ? reg_total : 0;
}
&tiling, &pitch);
}
else {
+ const uint32_t initial_domain =
+ (tex->base.bind & (PIPE_BIND_DEPTH_STENCIL |
+ PIPE_BIND_RENDER_TARGET)) ?
+ INTEL_DOMAIN_RENDER : 0;
+
bo = intel_winsys_alloc_texture(is->winsys, name,
tex->bo_width, tex->bo_height, tex->bo_cpp,
- tex->tiling, tex->bo_flags, &pitch);
+ tex->tiling, initial_domain, &pitch);
tiling = tex->tiling;
}
tex->hiz.bo = intel_winsys_alloc_texture(is->winsys,
"hiz texture", hz_width, hz_height, 1,
- INTEL_TILING_Y, INTEL_ALLOC_FOR_RENDER, &pitch);
+ INTEL_TILING_Y, INTEL_DOMAIN_RENDER, &pitch);
if (!tex->hiz.bo)
return false;
tex->imported = (handle != NULL);
- if (tex->base.bind & (PIPE_BIND_DEPTH_STENCIL |
- PIPE_BIND_RENDER_TARGET))
- tex->bo_flags |= INTEL_ALLOC_FOR_RENDER;
-
tex_layout_init(&layout, screen, templ, tex->slices);
switch (templ->target) {
static bool
buf_create_bo(struct ilo_buffer *buf)
{
+ const uint32_t initial_domain =
+ (buf->base.bind & PIPE_BIND_STREAM_OUTPUT) ?
+ INTEL_DOMAIN_RENDER : 0;
struct ilo_screen *is = ilo_screen(buf->base.screen);
const char *name;
struct intel_bo *bo;
}
bo = intel_winsys_alloc_buffer(is->winsys,
- name, buf->bo_size, buf->bo_flags);
+ name, buf->bo_size, initial_domain);
if (!bo)
return false;
pipe_reference_init(&buf->base.reference, 1);
buf->bo_size = templ->width0;
- buf->bo_flags = 0;
/*
* From the Sandy Bridge PRM, volume 1 part 1, page 118:
struct intel_bo *bo;
unsigned bo_size;
- unsigned bo_flags;
};
/**
struct pipe_resource base;
bool imported;
- unsigned bo_flags;
enum pipe_format bo_format;
struct intel_bo *bo;
intel_winsys_alloc_buffer(struct intel_winsys *winsys,
const char *name,
unsigned long size,
- unsigned long flags)
+ uint32_t initial_domain)
{
+ const bool for_render =
+ (initial_domain & (INTEL_DOMAIN_RENDER | INTEL_DOMAIN_INSTRUCTION));
const int alignment = 4096; /* always page-aligned */
drm_intel_bo *bo;
- if (flags == INTEL_ALLOC_FOR_RENDER) {
+ if (for_render) {
bo = drm_intel_bo_alloc_for_render(winsys->bufmgr,
name, size, alignment);
}
else {
- assert(!flags);
bo = drm_intel_bo_alloc(winsys->bufmgr, name, size, alignment);
}
const char *name,
int width, int height, int cpp,
enum intel_tiling_mode tiling,
- unsigned long flags,
+ uint32_t initial_domain,
unsigned long *pitch)
{
+ const unsigned long flags =
+ (initial_domain & (INTEL_DOMAIN_RENDER | INTEL_DOMAIN_INSTRUCTION)) ?
+ BO_ALLOC_FOR_RENDER : 0;
uint32_t real_tiling = tiling;
drm_intel_bo *bo;
INTEL_TILING_Y = 2,
};
-/* this is compatible with intel_bufmgr.h's definitions */
-enum intel_alloc_flag {
- INTEL_ALLOC_FOR_RENDER = 1 << 0,
-};
-
struct winsys_handle;
struct intel_winsys;
struct intel_context;
*
* \param name Informative description of the bo.
* \param size Size of the bo.
- * \param flags bitmask of enum intel_alloc_flag.
+ * \param initial_domain Initial (write) domain.
*/
struct intel_bo *
intel_winsys_alloc_buffer(struct intel_winsys *winsys,
const char *name,
unsigned long size,
- unsigned long flags);
+ uint32_t initial_domain);
/**
* Allocate a 2-dimentional buffer object.
* \param height Height of the bo.
* \param cpp Bytes per texel.
* \param tiling Tiling mode.
- * \param flags bitmask of enum intel_alloc_flag.
+ * \param initial_domain Initial (write) domain.
* \param pitch Pitch of the bo.
*/
struct intel_bo *
const char *name,
int width, int height, int cpp,
enum intel_tiling_mode tiling,
- unsigned long flags,
+ uint32_t initial_domain,
unsigned long *pitch);
/**