tpc = (texMatEnabled | rmesa->TexGenEnabled);
- fprintf(stderr,"setting tpc to %x %x\n", tpc, rmesa->TexGenEnabled);
-
/* TCL_TEX_COMPUTED_x is TCL_TEX_INPUT_x | 0x8 */
vs &= ~((RADEON_TCL_TEX_COMPUTED_TEX_0 << RADEON_TCL_TEX_0_OUTPUT_SHIFT) |
(RADEON_TCL_TEX_COMPUTED_TEX_0 << RADEON_TCL_TEX_1_OUTPUT_SHIFT) |
radeonTexObj *t = radeon_tex_obj(texObj);
int ret;
- fprintf(stderr,"t dirty %d %x %d\n", unit, t->dirty_state, t->validated);
-
if (!radeon_validate_texture_miptree(ctx, texObj))
return GL_FALSE;
RADEON_STATECHANGE( rmesa, tcl );
rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_ST_BIT(unit);
- fprintf(stderr,"setting pp cntl to %x\n", rmesa->hw.ctx.cmd[CTX_PP_CNTL]);
rmesa->recheck_texgen[unit] = GL_TRUE;
if (t->dirty_state & (1<<unit)) {