static inline FloatRegIndex
FLOATREG_STACK(int index, int top)
{
- return (FloatRegIndex)(NUM_FLOATREGS + ((top - index + 8) % 8));
+ return (FloatRegIndex)(NUM_FLOATREGS + ((top + index + 8) % 8));
}
};
return;
}
fpindex -= NumMMXRegs;
- if(fpindex < NumXMMRegs) {
+ if(fpindex < NumXMMRegs * 2) {
ccprintf(os, "%%xmm%d_%s", fpindex / 2,
(fpindex % 2) ? "high": "low");
return;
}
- fpindex -= NumXMMRegs;
- ccprintf(os, "%%ufp%d", fpindex);
+ fpindex -= NumXMMRegs * 2;
+ if(fpindex < NumMicroFpRegs) {
+ ccprintf(os, "%%ufp%d", fpindex);
+ return;
+ }
+ fpindex -= NumMicroFpRegs;
+ ccprintf(os, "%%st(%d)", fpindex);
} else {
switch (reg - Ctrl_Base_DepTag) {
default:
microcode = '''
def macroop FLD_M {
ldfp ufp1, seg, sib, disp
- movfp st(1), ufp1, spm=-1
+ movfp st(-1), ufp1, spm=-1
};
def macroop FLD_P {
rdip t7
ldfp ufp1, seg, riprel, disp
- movfp st(1), ufp1, spm=-1
+ movfp st(-1), ufp1, spm=-1
};
def macroop FST_M {
assembler.symbols["label"] = labeler
def stack_index(index):
- return "(NUM_FLOATREGS + (%s))" % index
+ return "(NUM_FLOATREGS + (((%s) + 8) %% 8))" % index
assembler.symbols["st"] = stack_index
//mmx/x87 registers
8 +
//xmm registers
- 16 +
+ 16 * 2 +
+ //The microcode fp registers
+ 8 +
//The indices that are mapped over the fp stack
8
};
int X86ISA::flattenFloatIndex(ThreadContext * tc, int reg)
{
- if (reg > NUM_FLOATREGS) {
+ if (reg >= NUM_FLOATREGS) {
int top = tc->readMiscRegNoEffect(MISCREG_X87_TOP);
reg = FLOATREG_STACK(reg - NUM_FLOATREGS, top);
}