iris: Disable a PIPE_CONTROL workaround on Icelake

diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 12741c7a899dd484e1f637efa9e552519dd25e50..86975e279e120dfbf3ee446f9e2a9098e0398e7e 100644 (file)
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -4776,7 +4776,7 @@ iris_emit_raw_pipe_control(struct iris_batch *batch, uint32_t flags,
     * We do these now because they may add post-sync operations or CS stalls.
     */
 
-   if (flags & PIPE_CONTROL_VF_CACHE_INVALIDATE) {
+   if (GEN_GEN < 11 && flags & PIPE_CONTROL_VF_CACHE_INVALIDATE) {
       /* Project: BDW, SKL+ (stopping at CNL) / Argument: VF Invalidate
        *
        * "'Post Sync Operation' must be enabled to 'Write Immediate Data' or