+2015-10-02 Renlin Li <renlin.li@arm.com>
+
+ * reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry.
+ * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
+ BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC.
+ * libbfd.h: Regenerate.
+ * bfd-in2.h: Likewise
+
2015-10-02 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c (aarch64_reloc_got_type): Add
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */
BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC,
+/* AArch64 TLS General Dynamic relocation. */
+ BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC,
+
/* AArch64 TLS General Dynamic relocation. */
BFD_RELOC_AARCH64_TLSGD_MOVW_G1,
((R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_ADR_PREL21 \
+ || (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSGD_MOVW_G1 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 \
|| (R_TYPE) == BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC \
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
+ /* Lower 16 bits of GOT offset to tls_index. */
+ HOWTO64 (AARCH64_R (TLSGD_MOVW_G0_NC), /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ AARCH64_R_STR (TLSGD_MOVW_G0_NC), /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
/* Higher 16 bits of GOT offset to tls_index. */
HOWTO64 (AARCH64_R (TLSGD_MOVW_G1), /* type */
16, /* rightshift */
"BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21",
"BFD_RELOC_AARCH64_TLSGD_ADR_PREL21",
"BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC",
+ "BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC",
"BFD_RELOC_AARCH64_TLSGD_MOVW_G1",
"BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1",
"BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC",
Unsigned 12 bit byte offset to global offset table entry for a symbols
tls_index structure. Used in conjunction with
BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
+ENUM
+ BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC
+ENUMDOC
+ AArch64 TLS General Dynamic relocation.
ENUM
BFD_RELOC_AARCH64_TLSGD_MOVW_G1
ENUMDOC
+2015-10-02 Renlin Li <renlin.li@arm.com>
+
+ * config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc.
+ (process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
+ (md_apply_fix): Likewise.
+ (aarch64_force_relocation): Likewise.
+
2015-10-02 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1.
0,
0},
+ /* Lower 16 bits address/value: MOVk. */
+ {"tlsgd_g0_nc", 0,
+ 0, /* adr_type */
+ 0,
+ BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC,
+ 0,
+ 0,
+ 0},
+
/* Most significant bits 16-31 of address/value: MOVZ. */
{"tlsgd_g1", 0,
0, /* adr_type */
case BFD_RELOC_AARCH64_MOVW_G0_NC:
case BFD_RELOC_AARCH64_MOVW_G0_S:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
+ case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
+ case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
+ case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
+2015-10-02 Renlin Li <renlin.li@arm.com>
+
+ * gas/aarch64/reloc-tlsgd_g0_nc.d: New.
+ * gas/aarch64/reloc-tlsgd_g0_nc.s: New.
+
2015-10-02 Renlin Li <renlin.li@arm.com>
* gas/aarch64/reloc-tlsgd_g1.s: New.
--- /dev/null
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+ 0: f280001c movk x28, #0x0
+ 0: R_AARCH64_TLSGD_MOVW_G0_NC var
--- /dev/null
+func:
+
+ // R_AARCH64_TLSGD_MOVW_G0_NC var
+ movk x28, #:tlsgd_g0_nc:var