+2005-09-08 Paul Brook <paul@codesourcery.com>
+
+ * reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC.
+ * bfd-in2.h: Regenerate.
+ * libbfd.h: Regenerate.
+
2005-09-06 H.J. Lu <hongjiu.lu@intel.com>
PR ld/1301
BFD_RELOC_ARM_T32_IMM12,
BFD_RELOC_ARM_T32_ADD_PC12,
BFD_RELOC_ARM_SHIFT_IMM,
- BFD_RELOC_ARM_SMI,
+ BFD_RELOC_ARM_SMC,
BFD_RELOC_ARM_SWI,
BFD_RELOC_ARM_MULTI,
BFD_RELOC_ARM_CP_OFF_IMM,
"BFD_RELOC_ARM_T32_IMM12",
"BFD_RELOC_ARM_T32_ADD_PC12",
"BFD_RELOC_ARM_SHIFT_IMM",
- "BFD_RELOC_ARM_SMI",
+ "BFD_RELOC_ARM_SMC",
"BFD_RELOC_ARM_SWI",
"BFD_RELOC_ARM_MULTI",
"BFD_RELOC_ARM_CP_OFF_IMM",
ENUMX
BFD_RELOC_ARM_SHIFT_IMM
ENUMX
- BFD_RELOC_ARM_SMI
+ BFD_RELOC_ARM_SMC
ENUMX
BFD_RELOC_ARM_SWI
ENUMX
+2005-09-08 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (do_smi, do_t_smi): Rename ...
+ (do_smc, do_t_smc): ... to this.
+ (insns): Remane smi to smc.
+ (md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to
+ BFD_RELOC_ARM_SMC.
+
2005-09-07 Richard Henderson <rth@redhat.com>
* dwarf2dbg.c (dwarf2_where): Set line->isa.
}
static void
-do_smi (void)
+do_smc (void)
{
- inst.reloc.type = BFD_RELOC_ARM_SMI;
+ inst.reloc.type = BFD_RELOC_ARM_SMC;
inst.reloc.pc_rel = 0;
}
}
static void
-do_t_smi (void)
+do_t_smc (void)
{
unsigned int value = inst.reloc.exp.X_add_number;
constraint (inst.reloc.exp.X_op != O_constant,
#undef ARM_VARIANT
#define ARM_VARIANT ARM_EXT_V6Z
- TCE(smi, 1600070, f7f08000, 1, (EXPi), smi, t_smi),
+ TCE(smc, 1600070, f7f08000, 1, (EXPi), smc, t_smc),
#undef ARM_VARIANT
#define ARM_VARIANT ARM_EXT_V6T2
md_number_to_chars (buf+2, (valueT) (newval & 0xffff), THUMB_SIZE);
break;
- case BFD_RELOC_ARM_SMI:
+ case BFD_RELOC_ARM_SMC:
if (((unsigned long) value) > 0xffff)
as_bad_where (fixP->fx_file, fixP->fx_line,
- _("invalid smi expression"));
+ _("invalid smc expression"));
newval = md_chars_to_number (buf, INSN_SIZE);
newval |= (value & 0xf) | ((value & 0xfff0) << 4);
md_number_to_chars (buf, newval, INSN_SIZE);
case BFD_RELOC_NONE: type = "NONE"; break;
case BFD_RELOC_ARM_OFFSET_IMM8: type = "OFFSET_IMM8"; break;
case BFD_RELOC_ARM_SHIFT_IMM: type = "SHIFT_IMM"; break;
- case BFD_RELOC_ARM_SMI: type = "SMI"; break;
+ case BFD_RELOC_ARM_SMC: type = "SMC"; break;
case BFD_RELOC_ARM_SWI: type = "SWI"; break;
case BFD_RELOC_ARM_MULTI: type = "MULTI"; break;
case BFD_RELOC_ARM_CP_OFF_IMM: type = "CP_OFF_IMM"; break;
+2005-09-08 Paul Brook <paul@codesourcery.com>
+
+ * gas/arm/arch6zk.d: Rename smi to smc.
+ * gas/arm/arch6zk.s: Ditto.
+ * gas/arm/thumb32.d: Ditto.
+ * gas/arm/thumb32.s: Ditto.
+
2005-09-07 Richard Henderson <rth@redhat.com>
* gas/lns/lns-common-1.d: Don't match header or special opcode numbers.
2005-09-07 Richard Henderson <rth@redhat.com>
* gas/mips/mips16-dwarf2.d: Don't match anything but address and line
- number increments. Adjust relocation address.
+ number increments. Adjust relocation address.
* gas/mips/mips16-dwarf2-n32.d: Likewise. Add "N32" to test name.
2005-09-07 Richard Henderson <rth@redhat.com>
0+040 <[^>]*> e320f002 ? wfe
0+044 <[^>]*> e320f003 ? wfi
0+048 <[^>]*> e320f001 ? yield
-0+04c <[^>]*> e16ec371 ? smi 60465
-0+050 <[^>]*> 11613c7e ? smine 5070
+0+04c <[^>]*> e16ec371 ? smc 60465
+0+050 <[^>]*> 11613c7e ? smcne 5070
0+054 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
0+058 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
0+05c <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\)
wfi
yield
# ARMV6Z instructions
- smi 0xec31
- smine 0x13ce
+ smc 0xec31
+ smcne 0x13ce
# Add three nop instructions to ensure that the
# output is 32-byte aligned as required for arm-aout.
0[0-9a-f]+ <[^>]+> fa60 f009 ror\.w r0, r0, r9
0[0-9a-f]+ <[^>]+> fa60 f005 ror\.w r0, r0, r5
0[0-9a-f]+ <[^>]+> fa71 f002 rors\.w r0, r1, r2
-0[0-9a-f]+ <[^>]+> f7f0 8000 smi #0 ; 0x0
-0[0-9a-f]+ <[^>]+> f7fd 8bca smi #43981 ; 0xabcd
+0[0-9a-f]+ <[^>]+> f7f0 8000 smc #0 ; 0x0
+0[0-9a-f]+ <[^>]+> f7fd 8bca smc #43981 ; 0xabcd
0[0-9a-f]+ <[^>]+> fb10 0000 smlabb r0, r0, r0, r0
0[0-9a-f]+ <[^>]+> fb10 0900 smlabb r9, r0, r0, r0
0[0-9a-f]+ <[^>]+> fb19 0000 smlabb r0, r9, r0, r0
.purgem sh
-smi:
- smi #0
- smi #0xabcd
+smc:
+ smc #0
+ smc #0xabcd
smla:
smlabb r0, r0, r0, r0
+2005-09-08 Paul Brook <paul@codesourcery.com>
+
+ * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
+
2005-09-06 Chao-ying Fu <fu@mips.com>
* mips-opc.c (MT32): New define.
{ARM_EXT_V6T2, 0x07a00050, 0x0fa00070, "%22?usbfx%c\t%12-15r, %0-3r, #%7-11d, #%16-20W"},
/* ARM V6Z instructions. */
- {ARM_EXT_V6Z, 0x01600070, 0x0ff000f0, "smi%c\t%e"},
+ {ARM_EXT_V6Z, 0x01600070, 0x0ff000f0, "smc%c\t%e"},
/* ARM V6K instructions. */
{ARM_EXT_V6K, 0xf57ff01f, 0xffffffff, "clrex"},
{ARM_EXT_V6T2, 0xfbe00000, 0xfff000f0, "umlal\t%12-15r, %8-11r, %16-19r, %0-3r"},
{ARM_EXT_V6T2, 0xfbe00060, 0xfff000f0, "umaal\t%12-15r, %8-11r, %16-19r, %0-3r"},
{ARM_EXT_V6T2, 0xe8500f00, 0xfff00f00, "ldrex\t%12-15r, [%16-19r, #%0-7W]"},
- {ARM_EXT_V6T2, 0xf7f08000, 0xfff0f000, "smi\t%K"},
+ {ARM_EXT_V6T2, 0xf7f08000, 0xfff0f000, "smc\t%K"},
{ARM_EXT_V6T2, 0xf04f0000, 0xfbef8000, "mov%20's.w\t%8-11r, %M"},
{ARM_EXT_V6T2, 0xf06f0000, 0xfbef8000, "mvn%20's.w\t%8-11r, %M"},
{ARM_EXT_V6T2, 0xf810f000, 0xff70f000, "pld\t%a"},