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remove unnecessary ref
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Mon, 20 Jun 2022 13:53:06 +0000
(14:53 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Mon, 20 Jun 2022 13:53:06 +0000
(14:53 +0100)
svp64-primer/summary.tex
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diff --git
a/svp64-primer/summary.tex
b/svp64-primer/summary.tex
index 91da580f395dbbe404690da32b7bd5f9ce9831a9..f9fd1eca68408e94aa8f1c754483dc56d86da948 100644
(file)
--- a/
svp64-primer/summary.tex
+++ b/
svp64-primer/summary.tex
@@
-161,7
+161,7
@@
Main design principles
Vectorisation "context" rather than adding new opcodes.
\item Does not modify or deviate from the underlying scalar
Power ISA unless there's a significant performance boost or other
- advantage in the vector space
(see \ref{subsubsec:add_to_pow_isa})
+ advantage in the vector space
\item Aimed at Supercomputing: avoids creating significant
\textit{sequential dependency hazards}, allowing \textbf{high
performance multi-issue superscalar microarchitectures} to be