The target worked example will be not to simply put this into an FPGA but to put together a 130nm ASIC under the Google Skywater Open PDK ASIC Programme, as a proof-of-concept Gigabit Router chip capable of securely handling network traffic and, having the underlying cryptographic primitives in place, being the basis of peer networking and blockchain applications which can be trusted with thode tasks by its full HDL and source code being publicly available for independent review.
-Ultimately we want a demonstration ASIC of a tamper-proof auditable hardware implementation which can be trusted by end-users.
+Ultimately we want a demonstration ASIC of an independently-auditable hardware implementation which can be trusted by end-users.
# Have you been involved with projects or organisations relevant to this project before? And if so, can you tell us a bit about your contributions?