12 + /* flush_vgt_streamout */
num_bufs * 11; /* STRMOUT_BUFFER_UPDATE, BUFFER_SIZE */
- begin->num_dw = 12 + /* flush_vgt_streamout */
- 3; /* VGT_STRMOUT_BUFFER_CONFIG */
+ begin->num_dw = 12; /* flush_vgt_streamout */
if (rctx->chip_class >= SI) {
begin->num_dw += num_bufs * 4; /* SET_CONTEXT_REG */
r600_flush_vgt_streamout(rctx);
- r600_write_context_reg(cs, rctx->chip_class >= EVERGREEN ?
- R_028B98_VGT_STRMOUT_BUFFER_CONFIG :
- R_028B20_VGT_STRMOUT_BUFFER_EN,
- rctx->streamout.enabled_mask);
-
for (i = 0; i < rctx->streamout.num_targets; i++) {
if (!t[i])
continue;
static void r600_emit_streamout_enable(struct r600_common_context *rctx,
struct r600_atom *atom)
{
+ r600_write_context_reg(rctx->rings.gfx.cs,
+ rctx->chip_class >= EVERGREEN ?
+ R_028B98_VGT_STRMOUT_BUFFER_CONFIG :
+ R_028B20_VGT_STRMOUT_BUFFER_EN,
+ rctx->streamout.hw_enabled_mask);
+
r600_write_context_reg(rctx->rings.gfx.cs,
rctx->chip_class >= EVERGREEN ?
R_028B94_VGT_STRMOUT_CONFIG :
static void r600_set_streamout_enable(struct r600_common_context *rctx, bool enable)
{
bool old_strmout_en = r600_get_strmout_en(rctx);
+ unsigned old_hw_enabled_mask = rctx->streamout.hw_enabled_mask;
rctx->streamout.streamout_enabled = enable;
- if (old_strmout_en != r600_get_strmout_en(rctx))
+ rctx->streamout.hw_enabled_mask = rctx->streamout.enabled_mask;
+ if ((old_strmout_en != r600_get_strmout_en(rctx)) ||
+ (old_hw_enabled_mask != rctx->streamout.hw_enabled_mask))
rctx->streamout.enable_atom.dirty = true;
}
rctx->b.stream_output_target_destroy = r600_so_target_destroy;
rctx->streamout.begin_atom.emit = r600_emit_streamout_begin;
rctx->streamout.enable_atom.emit = r600_emit_streamout_enable;
- rctx->streamout.enable_atom.num_dw = 3;
+ rctx->streamout.enable_atom.num_dw = 6;
}