+2018-05-23 Alexander Monakov <amonakov@ispras.ru>
+
+ PR rtl-optimization/79985
+ * df-scan.c (df_insn_refs_collect): Remove special case for
+ global registers and asm statements.
+
2018-05-23 Alexander Monakov <amonakov@ispras.ru>
* extend.texi (Global Register Variables): Rewrite the bullet list.
if (CALL_P (insn_info->insn))
df_get_call_refs (collection_rec, bb, insn_info, flags);
- if (asm_noperands (PATTERN (insn_info->insn)) >= 0)
- for (unsigned i = 0; i < FIRST_PSEUDO_REGISTER; i++)
- if (global_regs[i])
- {
- /* As with calls, asm statements reference all global regs. */
- df_ref_record (DF_REF_BASE, collection_rec, regno_reg_rtx[i],
- NULL, bb, insn_info, DF_REF_REG_USE, flags);
- df_ref_record (DF_REF_BASE, collection_rec, regno_reg_rtx[i],
- NULL, bb, insn_info, DF_REF_REG_DEF, flags);
- }
-
/* Record other defs. These should be mostly for DF_REF_REGULAR, so
that a qsort on the defs is unnecessary in most cases. */
df_defs_record (collection_rec,
+2018-05-23 Alexander Monakov <amonakov@ispras.ru>
+
+ * gcc.dg/pr79985.c: New testcase.
+
2018-05-23 Richard Biener <rguenther@suse.de>
* gcc.dg/tree-ssa/ssa-fre-66.c: New testcase.
--- /dev/null
+/* PR rtl-optimization/79985 */
+/* { dg-do compile { target powerpc*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O3 -fschedule-insns -fselective-scheduling" } */
+
+long a;
+int b;
+void
+c ()
+{
+ __asm("" : "=r"(a) : "0"(c));
+ __asm("" : "=r"(b));
+}