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diff --git a/openpower/sv.mdwn b/openpower/sv.mdwn
index 4272e05f4a0efd477d34fb2f634807d2869d0dc3..7514e09010ab3aceade0dabc3f38bbdffb0b939d 100644 (file)
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@@ -8,9 +8,11 @@
 
 SV is designed as a Vector ISA for Hybrid 3D CPU GPU VPU workloads.
 As such it brings features normally only found in Cray Supercomputers
-and GPUs, but keeps strictly to a *Simple* principle of leveraging
+(Cray-1, NEC SX-Aurora)
+and in GPUs, but keeps strictly to a *Simple* principle of leveraging
 a *Scalar* ISA, exclisively using "Prefixing". **Not one single actual
 explicit Vector opcode exists in SV, at all**.
+
 Fundamental design principles:
 
 * Simplicity of introduction and implementation on the existing OpenPOWER ISA