radv/gfx10: implement radv_emit_tess_factor_ring()
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Tue, 25 Jun 2019 09:32:53 +0000 (11:32 +0200)
committerBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Sun, 7 Jul 2019 15:03:38 +0000 (17:03 +0200)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/amd/vulkan/radv_device.c

index 8810e995f107985c09cfcdaf7306219476bd58bf..5248814c92b6d1e9eedfed06d22279fb81a1f0b2 100644 (file)
@@ -2386,7 +2386,11 @@ radv_emit_tess_factor_ring(struct radv_queue *queue, struct radeon_cmdbuf *cs,
                                       S_030938_SIZE(tf_ring_size / 4));
                radeon_set_uconfig_reg(cs, R_030940_VGT_TF_MEMORY_BASE,
                                       tf_va >> 8);
-               if (queue->device->physical_device->rad_info.chip_class >= GFX9) {
+
+               if (queue->device->physical_device->rad_info.chip_class >= GFX10) {
+                       radeon_set_uconfig_reg(cs, R_030984_VGT_TF_MEMORY_BASE_HI_UMD,
+                                              S_030984_BASE_HI(tf_va >> 40));
+               } else if (queue->device->physical_device->rad_info.chip_class == GFX9) {
                        radeon_set_uconfig_reg(cs, R_030944_VGT_TF_MEMORY_BASE_HI,
                                               S_030944_BASE_HI(tf_va >> 40));
                }