Presumably, this comment exists to justify the usage of
I915_GEM_DOMAIN_SAMPLER for this relocation. At one point, this was
necessary to ensure that the right flushing was done to keep caches
coherent. These days, the kernel just flushes everything, so I don't
think it matters.
Still, the comment is interesting, so leave it in place.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
surf[4] = 0;
surf[5] = 0;
- /* Emit relocation to surface contents. Section 5.1.1 of the gen4
- * bspec ("Data Cache") says that the data cache does not exist as
- * a separate cache and is just the sampler cache.
+ /* Emit relocation to surface contents. The 965 PRM, Volume 4, section
+ * 5.1.2 "Data Cache" says: "the data cache does not exist as a separate
+ * physical cache. It is mapped in hardware to the sampler cache."
*/
drm_intel_bo_emit_reloc(brw->batch.bo,
*out_offset + 4,