vc4: Add support for enabling early Z discards.

This is the same basic logic from the original Broadcom driver.

diff --git a/src/gallium/drivers/vc4/vc4_state.c b/src/gallium/drivers/vc4/vc4_state.c
index 630ac4dc04fa3955681ffea3e9a7fb430dc27e1e..332f310824166bfd878114e04f7d7b6fd734e1a1 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_state.c
+++ b/src/gallium/drivers/vc4/vc4_state.c
@@ -186,12 +186,30 @@ vc4_create_depth_stencil_alpha_state(struct pipe_context *pctx,
 
         so->base = *cso;
 
+        /* We always keep the early Z state correct, since a later state using
+         * early Z may want it.
+         */
+        so->config_bits[2] |= VC4_CONFIG_BITS_EARLY_Z_UPDATE;
+
         if (cso->depth.enabled) {
                 if (cso->depth.writemask) {
                         so->config_bits[1] |= VC4_CONFIG_BITS_Z_UPDATE;
                 }
                 so->config_bits[1] |= (cso->depth.func <<
                                        VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT);
+
+                /* We only handle early Z in the < direction because otherwise
+                 * we'd have to runtime guess which direction to set in the
+                 * render config.
+                 */
+                if ((cso->depth.func == PIPE_FUNC_LESS ||
+                     cso->depth.func == PIPE_FUNC_LEQUAL) &&
+                    (!cso->stencil[0].enabled ||
+                     (cso->stencil[0].zfail_op == PIPE_STENCIL_OP_KEEP &&
+                      (!cso->stencil[1].enabled ||
+                       cso->stencil[1].zfail_op == PIPE_STENCIL_OP_KEEP)))) {
+                        so->config_bits[2] |= VC4_CONFIG_BITS_EARLY_Z;
+                }
         } else {
                 so->config_bits[1] |= (PIPE_FUNC_ALWAYS <<
                                        VC4_CONFIG_BITS_DEPTH_FUNC_SHIFT);