Use new NaN discipline

diff --git a/softfloat/f32_to_i32.c b/softfloat/f32_to_i32.c
index 98c67c9febd61ac9a254047f6765b622eb3e7780..bbbaee04b326d801b8746bfff27f13c3c049ddab 100755 (executable)
--- a/softfloat/f32_to_i32.c
+++ b/softfloat/f32_to_i32.c
@@ -21,6 +21,7 @@ int_fast32_t f32_to_i32( float32_t a, int_fast8_t roundingMode, bool exact )
     sign = signF32UI( uiA );\r
     exp = expF32UI( uiA );\r
     sig = fracF32UI( uiA );\r
+    if ( ( exp == 0xFF ) && sig ) sign = 0;\r
     if ( exp ) sig |= 0x00800000;\r
     sig64 = (uint_fast64_t) sig<<32;\r
     shiftCount = 0xAF - exp;\r

diff --git a/softfloat/f32_to_i64.c b/softfloat/f32_to_i64.c
index 34f877f5525e7f4086d46e8662d114d3fc699d12..c0b89811b9e74f0fe3c5f8cf9950d10ab1de3657 100755 (executable)
--- a/softfloat/f32_to_i64.c
+++ b/softfloat/f32_to_i64.c
@@ -25,7 +25,7 @@ int_fast64_t f32_to_i64( float32_t a, int_fast8_t roundingMode, bool exact )
     shiftCount = 0xBE - exp;\r
     if ( shiftCount < 0 ) {\r
         softfloat_raiseFlags( softfloat_flag_invalid );\r
-        if ( ! sign ) {\r
+        if ( ! sign || ( ( exp == 0xFF ) && sig ) ) {\r
             return INT64_C( 0x7FFFFFFFFFFFFFFF );\r
         }\r
         return - INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;\r

diff --git a/softfloat/f64_to_i32.c b/softfloat/f64_to_i32.c
index 8259ee2854247546a5917291b3f88e0709727c73..0778a8616775bca0fe0238fb039287c69a0aba89 100755 (executable)
--- a/softfloat/f64_to_i32.c
+++ b/softfloat/f64_to_i32.c
@@ -20,6 +20,7 @@ int_fast32_t f64_to_i32( float64_t a, int_fast8_t roundingMode, bool exact )
     sign = signF64UI( uiA );\r
     exp = expF64UI( uiA );\r
     sig = fracF64UI( uiA );\r
+    if ( ( exp == 0x7FF ) && sig ) sign = 0;\r
     if ( exp ) sig |= UINT64_C( 0x0010000000000000 );\r
     shiftCount = 0x42C - exp;\r
     if ( 0 < shiftCount ) sig = softfloat_shift64RightJam( sig, shiftCount );\r

diff --git a/softfloat/f64_to_i64.c b/softfloat/f64_to_i64.c
index 0e6ddcde58d4d063ce30f7b8b5ff9bb72bf2e165..676e944dd6ceb48ada3d224be07ea9281db25976 100755 (executable)
--- a/softfloat/f64_to_i64.c
+++ b/softfloat/f64_to_i64.c
@@ -28,6 +28,8 @@ int_fast64_t f64_to_i64( float64_t a, int_fast8_t roundingMode, bool exact )
             softfloat_raiseFlags( softfloat_flag_invalid );\r
             return\r
                 ! sign\r
+                    || ( ( exp == 0x7FF )\r
+                             && fracF64UI( uiA ) )\r
                     ? INT64_C( 0x7FFFFFFFFFFFFFFF )\r
                     : - INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;\r
         }\r

diff --git a/softfloat/specialize.h b/softfloat/specialize.h
index 1793c4675796e9b5695e3fe783276aa733d40459..72a9f1690fd8d0d44bf380328c8a5a7cf2ff5d98 100755 (executable)
--- a/softfloat/specialize.h
+++ b/softfloat/specialize.h
@@ -50,7 +50,7 @@ struct commonNaN {
 /*----------------------------------------------------------------------------\r
 | The pattern for a default generated single-precision NaN.\r
 *----------------------------------------------------------------------------*/\r
-#define defaultNaNF32UI 0xFFFFFFFF\r
+#define defaultNaNF32UI 0x7FC00000\r
 \r
 /*----------------------------------------------------------------------------\r
 | Returns 1 if the single-precision floating-point value `a' is a signaling\r
@@ -83,7 +83,7 @@ uint_fast32_t softfloat_propagateNaNF32UI( uint_fast32_t, uint_fast32_t );
 /*----------------------------------------------------------------------------\r
 | The pattern for a default generated double-precision NaN.\r
 *----------------------------------------------------------------------------*/\r
-#define defaultNaNF64UI UINT64_C(0xFFFFFFFFFFFFFFFF)\r
+#define defaultNaNF64UI UINT64_C(0x7FF8000000000000)\r
 \r
 /*----------------------------------------------------------------------------\r
 *----------------------------------------------------------------------------*/\r