freedreno/a3xx: disable early-z when we have kill's
authorRob Clark <robclark@freedesktop.org>
Sat, 18 Oct 2014 20:52:44 +0000 (16:52 -0400)
committerRob Clark <robclark@freedesktop.org>
Tue, 21 Oct 2014 01:42:44 +0000 (21:42 -0400)
Signed-off-by: Rob Clark <robclark@freedesktop.org>
src/gallium/drivers/freedreno/a3xx/fd3_emit.c
src/gallium/drivers/freedreno/ir3/ir3_compiler.c
src/gallium/drivers/freedreno/ir3/ir3_shader.h

index 8300a554de830e2ed7f81fc3913104a0d24faf71..5bf41b171fa81955a810aaf95f753966278fcd50 100644 (file)
@@ -454,6 +454,9 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                        val |= A3XX_RB_DEPTH_CONTROL_FRAG_WRITES_Z;
                        val |= A3XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
                }
+               if (fp->has_kill) {
+                       val |= A3XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
+               }
                OUT_PKT0(ring, REG_A3XX_RB_DEPTH_CONTROL, 1);
                OUT_RING(ring, val);
        }
index 8c4ec88ccc0b575d76a19e834c31b42545f450f3..dc4f985f4b7f5885325e7c6b0120b0a6c56bb9bd 100644 (file)
@@ -2047,6 +2047,8 @@ trans_kill(const struct instr_translater *t,
        ir3_reg_create(instr, 0, IR3_REG_SSA)->instr = cond;
 
        ctx->kill[ctx->kill_count++] = instr;
+
+       ctx->so->has_kill = true;
 }
 
 /*
@@ -2081,6 +2083,8 @@ trans_killif(const struct instr_translater *t,
 
        ctx->kill[ctx->kill_count++] = instr;
 
+       ctx->so->has_kill = true;
+
 }
 /*
  * I2F / U2F / F2I / F2U
index 628c09e1be3f8b963da086fcd46397bdf20cfde8..a26dab2e8e104d7e7ff50a4db77e5ec63ebbadcb 100644 (file)
@@ -171,6 +171,9 @@ struct ir3_shader_variant {
        /* do we have one or more texture sample instructions: */
        bool has_samp;
 
+       /* do we have kill instructions: */
+       bool has_kill;
+
        /* const reg # of first immediate, ie. 1 == c1
         * (not regid, because TGSI thinks in terms of vec4 registers,
         * not scalar registers)