radeonsi: don't use the SPI barrier management bug workaround
authorMarek Olšák <marek.olsak@amd.com>
Mon, 26 Mar 2018 21:13:31 +0000 (17:13 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 28 Mar 2018 22:45:52 +0000 (18:45 -0400)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
src/gallium/drivers/radeonsi/si_shader.c

index 8ae742c93f6a1a77d3f04d231a480be9fae18976..00ebbb9b0f287848928fa305a4ce0bcbb39e9209 100644 (file)
@@ -7971,6 +7971,11 @@ static bool si_shader_select_ps_parts(struct si_screen *sscreen,
 void si_multiwave_lds_size_workaround(struct si_screen *sscreen,
                                      unsigned *lds_size)
 {
+       /* If tessellation is all offchip and on-chip GS isn't used, this
+        * workaround is not needed.
+        */
+       return;
+
        /* SPI barrier management bug:
         *   Make sure we have at least 4k of LDS in use to avoid the bug.
         *   It applies to workgroup sizes of more than one wavefront.