AArch64 [4/10]

2012-10-23  Ian Bolton  <ian.bolton@arm.com>
	    Jim MacArthur  <jim.macarthur@arm.com>
	    Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
	    Nigel Stephens  <nigel.stephens@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
	    Richard Earnshaw  <rearnsha@arm.com>
	    Sofiane Naci  <sofiane.naci@arm.com>
	    Stephen Thomas  <stephen.thomas@arm.com>
	    Tejas Belagod  <tejas.belagod@arm.com>
	    Yufeng Zhang  <yufeng.zhang@arm.com>

	* lib/target-supports.exp
	(check_profiling_available): Add AArch64.
	(check_effective_target_vect_int): Likewise.
	(check_effective_target_vect_shift): Likewise.
	(check_effective_target_vect_float): Likewise.
	(check_effective_target_vect_double): Likewise.
	(check_effective_target_vect_widen_mult_qi_to_hi): Likewise.
	(check_effective_target_vect_widen_mult_hi_to_si): Likewise.
	(check_effective_target_vect_pack_trunc): Likewise.
	(check_effective_target_vect_unpack): Likewise.
	(check_effective_target_vect_hw_misalign): Likewise.
	(check_effective_target_vect_short_mult): Likewise.
	(check_effective_target_vect_int_mult): Likewise.
	(check_effective_target_vect_stridedN): Likewise.
	(check_effective_target_sync_int_long): Likewise.
	(check_effective_target_sync_char_short): Likewise.
	(check_vect_support_and_set_flags): Likewise.
	(check_effective_target_aarch64_tiny): New.
	(check_effective_target_aarch64_small): New.
	(check_effective_target_aarch64_large): New.
	* g++.dg/other/PR23205.C: Enable aarch64.
	* g++.dg/other/pr23205-2.C: Likewise.
	* g++.old-deja/g++.abi/ptrmem.C: Likewise.
	* gcc.c-torture/execute/20101011-1.c: Likewise.
	* gcc.dg/20020312-2.c: Likewise.
	* gcc.dg/20040813-1.c: Likewise.
	* gcc.dg/builtin-apply2.c: Likewise.
	* gcc.dg/stack-usage-1.c: Likewise.

Co-Authored-By: Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>
From-SVN: r192726

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index add7e49eaf67c6840dc197d6b7234df50fd37548..0779858f6ea293f84f00a618cafc6531adbd2810 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,44 @@
+2012-10-23  Ian Bolton  <ian.bolton@arm.com>
+           Jim MacArthur  <jim.macarthur@arm.com>
+           Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
+           Marcus Shawcroft  <marcus.shawcroft@arm.com>
+           Nigel Stephens  <nigel.stephens@arm.com>
+           Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+           Richard Earnshaw  <rearnsha@arm.com>
+           Sofiane Naci  <sofiane.naci@arm.com>
+           Stephen Thomas  <stephen.thomas@arm.com>
+           Tejas Belagod  <tejas.belagod@arm.com>
+           Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * lib/target-supports.exp
+       (check_profiling_available): Add AArch64.
+       (check_effective_target_vect_int): Likewise.
+       (check_effective_target_vect_shift): Likewise.
+       (check_effective_target_vect_float): Likewise.
+       (check_effective_target_vect_double): Likewise.
+       (check_effective_target_vect_widen_mult_qi_to_hi): Likewise.
+       (check_effective_target_vect_widen_mult_hi_to_si): Likewise.
+       (check_effective_target_vect_pack_trunc): Likewise.
+       (check_effective_target_vect_unpack): Likewise.
+       (check_effective_target_vect_hw_misalign): Likewise.
+       (check_effective_target_vect_short_mult): Likewise.
+       (check_effective_target_vect_int_mult): Likewise.
+       (check_effective_target_vect_stridedN): Likewise.
+       (check_effective_target_sync_int_long): Likewise.
+       (check_effective_target_sync_char_short): Likewise.
+       (check_vect_support_and_set_flags): Likewise.
+       (check_effective_target_aarch64_tiny): New.
+       (check_effective_target_aarch64_small): New.
+       (check_effective_target_aarch64_large): New.
+       * g++.dg/other/PR23205.C: Enable aarch64.
+       * g++.dg/other/pr23205-2.C: Likewise.
+       * g++.old-deja/g++.abi/ptrmem.C: Likewise.
+       * gcc.c-torture/execute/20101011-1.c: Likewise.
+       * gcc.dg/20020312-2.c: Likewise.
+       * gcc.dg/20040813-1.c: Likewise.
+       * gcc.dg/builtin-apply2.c: Likewise.
+       * gcc.dg/stack-usage-1.c: Likewise.
+
 2012-10-23  Ian Bolton  <ian.bolton@arm.com>
            Jim MacArthur  <jim.macarthur@arm.com>
            Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>

diff --git a/gcc/testsuite/g++.dg/abi/aarch64_guard1.C b/gcc/testsuite/g++.dg/abi/aarch64_guard1.C
new file mode 100644 (file)
index 0000000..af82ad2
--- /dev/null
+++ b/gcc/testsuite/g++.dg/abi/aarch64_guard1.C
@@ -0,0 +1,17 @@
+// Check that the initialization guard variable is an 8-byte aligned,
+// 8-byte doubleword and that only the least significant bit is used
+// for initialization guard variables.
+// { dg-do compile { target aarch64*-*-* } }
+// { dg-options "-O -fdump-tree-original" }
+
+int bar();
+
+int *foo ()
+{
+  static int x = bar ();
+  return &x;
+}
+
+// { dg-final { scan-assembler _ZGVZ3foovE1x,8,8 } }
+// { dg-final { scan-tree-dump "_ZGVZ3foovE1x & 1" "original" } }
+// { dg-final { cleanup-tree-dump "original" } }

diff --git a/gcc/testsuite/g++.dg/other/PR23205.C b/gcc/testsuite/g++.dg/other/PR23205.C
index a31fc1d773ddf0b21bdb219be2646c574923d7a5..e55710b40f0a0a69528ca4e27facff742ff2e4ad 100644 (file)
--- a/gcc/testsuite/g++.dg/other/PR23205.C
+++ b/gcc/testsuite/g++.dg/other/PR23205.C
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */
+/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */
 /* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types" } */
 
 const int foobar = 4;

diff --git a/gcc/testsuite/g++.dg/other/pr23205-2.C b/gcc/testsuite/g++.dg/other/pr23205-2.C
index fbd16dfab5836e4f0ceb987cbf42271d3728c63f..607e5a2b4e433a0fec79d3fda4dc265f1f8a39ae 100644 (file)
--- a/gcc/testsuite/g++.dg/other/pr23205-2.C
+++ b/gcc/testsuite/g++.dg/other/pr23205-2.C
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* } { "*" } { "" } } */
+/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* } { "*" } { "" } } */
 /* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types -ftoplevel-reorder" } */
 
 const int foobar = 4;

diff --git a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C
index 077fa50840c978f9c0dda8c0e7071eda514395b5..341735879c59d517edb1fc49edfb78c6e2e01846 100644 (file)
--- a/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C
+++ b/gcc/testsuite/g++.old-deja/g++.abi/ptrmem.C
@@ -7,7 +7,7 @@
    function.  However, some platforms use all bits to encode a
    function pointer.  Such platforms use the lowest bit of the delta,
    that is shifted left by one bit.  */
-#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__
+#if defined __MN10300__ || defined __SH5__ || defined __arm__ || defined __thumb__ || defined __mips__ || defined __aarch64__
 #define ADJUST_PTRFN(func, virt) ((void (*)())(func))
 #define ADJUST_DELTA(delta, virt) (((delta) << 1) + !!(virt))
 #else

diff --git a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c
index b98454e253ef074b6219a83f0f9473f9dbc0188d..76b9f068723994dd3f0543a9a4ece4538cb676de 100644 (file)
--- a/gcc/testsuite/gcc.c-torture/execute/20101011-1.c
+++ b/gcc/testsuite/gcc.c-torture/execute/20101011-1.c
@@ -12,6 +12,10 @@
 #elif defined (__sh__)
   /* On SH division by zero does not trap.  */
 # define DO_TEST 0
+#elif defined (__aarch64__) && !defined(__linux__)
+  /* AArch64 divisions do trap by default, but libgloss targets do not
+     intercept the trap and raise a SIGFPE. So restrict the test to
+     AArch64 systems that use the Linux kernel.  */
 #elif defined (__TMS320C6X__)
   /* On TI C6X division by zero does not trap.  */
 # define DO_TEST 0

diff --git a/gcc/testsuite/gcc.dg/20020312-2.c b/gcc/testsuite/gcc.dg/20020312-2.c
index 768e17e64cda63d12b75f3f40bbddffe4b1b1266..47c2d0fc64895d6ebd0691d49c28d981d29e1b10 100644 (file)
--- a/gcc/testsuite/gcc.dg/20020312-2.c
+++ b/gcc/testsuite/gcc.dg/20020312-2.c
@@ -92,6 +92,8 @@ extern void abort (void);
 # else
 #  define PIC_REG "gr17"
 #endif
+#elif defined (__aarch64__)
+/* No pic register -- yet.  */
 #else
 # error "Modify the test for your target."
 #endif

diff --git a/gcc/testsuite/gcc.dg/20040813-1.c b/gcc/testsuite/gcc.dg/20040813-1.c
index e16344164d59f5a09a7e083669132eaac4c54d7e..c1a9fd0409abf4fee7b47c632c6decb4c8fd6a45 100644 (file)
--- a/gcc/testsuite/gcc.dg/20040813-1.c
+++ b/gcc/testsuite/gcc.dg/20040813-1.c
@@ -2,7 +2,7 @@
 /* Contributed by Devang Patel  <dpatel@apple.com>  */
 
 /* { dg-do compile } */
-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks* } { "*" } { "" } } */
+/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks* } { "*" } { "" } } */
 /* { dg-options "-gstabs" } */
 
 int

diff --git a/gcc/testsuite/gcc.dg/builtin-apply2.c b/gcc/testsuite/gcc.dg/builtin-apply2.c
index 332f3659f983d7f4add421dcd5d2fdb3be02ca5b..9b731470e6cc34d97930af819dee06e89162848d 100644 (file)
--- a/gcc/testsuite/gcc.dg/builtin-apply2.c
+++ b/gcc/testsuite/gcc.dg/builtin-apply2.c
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "avr-*-*" } { "*" } { "" } } */
+/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */
 /* { dg-skip-if "Variadic funcs use Base AAPCS.  Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */
 
 /* PR target/12503 */

diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc/testsuite/gcc.dg/stack-usage-1.c
index d5cf487979f1d655c645e902163cfe75ce5cc469..b6524f9a1255566d70eee6afcd206381867e88ed 100644 (file)
--- a/gcc/testsuite/gcc.dg/stack-usage-1.c
+++ b/gcc/testsuite/gcc.dg/stack-usage-1.c
@@ -7,7 +7,9 @@
    function FOO is reported as 256 or 264 in the stack usage (.su) file.
    Then check that this is the actual stack usage in the assembly file.  */
 
-#if defined(__i386__)
+#if defined(__aarch64__)
+#  define SIZE 256 /* No frame pointer for leaf functions (default) */
+#elif defined(__i386__)
 #  define SIZE 248
 #elif defined(__x86_64__)
 #  ifndef _WIN64

diff --git a/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f b/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f
index 4b518fe9e4d8054b24130f2493067137edc2ea7c..fd731994f369c8ab362ff9e486ed50b35b687be6 100644 (file)
--- a/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f
+++ b/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f
@@ -1,6 +1,6 @@
 C     Test program for common block debugging.  G. Helffrich 11 July 2004.
 C { dg-do compile }
-C { dg-skip-if "No stabs" { mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } { "*" } { "" } }
+C { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } { "*" } { "" } }
 C { dg-skip-if "No stabs" {*-*-* } { "*" } { "-gstabs" } }
       common i,j
       common /label/l,m

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 944143bedc05981be1ab5feef0431026c7cabb63..8520c8f5507640591c1b23707a3f21886f4fdb6b 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -478,6 +478,13 @@ proc check_profiling_available { test_what } {
        return 0
     }
 
+    # We don't yet support profiling for AArch64.
+    if { [istarget aarch64*-*-*]
+        && ([lindex $test_what 1] == "-p"
+            || [lindex $test_what 1] == "-pg") } {
+       return 0
+    }
+
     # cygwin does not support -p.
     if { [istarget *-*-cygwin*] && $test_what == "-p" } {
        return 0
@@ -493,7 +500,8 @@ proc check_profiling_available { test_what } {
     if {![info exists profiling_available_saved]} {
        # Some targets don't have any implementation of __bb_init_func or are
        # missing other needed machinery.
-       if {    [istarget am3*-*-linux*]
+       if {    [istarget aarch64*-*-elf]
+            || [istarget am3*-*-linux*]
             || [istarget arm*-*-eabi*]
             || [istarget arm*-*-elf]
             || [istarget arm*-*-symbianelf*]
@@ -1875,6 +1883,7 @@ proc check_effective_target_vect_int { } {
              || [istarget sparc*-*-*]
              || [istarget alpha*-*-*]
              || [istarget ia64-*-*] 
+             || [istarget aarch64*-*-*]
              || [check_effective_target_arm32]
              || ([istarget mips*-*-*]
                  && [check_effective_target_mips_loongson]) } {
@@ -1995,6 +2004,15 @@ proc check_effective_target_vect_floatuint_cvt { } {
     return $et_vect_floatuint_cvt_saved
 }
 
+# Return 1 if this is a AArch64 target supporting big endian
+proc check_effective_target_aarch64_big_endian { } {
+    return [check_no_compiler_messages aarch64_big_endian assembly {
+       #if !defined(__aarch64__) || !defined(__AARCH64EB__)
+       #error FOO
+       #endif
+    }]
+}
+
 # Return 1 is this is an arm target using 32-bit instructions
 proc check_effective_target_arm32 { } {
     return [check_no_compiler_messages arm32 assembly {
@@ -2739,6 +2757,7 @@ proc check_effective_target_vect_shift { } {
             || [istarget ia64-*-*]
             || [istarget i?86-*-*]
             || [istarget x86_64-*-*]
+            || [istarget aarch64*-*-*]
             || [check_effective_target_arm32]
             || ([istarget mips*-*-*]
                 && [check_effective_target_mips_loongson]) } {
@@ -2808,6 +2827,7 @@ proc check_effective_target_vect_float { } {
              || [istarget mipsisa64*-*-*]
              || [istarget x86_64-*-*]
              || [istarget ia64-*-*]
+             || [istarget aarch64*-*-*]
              || [check_effective_target_arm32] } {
           set et_vect_float_saved 1
        }
@@ -2829,6 +2849,7 @@ proc check_effective_target_vect_double { } {
     } else {
        set et_vect_double_saved 0
        if { [istarget i?86-*-*]
+             || [istarget aarch64*-*-*]
              || [istarget x86_64-*-*] } {
           if { [check_no_compiler_messages vect_double assembly {
                 #ifdef __tune_atom__
@@ -3111,6 +3132,7 @@ proc check_effective_target_vect_widen_mult_qi_to_hi { } {
            set et_vect_widen_mult_qi_to_hi_saved 0
        }
         if { [istarget powerpc*-*-*]
+              || [istarget aarch64*-*-*]
               || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
             set et_vect_widen_mult_qi_to_hi_saved 1
         }
@@ -3143,6 +3165,7 @@ proc check_effective_target_vect_widen_mult_hi_to_si { } {
         if { [istarget powerpc*-*-*]
              || [istarget spu-*-*]
              || [istarget ia64-*-*]
+             || [istarget aarch64*-*-*]
              || [istarget i?86-*-*]
              || [istarget x86_64-*-*]
               || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
@@ -3320,6 +3343,7 @@ proc check_effective_target_vect_pack_trunc { } {
         if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
              || [istarget i?86-*-*]
              || [istarget x86_64-*-*]
+             || [istarget aarch64*-*-*]
              || [istarget spu-*-*]
              || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
                 && [check_effective_target_arm_little_endian]) } {
@@ -3347,6 +3371,7 @@ proc check_effective_target_vect_unpack { } {
              || [istarget x86_64-*-*] 
              || [istarget spu-*-*]
              || [istarget ia64-*-*]
+             || [istarget aarch64*-*-*]
              || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
                 && [check_effective_target_arm_little_endian]) } {
             set et_vect_unpack_saved 1
@@ -3410,6 +3435,7 @@ proc check_effective_target_vect_hw_misalign { } {
     } else {
         set et_vect_hw_misalign_saved 0
        if { ([istarget x86_64-*-*] 
+           || [istarget aarch64*-*-*]
             || [istarget i?86-*-*]) } {
           set et_vect_hw_misalign_saved 1
        }
@@ -3649,6 +3675,7 @@ proc check_effective_target_vect_short_mult { } {
             || [istarget i?86-*-*]
             || [istarget x86_64-*-*]
             || [istarget powerpc*-*-*]
+            || [istarget aarch64*-*-*]
             || [check_effective_target_arm32]
             || ([istarget mips*-*-*]
                 && [check_effective_target_mips_loongson]) } {
@@ -3674,6 +3701,7 @@ proc check_effective_target_vect_int_mult { } {
             || [istarget i?86-*-*]
             || [istarget x86_64-*-*]
             || [istarget ia64-*-*]
+            || [istarget aarch64*-*-*]
             || [check_effective_target_arm32] } {
           set et_vect_int_mult_saved 1
        }
@@ -3748,7 +3776,8 @@ foreach N {2 3 4 8} {
                     && [check_effective_target_vect_extract_even_odd] } {
                    set et_vect_stridedN_saved 1
                }
-               if { [istarget arm*-*-*] && N >= 2 && N <= 4 } {
+               if { ([istarget arm*-*-*]
+                     || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
                    set et_vect_stridedN_saved 1
                }
            }
@@ -3980,6 +4009,7 @@ proc check_effective_target_sync_int_long { } {
         if { [istarget ia64-*-*]
             || [istarget i?86-*-*]
             || [istarget x86_64-*-*]
+            || [istarget aarch64*-*-*]
             || [istarget alpha*-*-*] 
             || [istarget arm*-*-linux-*] 
             || [istarget bfin*-*linux*]
@@ -4008,7 +4038,8 @@ proc check_effective_target_sync_char_short { } {
         set et_sync_char_short_saved 0
 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
 # load-reserved/store-conditional instructions.
-        if { [istarget ia64-*-*]
+        if { [istarget aarch64*-*-*]
+            || [istarget ia64-*-*]
             || [istarget i?86-*-*]
             || [istarget x86_64-*-*]
             || [istarget alpha*-*-*] 
@@ -4733,6 +4764,8 @@ proc check_vect_support_and_set_flags { } {
         } else {
             set dg-do-what-default compile
         }
+    } elseif [istarget "aarch64*-*-*"] {
+        set dg-do-what-default run
     } else {
         return 0
     }
@@ -4756,3 +4789,45 @@ proc check_effective_target_ucontext_h { } {
        #include <ucontext.h>
     }]
 }
+
+proc check_effective_target_aarch64_tiny { } {
+    if { [istarget aarch64*-*-*] } {
+       return [check_no_compiler_messages aarch64_tiny object {
+           #ifdef __AARCH64_CMODEL_TINY__
+           int dummy;
+           #else
+           #error target not AArch64 tiny code model
+           #endif
+       }]
+    } else {
+       return 0
+    }
+}
+
+proc check_effective_target_aarch64_small { } {
+    if { [istarget aarch64*-*-*] } {
+       return [check_no_compiler_messages aarch64_small object {
+           #ifdef __AARCH64_CMODEL_SMALL__
+           int dummy;
+           #else
+           #error target not AArch64 small code model
+           #endif
+       }]
+    } else {
+       return 0
+    }
+}
+
+proc check_effective_target_aarch64_large { } {
+    if { [istarget aarch64*-*-*] } {
+       return [check_no_compiler_messages aarch64_large object {
+           #ifdef __AARCH64_CMODEL_LARGE__
+           int dummy;
+           #else
+           #error target not AArch64 large code model
+           #endif
+       }]
+    } else {
+       return 0
+    }
+}