litepcie: use optional platform.misoc_path to add litepcie phy wrapper verilog files
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 22 Jul 2015 12:13:41 +0000 (14:13 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 22 Jul 2015 16:09:04 +0000 (18:09 +0200)
We should eventually try to use python package_data or data_file for that.

misoclib/com/litepcie/example_designs/targets/dma.py
misoclib/com/litepcie/phy/s7pciephy.py

index 90f3ec889f1923682f0b23addd6456ce45a44daf..b88e80927022d812c82f06c80b3dd8c5351da7fe 100644 (file)
@@ -69,6 +69,7 @@ class PCIeDMASoC(SoC, AutoCSR):
             with_timer=False
         )
         self.submodules.crg = _CRG(platform)
+        platform.misoc_path = "../../../../"
 
         # PCIe endpoint
         self.submodules.pcie_phy = S7PCIEPHY(platform, link_width=2)
index 80c7763c4e087134673a40050920cf38a8c8c92b..40869213675c99eb8f5117ad383ff477594b48ad 100644 (file)
@@ -151,15 +151,13 @@ class S7PCIEPHY(Module, AutoCSR):
             convert_size(dcommand[12:15], self.max_request_size),
             convert_size(dcommand[5:8], self.max_payload_size)
         ]
-
-        extcores_path = "extcores"
-        # XXX find a better way to do this?
-        current_path = os.getcwd()
-        current_path = current_path.replace("\\", "/")
-        if "litepcie/example_designs" in current_path:
-            extcores_path = os.path.join("..", "..", "..", "..", extcores_path)
-        platform.add_source_dir(os.path.join(extcores_path, "litepcie_phy_wrappers", "xilinx", "7-series", "common"))
+        if hasattr(platform, "misoc_path"):
+            misoc_path = platform.misoc_path
+        else:
+            misoc_path = "./"
+        litepcie_phy_wrapper_path = os.path.join(misoc_path, "extcores", "litepcie_phy_wrappers")
+        platform.add_source_dir(os.path.join(litepcie_phy_wrapper_path, "xilinx", "7-series", "common"))
         if device[:4] == "xc7k":
-            platform.add_source_dir(os.path.join(extcores_path, "litepcie_phy_wrappers", "xilinx", "7-series", "kintex7"))
+            platform.add_source_dir(os.path.join(litepcie_phy_wrapper_path, "xilinx", "7-series", "kintex7"))
         elif device[:4] == "xc7a":
-            platform.add_source_dir(os.path.join(extcores_path, "litepcie_phy_wrappers", "xilinx", "7-series", "artix7"))
+            platform.add_source_dir(os.path.join(litepcie_phy_wrapper_path, "xilinx", "7-series", "artix7"))