freedreno/ir3: fixup when changing to mad.f16
authorHyunjun Ko <zzoon@igalia.com>
Fri, 30 Aug 2019 08:29:10 +0000 (08:29 +0000)
committerNeil Roberts <nroberts@igalia.com>
Wed, 20 Nov 2019 13:09:43 +0000 (14:09 +0100)
Reviewed-by: Rob Clark <robdclark@gmail.com>
src/freedreno/ir3/ir3_ra.c

index 67d8a93884ef0b3a3412f5c8fd7f246978868e52..c3d8e88f54a523e1fb87c865e9cab89b1f5b1cd0 100644 (file)
@@ -982,7 +982,11 @@ static void fixup_half_instr_dst(struct ir3_instruction *instr)
        case 3:
                switch (instr->opc) {
                case OPC_MAD_F32:
-                       instr->opc = OPC_MAD_F16;
+                       /* Available for that dest is half and srcs are full.
+                        * eg. mad.f32 hr0, r0.x, r0.y, r0.z
+                        */
+                       if (instr->regs[1]->flags & IR3_REG_HALF)
+                               instr->opc = OPC_MAD_F16;
                        break;
                case OPC_SEL_B32:
                        instr->opc = OPC_SEL_B16;