cpu/vexriscv/system.h: update flush_cpu_dcache.

diff --git a/litex/soc/cores/cpu/vexriscv/system.h b/litex/soc/cores/cpu/vexriscv/system.h
index a8fbe42bbc9c625dee780af882f67c500d333384..0683b5b72bdea2c73390e8798f70295a2a41beb3 100644 (file)
--- a/litex/soc/cores/cpu/vexriscv/system.h
+++ b/litex/soc/cores/cpu/vexriscv/system.h
@@ -21,13 +21,7 @@ __attribute__((unused)) static void flush_cpu_icache(void)
 
 __attribute__((unused)) static void flush_cpu_dcache(void)
 {
-  unsigned long cache_info;
-  asm volatile ("csrr %0, %1" : "=r"(cache_info) : "i"(CSR_DCACHE_INFO));
-  unsigned long cache_way_size = cache_info & 0xFFFFF;
-  unsigned long cache_line_size = (cache_info >> 20) & 0xFFF;
-  for(register unsigned long idx = 0;idx < cache_way_size;idx += cache_line_size){
-    asm volatile("mv x10, %0 \n .word(0b01110000000001010101000000001111)"::"r"(idx));
-  }
+  asm volatile(".word(0x500F)\n");
 }
 
 void flush_l2_cache(void);