AArch64: Restrict the shift value in compare extended shift operation
authorNaveen H.S <Naveen.Hurugalawadi@caviumnetworks.com>
Tue, 7 May 2013 12:20:24 +0000 (12:20 +0000)
committerNaveen H.S <naveenh@gcc.gnu.org>
Tue, 7 May 2013 12:20:24 +0000 (12:20 +0000)
2013-05-07  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

* config/aarch64/aarch64.md
(cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Restrict the
shift value between 0-4.

From-SVN: r198677

gcc/ChangeLog
gcc/config/aarch64/aarch64.md

index 0dc66003fb4f3f2b56186423bc92defb174ce762..44a600898bc7607986aa648ee71ba198913b0d29 100644 (file)
@@ -1,3 +1,9 @@
+2013-05-07  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
+
+       * config/aarch64/aarch64.md
+       (cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Restrict the
+       shift value between 0-4.
+
 2013-05-07  Richard Biener  <rguenther@suse.de>
 
        * double-int.h (rshift): New overload.
index 365bb23d33fcfdcd0942ac8046396955a874fdb5..797cc9b02ccebd13f4fa41ceb058b7f52d2fc5c1 100644 (file)
        (compare:CC_SWP (ashift:GPI
                         (ANY_EXTEND:GPI
                          (match_operand:ALLX 0 "register_operand" "r"))
-                        (match_operand:QI 1 "aarch64_shift_imm_<mode>" "n"))
+                        (match_operand 1 "aarch64_imm3" "Ui3"))
        (match_operand:GPI 2 "register_operand" "r")))]
   ""
   "cmp\\t%<GPI:w>2, %<GPI:w>0, <su>xt<ALLX:size> %1"