add english to lhzupx instruction

diff --git a/openpower/isa/pifixedload.mdwn b/openpower/isa/pifixedload.mdwn
index f67107fe887329487dd0e320d89e9e36a2a7b8de..ab2477bc15a672efa8c590d0ba0194525d284123 100644 (file)
--- a/openpower/isa/pifixedload.mdwn
+++ b/openpower/isa/pifixedload.mdwn
@@ -98,6 +98,16 @@ Pseudo-code:
     RT <- ([0] * (XLEN-16)) || MEM(EA, 2)
     RA <- (RA) + (RB)
 
+Description:
+
+    Let the effective address (EA) be register RA.
+    The halfword in storage addressed by EA is loaded into
+    RT[48:63]. RT[0:47] are set to 0.
+
+    The sum (RA) + (RB) is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None