re PR target/19389 (Odd gpr mem load unrecognizable insn)

	PR target/19389
	* config/rs6000/rs6000.md (movtf_internal): Replace r->o and m->r
	with r->Y and Y->r.

From-SVN: r93224

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d30899341f08d162135667906773da6d340dee22..d666e25132870e50dacc82fa3dda3bf248975b35 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2005-01-12  Alan Modra  <amodra@bigpond.net.au>
+
+       PR target/19389
+       * config/rs6000/rs6000.md (movtf_internal): Replace r->o and m->r
+       with r->Y and Y->r.
+
 2005-01-12  Nick Clifton  <nickc@redhat.com>
 
        * config/iq2000/iq2000.h (ASM_SPEC): Undefine (to stop -Qy being

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index c5b1dcdf21f54b8ee85c9a91f461d7bbe3bf4c18..e3ba0211a78653d46a7b798456dae156a7c8dc3c 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1,6 +1,6 @@
 ;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler
 ;; Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-;; 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
+;; 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
 ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
 
 ;; This file is part of GCC.
@@ -8234,10 +8234,10 @@
 
 ; It's important to list the o->f and f->o moves before f->f because
 ; otherwise reload, given m->f, will try to pick f->f and reload it,
-; which doesn't make progress.  Likewise r->o<> must be before r->r.
+; which doesn't make progress.  Likewise r->Y must be before r->r.
 (define_insn_and_split "*movtf_internal"
-  [(set (match_operand:TF 0 "nonimmediate_operand" "=o,f,f,r,o<>,r")
-       (match_operand:TF 1 "input_operand"         "f,o,f,mGHF,r,r"))]
+  [(set (match_operand:TF 0 "nonimmediate_operand" "=o,f,f,r,Y,r")
+       (match_operand:TF 1 "input_operand"         "f,o,f,YGHF,r,r"))]
   "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
    && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128
    && (gpc_reg_operand (operands[0], TFmode)