/* The labels have the case they have because the enum of insn types
is all uppercase and in the non-stdc case the fmt symbol is built
- into the enum name.
-
- The order here must match the order in m32rx_decode_vars in decode.c. */
-
- static void *labels[] = {
- && case_read_READ_ILLEGAL,
- && case_read_READ_FMT_ADD,
- && case_read_READ_FMT_ADD3,
- && case_read_READ_FMT_ADD,
- && case_read_READ_FMT_AND3,
- && case_read_READ_FMT_ADD,
- && case_read_READ_FMT_OR3,
- && case_read_READ_FMT_ADD,
- && case_read_READ_FMT_AND3,
- && case_read_READ_FMT_ADDI,
- && case_read_READ_FMT_ADDV,
- && case_read_READ_FMT_ADDV3,
- && case_read_READ_FMT_ADDX,
- && case_read_READ_FMT_BC8,
- && case_read_READ_FMT_BC24,
- && case_read_READ_FMT_BEQ,
- && case_read_READ_FMT_BEQZ,
- && case_read_READ_FMT_BEQZ,
- && case_read_READ_FMT_BEQZ,
- && case_read_READ_FMT_BEQZ,
- && case_read_READ_FMT_BEQZ,
- && case_read_READ_FMT_BEQZ,
- && case_read_READ_FMT_BL8,
- && case_read_READ_FMT_BL24,
- && case_read_READ_FMT_BCL8,
- && case_read_READ_FMT_BCL24,
- && case_read_READ_FMT_BC8,
- && case_read_READ_FMT_BC24,
- && case_read_READ_FMT_BEQ,
- && case_read_READ_FMT_BRA8,
- && case_read_READ_FMT_BRA24,
- && case_read_READ_FMT_BCL8,
- && case_read_READ_FMT_BCL24,
- && case_read_READ_FMT_CMP,
- && case_read_READ_FMT_CMPI,
- && case_read_READ_FMT_CMP,
- && case_read_READ_FMT_CMPI,
- && case_read_READ_FMT_CMP,
- && case_read_READ_FMT_CMPZ,
- && case_read_READ_FMT_DIV,
- && case_read_READ_FMT_DIV,
- && case_read_READ_FMT_DIV,
- && case_read_READ_FMT_DIV,
- && case_read_READ_FMT_DIV,
- && case_read_READ_FMT_JC,
- && case_read_READ_FMT_JC,
- && case_read_READ_FMT_JL,
- && case_read_READ_FMT_JMP,
- && case_read_READ_FMT_LD,
- && case_read_READ_FMT_LD_D,
- && case_read_READ_FMT_LDB,
- && case_read_READ_FMT_LDB_D,
- && case_read_READ_FMT_LDH,
- && case_read_READ_FMT_LDH_D,
- && case_read_READ_FMT_LDB,
- && case_read_READ_FMT_LDB_D,
- && case_read_READ_FMT_LDH,
- && case_read_READ_FMT_LDH_D,
- && case_read_READ_FMT_LD_PLUS,
- && case_read_READ_FMT_LD24,
- && case_read_READ_FMT_LDI8,
- && case_read_READ_FMT_LDI16,
- && case_read_READ_FMT_LOCK,
- && case_read_READ_FMT_MACHI_A,
- && case_read_READ_FMT_MACHI_A,
- && case_read_READ_FMT_MACWHI,
- && case_read_READ_FMT_MACWHI,
- && case_read_READ_FMT_ADD,
- && case_read_READ_FMT_MULHI_A,
- && case_read_READ_FMT_MULHI_A,
- && case_read_READ_FMT_MULWHI,
- && case_read_READ_FMT_MULWHI,
- && case_read_READ_FMT_MV,
- && case_read_READ_FMT_MVFACHI_A,
- && case_read_READ_FMT_MVFACHI_A,
- && case_read_READ_FMT_MVFACHI_A,
- && case_read_READ_FMT_MVFC,
- && case_read_READ_FMT_MVTACHI_A,
- && case_read_READ_FMT_MVTACHI_A,
- && case_read_READ_FMT_MVTC,
- && case_read_READ_FMT_MV,
- && case_read_READ_FMT_NOP,
- && case_read_READ_FMT_MV,
- && case_read_READ_FMT_RAC_DSI,
- && case_read_READ_FMT_RAC_DSI,
- && case_read_READ_FMT_RTE,
- && case_read_READ_FMT_SETH,
- && case_read_READ_FMT_ADD,
- && case_read_READ_FMT_SLL3,
- && case_read_READ_FMT_SLLI,
- && case_read_READ_FMT_ADD,
- && case_read_READ_FMT_SLL3,
- && case_read_READ_FMT_SLLI,
- && case_read_READ_FMT_ADD,
- && case_read_READ_FMT_SLL3,
- && case_read_READ_FMT_SLLI,
- && case_read_READ_FMT_ST,
- && case_read_READ_FMT_ST_D,
- && case_read_READ_FMT_STB,
- && case_read_READ_FMT_STB_D,
- && case_read_READ_FMT_STH,
- && case_read_READ_FMT_STH_D,
- && case_read_READ_FMT_ST_PLUS,
- && case_read_READ_FMT_ST_PLUS,
- && case_read_READ_FMT_ADD,
- && case_read_READ_FMT_ADDV,
- && case_read_READ_FMT_ADDX,
- && case_read_READ_FMT_TRAP,
- && case_read_READ_FMT_UNLOCK,
- && case_read_READ_FMT_SATB,
- && case_read_READ_FMT_SATB,
- && case_read_READ_FMT_SAT,
- && case_read_READ_FMT_CMPZ,
- && case_read_READ_FMT_SADD,
- && case_read_READ_FMT_MACWU1,
- && case_read_READ_FMT_MACWHI,
- && case_read_READ_FMT_MULWU1,
- && case_read_READ_FMT_MACWU1,
- && case_read_READ_FMT_SC,
- && case_read_READ_FMT_SC,
- 0
+ into the enum name. */
+
+ static struct {
+ int index;
+ void *label;
+ } labels[] = {
+ { M32RX_XINSN_ILLEGAL, && case_read_READ_ILLEGAL },
+ { M32RX_XINSN_ADD, && case_read_READ_FMT_ADD },
+ { M32RX_XINSN_ADD3, && case_read_READ_FMT_ADD3 },
+ { M32RX_XINSN_AND, && case_read_READ_FMT_ADD },
+ { M32RX_XINSN_AND3, && case_read_READ_FMT_AND3 },
+ { M32RX_XINSN_OR, && case_read_READ_FMT_ADD },
+ { M32RX_XINSN_OR3, && case_read_READ_FMT_OR3 },
+ { M32RX_XINSN_XOR, && case_read_READ_FMT_ADD },
+ { M32RX_XINSN_XOR3, && case_read_READ_FMT_AND3 },
+ { M32RX_XINSN_ADDI, && case_read_READ_FMT_ADDI },
+ { M32RX_XINSN_ADDV, && case_read_READ_FMT_ADDV },
+ { M32RX_XINSN_ADDV3, && case_read_READ_FMT_ADDV3 },
+ { M32RX_XINSN_ADDX, && case_read_READ_FMT_ADDX },
+ { M32RX_XINSN_BC8, && case_read_READ_FMT_BC8 },
+ { M32RX_XINSN_BC24, && case_read_READ_FMT_BC24 },
+ { M32RX_XINSN_BEQ, && case_read_READ_FMT_BEQ },
+ { M32RX_XINSN_BEQZ, && case_read_READ_FMT_BEQZ },
+ { M32RX_XINSN_BGEZ, && case_read_READ_FMT_BEQZ },
+ { M32RX_XINSN_BGTZ, && case_read_READ_FMT_BEQZ },
+ { M32RX_XINSN_BLEZ, && case_read_READ_FMT_BEQZ },
+ { M32RX_XINSN_BLTZ, && case_read_READ_FMT_BEQZ },
+ { M32RX_XINSN_BNEZ, && case_read_READ_FMT_BEQZ },
+ { M32RX_XINSN_BL8, && case_read_READ_FMT_BL8 },
+ { M32RX_XINSN_BL24, && case_read_READ_FMT_BL24 },
+ { M32RX_XINSN_BCL8, && case_read_READ_FMT_BCL8 },
+ { M32RX_XINSN_BCL24, && case_read_READ_FMT_BCL24 },
+ { M32RX_XINSN_BNC8, && case_read_READ_FMT_BC8 },
+ { M32RX_XINSN_BNC24, && case_read_READ_FMT_BC24 },
+ { M32RX_XINSN_BNE, && case_read_READ_FMT_BEQ },
+ { M32RX_XINSN_BRA8, && case_read_READ_FMT_BRA8 },
+ { M32RX_XINSN_BRA24, && case_read_READ_FMT_BRA24 },
+ { M32RX_XINSN_BNCL8, && case_read_READ_FMT_BCL8 },
+ { M32RX_XINSN_BNCL24, && case_read_READ_FMT_BCL24 },
+ { M32RX_XINSN_CMP, && case_read_READ_FMT_CMP },
+ { M32RX_XINSN_CMPI, && case_read_READ_FMT_CMPI },
+ { M32RX_XINSN_CMPU, && case_read_READ_FMT_CMP },
+ { M32RX_XINSN_CMPUI, && case_read_READ_FMT_CMPI },
+ { M32RX_XINSN_CMPEQ, && case_read_READ_FMT_CMP },
+ { M32RX_XINSN_CMPZ, && case_read_READ_FMT_CMPZ },
+ { M32RX_XINSN_DIV, && case_read_READ_FMT_DIV },
+ { M32RX_XINSN_DIVU, && case_read_READ_FMT_DIV },
+ { M32RX_XINSN_REM, && case_read_READ_FMT_DIV },
+ { M32RX_XINSN_REMU, && case_read_READ_FMT_DIV },
+ { M32RX_XINSN_DIVH, && case_read_READ_FMT_DIV },
+ { M32RX_XINSN_JC, && case_read_READ_FMT_JC },
+ { M32RX_XINSN_JNC, && case_read_READ_FMT_JC },
+ { M32RX_XINSN_JL, && case_read_READ_FMT_JL },
+ { M32RX_XINSN_JMP, && case_read_READ_FMT_JMP },
+ { M32RX_XINSN_LD, && case_read_READ_FMT_LD },
+ { M32RX_XINSN_LD_D, && case_read_READ_FMT_LD_D },
+ { M32RX_XINSN_LDB, && case_read_READ_FMT_LDB },
+ { M32RX_XINSN_LDB_D, && case_read_READ_FMT_LDB_D },
+ { M32RX_XINSN_LDH, && case_read_READ_FMT_LDH },
+ { M32RX_XINSN_LDH_D, && case_read_READ_FMT_LDH_D },
+ { M32RX_XINSN_LDUB, && case_read_READ_FMT_LDB },
+ { M32RX_XINSN_LDUB_D, && case_read_READ_FMT_LDB_D },
+ { M32RX_XINSN_LDUH, && case_read_READ_FMT_LDH },
+ { M32RX_XINSN_LDUH_D, && case_read_READ_FMT_LDH_D },
+ { M32RX_XINSN_LD_PLUS, && case_read_READ_FMT_LD_PLUS },
+ { M32RX_XINSN_LD24, && case_read_READ_FMT_LD24 },
+ { M32RX_XINSN_LDI8, && case_read_READ_FMT_LDI8 },
+ { M32RX_XINSN_LDI16, && case_read_READ_FMT_LDI16 },
+ { M32RX_XINSN_LOCK, && case_read_READ_FMT_LOCK },
+ { M32RX_XINSN_MACHI_A, && case_read_READ_FMT_MACHI_A },
+ { M32RX_XINSN_MACLO_A, && case_read_READ_FMT_MACHI_A },
+ { M32RX_XINSN_MACWHI, && case_read_READ_FMT_MACWHI },
+ { M32RX_XINSN_MACWLO, && case_read_READ_FMT_MACWHI },
+ { M32RX_XINSN_MUL, && case_read_READ_FMT_ADD },
+ { M32RX_XINSN_MULHI_A, && case_read_READ_FMT_MULHI_A },
+ { M32RX_XINSN_MULLO_A, && case_read_READ_FMT_MULHI_A },
+ { M32RX_XINSN_MULWHI, && case_read_READ_FMT_MULWHI },
+ { M32RX_XINSN_MULWLO, && case_read_READ_FMT_MULWHI },
+ { M32RX_XINSN_MV, && case_read_READ_FMT_MV },
+ { M32RX_XINSN_MVFACHI_A, && case_read_READ_FMT_MVFACHI_A },
+ { M32RX_XINSN_MVFACLO_A, && case_read_READ_FMT_MVFACHI_A },
+ { M32RX_XINSN_MVFACMI_A, && case_read_READ_FMT_MVFACHI_A },
+ { M32RX_XINSN_MVFC, && case_read_READ_FMT_MVFC },
+ { M32RX_XINSN_MVTACHI_A, && case_read_READ_FMT_MVTACHI_A },
+ { M32RX_XINSN_MVTACLO_A, && case_read_READ_FMT_MVTACHI_A },
+ { M32RX_XINSN_MVTC, && case_read_READ_FMT_MVTC },
+ { M32RX_XINSN_NEG, && case_read_READ_FMT_MV },
+ { M32RX_XINSN_NOP, && case_read_READ_FMT_NOP },
+ { M32RX_XINSN_NOT, && case_read_READ_FMT_MV },
+ { M32RX_XINSN_RAC_DSI, && case_read_READ_FMT_RAC_DSI },
+ { M32RX_XINSN_RACH_DSI, && case_read_READ_FMT_RAC_DSI },
+ { M32RX_XINSN_RTE, && case_read_READ_FMT_RTE },
+ { M32RX_XINSN_SETH, && case_read_READ_FMT_SETH },
+ { M32RX_XINSN_SLL, && case_read_READ_FMT_ADD },
+ { M32RX_XINSN_SLL3, && case_read_READ_FMT_SLL3 },
+ { M32RX_XINSN_SLLI, && case_read_READ_FMT_SLLI },
+ { M32RX_XINSN_SRA, && case_read_READ_FMT_ADD },
+ { M32RX_XINSN_SRA3, && case_read_READ_FMT_SLL3 },
+ { M32RX_XINSN_SRAI, && case_read_READ_FMT_SLLI },
+ { M32RX_XINSN_SRL, && case_read_READ_FMT_ADD },
+ { M32RX_XINSN_SRL3, && case_read_READ_FMT_SLL3 },
+ { M32RX_XINSN_SRLI, && case_read_READ_FMT_SLLI },
+ { M32RX_XINSN_ST, && case_read_READ_FMT_ST },
+ { M32RX_XINSN_ST_D, && case_read_READ_FMT_ST_D },
+ { M32RX_XINSN_STB, && case_read_READ_FMT_STB },
+ { M32RX_XINSN_STB_D, && case_read_READ_FMT_STB_D },
+ { M32RX_XINSN_STH, && case_read_READ_FMT_STH },
+ { M32RX_XINSN_STH_D, && case_read_READ_FMT_STH_D },
+ { M32RX_XINSN_ST_PLUS, && case_read_READ_FMT_ST_PLUS },
+ { M32RX_XINSN_ST_MINUS, && case_read_READ_FMT_ST_PLUS },
+ { M32RX_XINSN_SUB, && case_read_READ_FMT_ADD },
+ { M32RX_XINSN_SUBV, && case_read_READ_FMT_ADDV },
+ { M32RX_XINSN_SUBX, && case_read_READ_FMT_ADDX },
+ { M32RX_XINSN_TRAP, && case_read_READ_FMT_TRAP },
+ { M32RX_XINSN_UNLOCK, && case_read_READ_FMT_UNLOCK },
+ { M32RX_XINSN_SATB, && case_read_READ_FMT_SATB },
+ { M32RX_XINSN_SATH, && case_read_READ_FMT_SATB },
+ { M32RX_XINSN_SAT, && case_read_READ_FMT_SAT },
+ { M32RX_XINSN_PCMPBZ, && case_read_READ_FMT_CMPZ },
+ { M32RX_XINSN_SADD, && case_read_READ_FMT_SADD },
+ { M32RX_XINSN_MACWU1, && case_read_READ_FMT_MACWU1 },
+ { M32RX_XINSN_MSBLO, && case_read_READ_FMT_MACWHI },
+ { M32RX_XINSN_MULWU1, && case_read_READ_FMT_MULWU1 },
+ { M32RX_XINSN_MACLH1, && case_read_READ_FMT_MACWU1 },
+ { M32RX_XINSN_SC, && case_read_READ_FMT_SC },
+ { M32RX_XINSN_SNC, && case_read_READ_FMT_SC },
+ { 0, 0 }
};
- extern DECODE *m32rx_decode_vars[];
int i;
- for (i = 0; m32rx_decode_vars[i] != 0; ++i)
- m32rx_decode_vars[i]->read = labels[i];
+ for (i = 0; labels[i].label != 0; ++i)
+ CPU_IDESC (current_cpu) [labels[i].index].read = labels[i].label;
#endif /* DEFINE_LABELS */
#if ! defined (SCACHE_P) || (defined (SCACHE_P) && WITH_SCACHE)
#undef GET_ATTR
-#define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->opcode, CGEN_INSN_##attr)
+#define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->idesc->opcode, CGEN_INSN_##attr)
+
+/* add: add $dr,$sr. */
-/* Perform add: add $dr,$sr. */
CIA
SEM_FN_NAME (m32rx,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ADDSI (OPRND (dr), OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform add3: add3 $dr,$sr,$hash$slo16. */
+/* add3: add3 $dr,$sr,$hash$slo16. */
+
CIA
SEM_FN_NAME (m32rx,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ADDSI (OPRND (sr), OPRND (slo16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform and: and $dr,$sr. */
+/* and: and $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ANDSI (OPRND (dr), OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform and3: and3 $dr,$sr,$uimm16. */
+/* and3: and3 $dr,$sr,$uimm16. */
+
CIA
SEM_FN_NAME (m32rx,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ANDSI (OPRND (sr), OPRND (uimm16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform or: or $dr,$sr. */
+/* or: or $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ORSI (OPRND (dr), OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform or3: or3 $dr,$sr,$hash$ulo16. */
+/* or3: or3 $dr,$sr,$hash$ulo16. */
+
CIA
SEM_FN_NAME (m32rx,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ORSI (OPRND (sr), OPRND (ulo16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform xor: xor $dr,$sr. */
+/* xor: xor $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = XORSI (OPRND (dr), OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform xor3: xor3 $dr,$sr,$uimm16. */
+/* xor3: xor3 $dr,$sr,$uimm16. */
+
CIA
SEM_FN_NAME (m32rx,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = XORSI (OPRND (sr), OPRND (uimm16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform addi: addi $dr,$simm8. */
+/* addi: addi $dr,$simm8. */
+
CIA
SEM_FN_NAME (m32rx,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ADDSI (OPRND (dr), OPRND (simm8));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform addv: addv $dr,$sr. */
+/* addv: addv $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform addv3: addv3 $dr,$sr,$simm16. */
+/* addv3: addv3 $dr,$sr,$simm16. */
+
CIA
SEM_FN_NAME (m32rx,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform addx: addx $dr,$sr. */
+/* addx: addx $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bc8: bc.s $disp8. */
+/* bc8: bc.s $disp8. */
+
CIA
SEM_FN_NAME (m32rx,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (OPRND (condbit)) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bc24: bc.l $disp24. */
+/* bc24: bc.l $disp24. */
+
CIA
SEM_FN_NAME (m32rx,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (OPRND (condbit)) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform beq: beq $src1,$src2,$disp16. */
+/* beq: beq $src1,$src2,$disp16. */
+
CIA
SEM_FN_NAME (m32rx,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (EQSI (OPRND (src1), OPRND (src2))) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform beqz: beqz $src2,$disp16. */
+/* beqz: beqz $src2,$disp16. */
+
CIA
SEM_FN_NAME (m32rx,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (EQSI (OPRND (src2), 0)) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bgez: bgez $src2,$disp16. */
+/* bgez: bgez $src2,$disp16. */
+
CIA
SEM_FN_NAME (m32rx,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (GESI (OPRND (src2), 0)) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bgtz: bgtz $src2,$disp16. */
+/* bgtz: bgtz $src2,$disp16. */
+
CIA
SEM_FN_NAME (m32rx,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (GTSI (OPRND (src2), 0)) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform blez: blez $src2,$disp16. */
+/* blez: blez $src2,$disp16. */
+
CIA
SEM_FN_NAME (m32rx,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (LESI (OPRND (src2), 0)) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bltz: bltz $src2,$disp16. */
+/* bltz: bltz $src2,$disp16. */
+
CIA
SEM_FN_NAME (m32rx,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (LTSI (OPRND (src2), 0)) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bnez: bnez $src2,$disp16. */
+/* bnez: bnez $src2,$disp16. */
+
CIA
SEM_FN_NAME (m32rx,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (NESI (OPRND (src2), 0)) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bl8: bl.s $disp8. */
+/* bl8: bl.s $disp8. */
+
CIA
SEM_FN_NAME (m32rx,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bl24: bl.l $disp24. */
+/* bl24: bl.l $disp24. */
+
CIA
SEM_FN_NAME (m32rx,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bcl8: bcl.s $disp8. */
+/* bcl8: bcl.s $disp8. */
+
CIA
SEM_FN_NAME (m32rx,bcl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
} while (0);
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bcl24: bcl.l $disp24. */
+/* bcl24: bcl.l $disp24. */
+
CIA
SEM_FN_NAME (m32rx,bcl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
} while (0);
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bnc8: bnc.s $disp8. */
+/* bnc8: bnc.s $disp8. */
+
CIA
SEM_FN_NAME (m32rx,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (NOTBI (OPRND (condbit))) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bnc24: bnc.l $disp24. */
+/* bnc24: bnc.l $disp24. */
+
CIA
SEM_FN_NAME (m32rx,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (NOTBI (OPRND (condbit))) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bne: bne $src1,$src2,$disp16. */
+/* bne: bne $src1,$src2,$disp16. */
+
CIA
SEM_FN_NAME (m32rx,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (NESI (OPRND (src1), OPRND (src2))) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bra8: bra.s $disp8. */
+/* bra8: bra.s $disp8. */
+
CIA
SEM_FN_NAME (m32rx,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
EXTRACT_FMT_BRA8_CODE
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bra24: bra.l $disp24. */
+/* bra24: bra.l $disp24. */
+
CIA
SEM_FN_NAME (m32rx,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
EXTRACT_FMT_BRA24_CODE
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bncl8: bncl.s $disp8. */
+/* bncl8: bncl.s $disp8. */
+
CIA
SEM_FN_NAME (m32rx,bncl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
} while (0);
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform bncl24: bncl.l $disp24. */
+/* bncl24: bncl.l $disp24. */
+
CIA
SEM_FN_NAME (m32rx,bncl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
} while (0);
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform cmp: cmp $src1,$src2. */
+/* cmp: cmp $src1,$src2. */
+
CIA
SEM_FN_NAME (m32rx,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_cond) = LTSI (OPRND (src1), OPRND (src2));
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform cmpi: cmpi $src2,$simm16. */
+/* cmpi: cmpi $src2,$simm16. */
+
CIA
SEM_FN_NAME (m32rx,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_cond) = LTSI (OPRND (src2), OPRND (simm16));
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform cmpu: cmpu $src1,$src2. */
+/* cmpu: cmpu $src1,$src2. */
+
CIA
SEM_FN_NAME (m32rx,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_cond) = LTUSI (OPRND (src1), OPRND (src2));
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform cmpui: cmpui $src2,$simm16. */
+/* cmpui: cmpui $src2,$simm16. */
+
CIA
SEM_FN_NAME (m32rx,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_cond) = LTUSI (OPRND (src2), OPRND (simm16));
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform cmpeq: cmpeq $src1,$src2. */
+/* cmpeq: cmpeq $src1,$src2. */
+
CIA
SEM_FN_NAME (m32rx,cmpeq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_cond) = EQSI (OPRND (src1), OPRND (src2));
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform cmpz: cmpz $src2. */
+/* cmpz: cmpz $src2. */
+
CIA
SEM_FN_NAME (m32rx,cmpz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_cond) = EQSI (OPRND (src2), 0);
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform div: div $dr,$sr. */
+/* div: div $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform divu: divu $dr,$sr. */
+/* divu: divu $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform rem: rem $dr,$sr. */
+/* rem: rem $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform remu: remu $dr,$sr. */
+/* remu: remu $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform divh: divh $dr,$sr. */
+/* divh: divh $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,divh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform jc: jc $sr. */
+/* jc: jc $sr. */
+
CIA
SEM_FN_NAME (m32rx,jc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (OPRND (condbit)) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform jnc: jnc $sr. */
+/* jnc: jnc $sr. */
+
CIA
SEM_FN_NAME (m32rx,jnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
if (NOTBI (OPRND (condbit))) {
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform jl: jl $sr. */
+/* jl: jl $sr. */
+
CIA
SEM_FN_NAME (m32rx,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[14]) = temp0;
TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, temp1));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform jmp: jmp $sr. */
+/* jmp: jmp $sr. */
+
CIA
SEM_FN_NAME (m32rx,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
EXTRACT_FMT_JMP_CODE
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, OPRND (sr)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ld: ld $dr,@$sr. */
+/* ld: ld $dr,@$sr. */
+
CIA
SEM_FN_NAME (m32rx,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = OPRND (h_memory_sr);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ld-d: ld $dr,@($slo16,$sr). */
+/* ld-d: ld $dr,@($slo16,$sr). */
+
CIA
SEM_FN_NAME (m32rx,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = OPRND (h_memory_add_WI_sr_slo16);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ldb: ldb $dr,@$sr. */
+/* ldb: ldb $dr,@$sr. */
+
CIA
SEM_FN_NAME (m32rx,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = EXTQISI (OPRND (h_memory_sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ldb-d: ldb $dr,@($slo16,$sr). */
+/* ldb-d: ldb $dr,@($slo16,$sr). */
+
CIA
SEM_FN_NAME (m32rx,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = EXTQISI (OPRND (h_memory_add_WI_sr_slo16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ldh: ldh $dr,@$sr. */
+/* ldh: ldh $dr,@$sr. */
+
CIA
SEM_FN_NAME (m32rx,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = EXTHISI (OPRND (h_memory_sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ldh-d: ldh $dr,@($slo16,$sr). */
+/* ldh-d: ldh $dr,@($slo16,$sr). */
+
CIA
SEM_FN_NAME (m32rx,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = EXTHISI (OPRND (h_memory_add_WI_sr_slo16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ldub: ldub $dr,@$sr. */
+/* ldub: ldub $dr,@$sr. */
+
CIA
SEM_FN_NAME (m32rx,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ZEXTQISI (OPRND (h_memory_sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ldub-d: ldub $dr,@($slo16,$sr). */
+/* ldub-d: ldub $dr,@($slo16,$sr). */
+
CIA
SEM_FN_NAME (m32rx,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ZEXTQISI (OPRND (h_memory_add_WI_sr_slo16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform lduh: lduh $dr,@$sr. */
+/* lduh: lduh $dr,@$sr. */
+
CIA
SEM_FN_NAME (m32rx,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ZEXTHISI (OPRND (h_memory_sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform lduh-d: lduh $dr,@($slo16,$sr). */
+/* lduh-d: lduh $dr,@($slo16,$sr). */
+
CIA
SEM_FN_NAME (m32rx,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ZEXTHISI (OPRND (h_memory_add_WI_sr_slo16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ld-plus: ld $dr,@$sr+. */
+/* ld-plus: ld $dr,@$sr+. */
+
CIA
SEM_FN_NAME (m32rx,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "sr", 'x', CPU (h_gr[f_r2]));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ld24: ld24 $dr,$uimm24. */
+/* ld24: ld24 $dr,$uimm24. */
+
CIA
SEM_FN_NAME (m32rx,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = OPRND (uimm24);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ldi8: ldi8 $dr,$simm8. */
+/* ldi8: ldi8 $dr,$simm8. */
+
CIA
SEM_FN_NAME (m32rx,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = OPRND (simm8);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform ldi16: ldi16 $dr,$hash$slo16. */
+/* ldi16: ldi16 $dr,$hash$slo16. */
+
CIA
SEM_FN_NAME (m32rx,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = OPRND (slo16);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform lock: lock $dr,@$sr. */
+/* lock: lock $dr,@$sr. */
+
CIA
SEM_FN_NAME (m32rx,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform machi-a: machi $src1,$src2,$acc. */
+/* machi-a: machi $src1,$src2,$acc. */
+
CIA
SEM_FN_NAME (m32rx,machi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8));
TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform maclo-a: maclo $src1,$src2,$acc. */
+/* maclo-a: maclo $src1,$src2,$acc. */
+
CIA
SEM_FN_NAME (m32rx,maclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8));
TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform macwhi: macwhi $src1,$src2. */
+/* macwhi: macwhi $src1,$src2. */
+
CIA
SEM_FN_NAME (m32rx,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accum_set (current_cpu, SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8));
TRACE_RESULT (current_cpu, "accum", 'D', m32rx_h_accum_get (current_cpu));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform macwlo: macwlo $src1,$src2. */
+/* macwlo: macwlo $src1,$src2. */
+
CIA
SEM_FN_NAME (m32rx,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accum_set (current_cpu, SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8));
TRACE_RESULT (current_cpu, "accum", 'D', m32rx_h_accum_get (current_cpu));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mul: mul $dr,$sr. */
+/* mul: mul $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = MULSI (OPRND (dr), OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mulhi-a: mulhi $src1,$src2,$acc. */
+/* mulhi-a: mulhi $src1,$src2,$acc. */
+
CIA
SEM_FN_NAME (m32rx,mulhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 16), 16));
TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mullo-a: mullo $src1,$src2,$acc. */
+/* mullo-a: mullo $src1,$src2,$acc. */
+
CIA
SEM_FN_NAME (m32rx,mullo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 16), 16));
TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mulwhi: mulwhi $src1,$src2. */
+/* mulwhi: mulwhi $src1,$src2. */
+
CIA
SEM_FN_NAME (m32rx,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accum_set (current_cpu, SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 8), 8));
TRACE_RESULT (current_cpu, "accum", 'D', m32rx_h_accum_get (current_cpu));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mulwlo: mulwlo $src1,$src2. */
+/* mulwlo: mulwlo $src1,$src2. */
+
CIA
SEM_FN_NAME (m32rx,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accum_set (current_cpu, SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 8), 8));
TRACE_RESULT (current_cpu, "accum", 'D', m32rx_h_accum_get (current_cpu));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mv: mv $dr,$sr. */
+/* mv: mv $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = OPRND (sr);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mvfachi-a: mvfachi $dr,$accs. */
+/* mvfachi-a: mvfachi $dr,$accs. */
+
CIA
SEM_FN_NAME (m32rx,mvfachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 32));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mvfaclo-a: mvfaclo $dr,$accs. */
+/* mvfaclo-a: mvfaclo $dr,$accs. */
+
CIA
SEM_FN_NAME (m32rx,mvfaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = TRUNCDISI (OPRND (accs));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mvfacmi-a: mvfacmi $dr,$accs. */
+/* mvfacmi-a: mvfacmi $dr,$accs. */
+
CIA
SEM_FN_NAME (m32rx,mvfacmi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mvfc: mvfc $dr,$scr. */
+/* mvfc: mvfc $dr,$scr. */
+
CIA
SEM_FN_NAME (m32rx,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = OPRND (scr);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mvtachi-a: mvtachi $src1,$accs. */
+/* mvtachi-a: mvtachi $src1,$accs. */
+
CIA
SEM_FN_NAME (m32rx,mvtachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (OPRND (src1)), 32)));
TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mvtaclo-a: mvtaclo $src1,$accs. */
+/* mvtaclo-a: mvtaclo $src1,$accs. */
+
CIA
SEM_FN_NAME (m32rx,mvtaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0xffffffff, 0)), ZEXTSIDI (OPRND (src1))));
TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mvtc: mvtc $sr,$dcr. */
+/* mvtc: mvtc $sr,$dcr. */
+
CIA
SEM_FN_NAME (m32rx,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_cr_set (current_cpu, f_r1, OPRND (sr));
TRACE_RESULT (current_cpu, "dcr", 'x', m32rx_h_cr_get (current_cpu, f_r1));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform neg: neg $dr,$sr. */
+/* neg: neg $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = NEGSI (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform nop: nop. */
+/* nop: nop. */
+
CIA
SEM_FN_NAME (m32rx,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform not: not $dr,$sr. */
+/* not: not $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = INVSI (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform rac-dsi: rac $accd,$accs,$imm1. */
+/* rac-dsi: rac $accd,$accs,$imm1. */
+
CIA
SEM_FN_NAME (m32rx,rac_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "accd", 'D', m32rx_h_accums_get (current_cpu, f_accd));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform rach-dsi: rach $accd,$accs,$imm1. */
+/* rach-dsi: rach $accd,$accs,$imm1. */
+
CIA
SEM_FN_NAME (m32rx,rach_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "accd", 'D', m32rx_h_accums_get (current_cpu, f_accd));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform rte: rte. */
+/* rte: rte. */
+
CIA
SEM_FN_NAME (m32rx,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_cond) = OPRND (h_bcond_0);
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (h_bpc_0), -4)));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform seth: seth $dr,$hash$hi16. */
+/* seth: seth $dr,$hash$hi16. */
+
CIA
SEM_FN_NAME (m32rx,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = SLLSI (OPRND (hi16), 16);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform sll: sll $dr,$sr. */
+/* sll: sll $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = SLLSI (OPRND (dr), ANDSI (OPRND (sr), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform sll3: sll3 $dr,$sr,$simm16. */
+/* sll3: sll3 $dr,$sr,$simm16. */
+
CIA
SEM_FN_NAME (m32rx,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = SLLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform slli: slli $dr,$uimm5. */
+/* slli: slli $dr,$uimm5. */
+
CIA
SEM_FN_NAME (m32rx,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = SLLSI (OPRND (dr), OPRND (uimm5));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform sra: sra $dr,$sr. */
+/* sra: sra $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = SRASI (OPRND (dr), ANDSI (OPRND (sr), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform sra3: sra3 $dr,$sr,$simm16. */
+/* sra3: sra3 $dr,$sr,$simm16. */
+
CIA
SEM_FN_NAME (m32rx,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = SRASI (OPRND (sr), ANDSI (OPRND (simm16), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform srai: srai $dr,$uimm5. */
+/* srai: srai $dr,$uimm5. */
+
CIA
SEM_FN_NAME (m32rx,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = SRASI (OPRND (dr), OPRND (uimm5));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform srl: srl $dr,$sr. */
+/* srl: srl $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = SRLSI (OPRND (dr), ANDSI (OPRND (sr), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform srl3: srl3 $dr,$sr,$simm16. */
+/* srl3: srl3 $dr,$sr,$simm16. */
+
CIA
SEM_FN_NAME (m32rx,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = SRLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform srli: srli $dr,$uimm5. */
+/* srli: srli $dr,$uimm5. */
+
CIA
SEM_FN_NAME (m32rx,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = SRLSI (OPRND (dr), OPRND (uimm5));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform st: st $src1,@$src2. */
+/* st: st $src1,@$src2. */
+
CIA
SEM_FN_NAME (m32rx,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform st-d: st $src1,@($slo16,$src2). */
+/* st-d: st $src1,@($slo16,$src2). */
+
CIA
SEM_FN_NAME (m32rx,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
SETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform stb: stb $src1,@$src2. */
+/* stb: stb $src1,@$src2. */
+
CIA
SEM_FN_NAME (m32rx,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
SETMEMQI (current_cpu, OPRND (src2), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMQI (current_cpu, OPRND (src2)));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform stb-d: stb $src1,@($slo16,$src2). */
+/* stb-d: stb $src1,@($slo16,$src2). */
+
CIA
SEM_FN_NAME (m32rx,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
SETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform sth: sth $src1,@$src2. */
+/* sth: sth $src1,@$src2. */
+
CIA
SEM_FN_NAME (m32rx,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
SETMEMHI (current_cpu, OPRND (src2), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMHI (current_cpu, OPRND (src2)));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform sth-d: sth $src1,@($slo16,$src2). */
+/* sth-d: sth $src1,@($slo16,$src2). */
+
CIA
SEM_FN_NAME (m32rx,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
SETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform st-plus: st $src1,@+$src2. */
+/* st-plus: st $src1,@+$src2. */
+
CIA
SEM_FN_NAME (m32rx,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform st-minus: st $src1,@-$src2. */
+/* st-minus: st $src1,@-$src2. */
+
CIA
SEM_FN_NAME (m32rx,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform sub: sub $dr,$sr. */
+/* sub: sub $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = SUBSI (OPRND (dr), OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform subv: subv $dr,$sr. */
+/* subv: subv $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform subx: subx $dr,$sr. */
+/* subx: subx $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform trap: trap $uimm4. */
+/* trap: trap $uimm4. */
+
CIA
SEM_FN_NAME (m32rx,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_cr_set (current_cpu, 0, ANDSI (SLLSI (OPRND (h_cr_0), 8), 65408));
TRACE_RESULT (current_cpu, "h-cr-0", 'x', m32rx_h_cr_get (current_cpu, 0));
BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, do_trap (current_cpu, OPRND (uimm4))));
+ taken_p = 1;
TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform unlock: unlock $src1,@$src2. */
+/* unlock: unlock $src1,@$src2. */
+
CIA
SEM_FN_NAME (m32rx,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
TRACE_RESULT (current_cpu, "h-lock-0", 'x', CPU (h_lock));
} while (0);
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform satb: satb $dr,$sr. */
+/* satb: satb $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,satb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = (GESI (OPRND (sr), 127)) ? (127) : (LESI (OPRND (sr), -128)) ? (-128) : (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform sath: sath $dr,$sr. */
+/* sath: sath $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,sath) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = (GESI (OPRND (sr), 32767)) ? (32767) : (LESI (OPRND (sr), -32768)) ? (-32768) : (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform sat: sat $dr,$sr. */
+/* sat: sat $dr,$sr. */
+
CIA
SEM_FN_NAME (m32rx,sat) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_gr[f_r1]) = ((OPRND (condbit)) ? (((LTSI (OPRND (sr), 0)) ? (2147483647) : (0x80000000))) : (OPRND (sr)));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform pcmpbz: pcmpbz $src2. */
+/* pcmpbz: pcmpbz $src2. */
+
CIA
SEM_FN_NAME (m32rx,pcmpbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
CPU (h_cond) = (EQSI (ANDSI (OPRND (src2), 255), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 65280), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 0xff000000), 0)) ? (1) : (0);
TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform sadd: sadd. */
+/* sadd: sadd. */
+
CIA
SEM_FN_NAME (m32rx,sadd) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accums_set (current_cpu, 0, ADDDI (SRADI (OPRND (h_accums_1), 16), OPRND (h_accums_0)));
TRACE_RESULT (current_cpu, "h-accums-0", 'D', m32rx_h_accums_get (current_cpu, 0));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform macwu1: macwu1 $src1,$src2. */
+/* macwu1: macwu1 $src1,$src2. */
+
CIA
SEM_FN_NAME (m32rx,macwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535)))), 8), 8));
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform msblo: msblo $src1,$src2. */
+/* msblo: msblo $src1,$src2. */
+
CIA
SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accum_set (current_cpu, SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8));
TRACE_RESULT (current_cpu, "accum", 'D', m32rx_h_accum_get (current_cpu));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform mulwu1: mulwu1 $src1,$src2. */
+/* mulwu1: mulwu1 $src1,$src2. */
+
CIA
SEM_FN_NAME (m32rx,mulwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535))), 16), 16));
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform maclh1: maclh1 $src1,$src2. */
+/* maclh1: maclh1 $src1,$src2. */
+
CIA
SEM_FN_NAME (m32rx,maclh1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (OPRND (src1))), SRASI (OPRND (src2), 16))), 16)), 8), 8));
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform sc: sc. */
+/* sc: sc. */
+
CIA
SEM_FN_NAME (m32rx,sc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
BRANCH_NEW_PC (new_pc, NEW_PC_SKIP);
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{
#undef OPRND
}
-/* Perform snc: snc. */
+/* snc: snc. */
+
CIA
SEM_FN_NAME (m32rx,snc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
BRANCH_NEW_PC (new_pc, NEW_PC_SKIP);
}
+ PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
+
#if WITH_PROFILE_MODEL_P
if (PROFILE_MODEL_P (current_cpu))
{