gas/
authorH.J. Lu <hjl.tools@gmail.com>
Mon, 7 Apr 2008 13:07:16 +0000 (13:07 +0000)
committerH.J. Lu <hjl.tools@gmail.com>
Mon, 7 Apr 2008 13:07:16 +0000 (13:07 +0000)
2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>

* config/tc-i386.c (parse_real_register): Return AVX register
only if AVX is enabled.

gas/testsuite/

2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>

* gas/i386/att-regs.s: Add AVX register test.
* gas/i386/intel-regs.s: Likewise.

* gas/i386/att-regs.d: Updated.
* gas/i386/intel-regs.d: Likewise.

gas/ChangeLog
gas/config/tc-i386.c
gas/testsuite/ChangeLog
gas/testsuite/gas/i386/att-regs.d
gas/testsuite/gas/i386/att-regs.s
gas/testsuite/gas/i386/intel-regs.d
gas/testsuite/gas/i386/intel-regs.s

index c308c82c4dd418b69d9a84a744d8ab31d2d7920f..3ea6ff1b7d84fb98ac7e8a398d1872f358cc0d22 100644 (file)
@@ -1,3 +1,8 @@
+2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (parse_real_register): Return AVX register
+       only if AVX is enabled.
+
 2008-04-07  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 
        PR gas/6043
index 4426697003ce9b4bd120d2c0d3bc36b5121f03af..f6b3909cb3977fbe71c3e0fe9c6af9cf25f0d3cb 100644 (file)
@@ -7685,6 +7685,9 @@ parse_real_register (char *reg_string, char **end_op)
   if (r->reg_type.bitfield.regxmm && !cpu_arch_flags.bitfield.cpusse)
     return (const reg_entry *) NULL;
 
+  if (r->reg_type.bitfield.regymm && !cpu_arch_flags.bitfield.cpuavx)
+    return (const reg_entry *) NULL;
+
   /* Don't allow fake index register unless allow_index_reg isn't 0. */
   if (!allow_index_reg
       && (r->reg_num == RegEiz || r->reg_num == RegRiz))
index 65c19a3ef779232845b641a84717b13ecabcbc01..89280ccc5a2900888fab5e4b6a3a62e695b7803d 100644 (file)
@@ -1,3 +1,11 @@
+2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * gas/i386/att-regs.s: Add AVX register test.
+       * gas/i386/intel-regs.s: Likewise.
+
+       * gas/i386/att-regs.d: Updated.
+       * gas/i386/intel-regs.d: Likewise.
+
 2008-04-07  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 
        PR gas/6043
index 6ab9d28f5d41e203d6f33ce13f4ea15ad77ec40c..384e7898965f278d1453a731ff4e26d90ab7530f 100644 (file)
@@ -34,6 +34,7 @@ Disassembly of section \.text:
 .*:[   ]+dd c0[        ]+ffree[        ]+%st(\(0\))?
 .*:[   ]+0f ef c0[     ]+pxor[         ]+%mm0,%mm0
 .*:[   ]+0f 57 c0[     ]+xorps[        ]+%xmm0,%xmm0
+.*:[   ]+c5 fc 57 c0[  ]+vxorps[       ]+%ymm0,%ymm0,%ymm0
 .*:[   ]+44[   ]+inc    %esp
 .*:[   ]+88 c0[        ]+mov[  ]+%al,%al
 .*:[   ]+66 44[        ]+inc[  ]+%sp
index b966509a96b5e54437678ffeaf6bc977b7562c83..f58deec27e8d09f6e0e29f9c62f62ef4c208b7af 100644 (file)
@@ -42,6 +42,9 @@
        .arch .sse
        xorps   xmm0, xmm0
 
+       .arch .avx
+       vxorps  ymm0, ymm0, ymm0
+
        .arch generic64
        .code64
        mov     r8b, axl
index cf52161064b548c16b5910a1587afe65af489607..0ecc9f684b9ad63b0dd12d9e170be0f7bdd35e9b 100644 (file)
@@ -34,6 +34,7 @@ Disassembly of section \.text:
 .*:[   ]+dd c0[        ]+ffree[        ]+%st(\(0\))?
 .*:[   ]+0f ef c0[     ]+pxor[         ]+%mm0,%mm0
 .*:[   ]+0f 57 c0[     ]+xorps[        ]+%xmm0,%xmm0
+.*:[   ]+c5 fc 57 c0[  ]+vxorps[       ]+%ymm0,%ymm0,%ymm0
 .*:[   ]+44[   ]+inc    %esp
 .*:[   ]+88 c0[        ]+mov[  ]+%al,%al
 .*:[   ]+66 44[        ]+inc[  ]+%sp
index df5baf21d7f4193cf3f9d6f38d62aa20983a3e94..546e196a447766a5d7debb7c237cddfa8898a408 100644 (file)
@@ -42,6 +42,9 @@
        .arch .sse
        xorps   xmm0, xmm0
 
+       .arch .avx
+       vxorps  ymm0, ymm0, ymm0
+
        .arch generic64
        .code64
        mov     axl, r8b