stats: Update Ruby regressions for memory controller fix

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini
index 2e69d465e015880d37b5555165657d5b4a88ab4b..80e83bbd8045b8db400bde3c2002abc793be8aee 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=cpu dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -47,7 +48,6 @@ max_insts_any_thread=0
 max_loads_all_threads=0
 max_loads_any_thread=0
 numThreads=1
-phase=0
 profile=0
 progress_interval=0
 system=system
@@ -78,7 +78,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello
+executable=tests/test-progs/hello/bin/alpha/linux/hello
 gid=100
 input=cin
 max_stack_size=67108864
@@ -119,9 +119,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -130,6 +130,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -183,6 +184,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=true
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -227,6 +229,7 @@ tagArrayBanks=1
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -351,6 +354,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats
index e4800c0122a92dd1a460ac131d802be28f1b2ac8..5862ff0129890afd8494f165ccc2a010d915bbfb 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats
@@ -1,26 +1,26 @@
-Real time: Jul/10/2012 17:30:50
+Real time: Sep/01/2012 14:02:52
 
 Profiler Stats
 --------------
-Elapsed_time_in_seconds: 1
-Elapsed_time_in_minutes: 0.0166667
-Elapsed_time_in_hours: 0.000277778
-Elapsed_time_in_days: 1.15741e-05
+Elapsed_time_in_seconds: 0
+Elapsed_time_in_minutes: 0
+Elapsed_time_in_hours: 0
+Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 0.62
-Virtual_time_in_minutes: 0.0103333
-Virtual_time_in_hours:   0.000172222
-Virtual_time_in_days:    7.17593e-06
+Virtual_time_in_seconds: 0.56
+Virtual_time_in_minutes: 0.00933333
+Virtual_time_in_hours:   0.000155556
+Virtual_time_in_days:    6.48148e-06
 
-Ruby_current_time: 279353
+Ruby_current_time: 138616
 Ruby_start_time: 0
-Ruby_cycles: 279353
+Ruby_cycles: 138616
 
-mbytes_resident: 47.9336
-mbytes_total: 230.535
-resident_ratio: 0.20794
+mbytes_resident: 49.5195
+mbytes_total: 259.898
+resident_ratio: 0.190594
 
-ruby_cycles_executed: [ 279354 ]
+ruby_cycles_executed: [ 138617 ]
 
 Busy Controller Counts:
 L1Cache-0:0  
@@ -30,15 +30,15 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8465 average:     1 | standard deviation: 0 | 0 8465 ]
+sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8449 average:     1 | standard deviation: 0 | 0 8449 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 2 max: 297 count: 8464 average: 32.0048 | standard deviation: 63.6079 | 0 6974 0 0 0 0 0 0 0 29 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 118 380 227 310 190 17 40 4 7 11 8 23 23 28 22 21 12 0 0 0 2 2 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 3 3 0 0 1 1 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 2 max: 287 count: 1185 average: 83.8878 | standard deviation: 84.2176 | 0 602 0 0 0 0 0 0 0 12 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 54 155 70 110 81 8 29 3 2 5 2 9 4 12 7 5 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 3 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 2 max: 297 count: 865 average: 43.8439 | standard deviation: 73.6087 | 0 649 0 0 0 0 0 0 0 12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 35 63 19 18 8 4 0 0 1 1 3 15 1 3 16 4 0 0 0 2 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH: [binsize: 2 max: 295 count: 6414 average: 20.8227 | standard deviation: 51.5606 | 0 5723 0 0 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 58 190 94 181 91 1 7 1 5 5 5 11 4 15 12 0 0 0 0 0 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_NULL: [binsize: 2 max: 297 count: 8464 average: 32.0048 | standard deviation: 63.6079 | 0 6974 0 0 0 0 0 0 0 29 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 118 380 227 310 190 17 40 4 7 11 8 23 23 28 22 21 12 0 0 0 2 2 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 3 3 0 0 1 1 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency: [binsize: 1 max: 113 count: 8448 average: 15.4081 | standard deviation: 27.0652 | 0 0 0 6958 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 29 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 269 472 460 8 43 37 35 30 26 2 16 29 14 0 4 0 0 2 0 0 0 0 0 0 1 0 2 1 0 0 0 0 0 0 0 1 0 1 6 0 0 1 ]
+miss_latency_LD: [binsize: 1 max: 113 count: 1183 average: 37.6915 | standard deviation: 35.8089 | 0 0 0 600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 94 211 147 0 28 22 17 10 4 2 12 8 8 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 3 0 0 1 ]
+miss_latency_ST: [binsize: 1 max: 110 count: 865 average: 20.5237 | standard deviation: 31.2331 | 0 0 0 649 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 37 82 0 6 10 3 3 6 0 4 20 5 0 3 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ]
+miss_latency_IFETCH: [binsize: 1 max: 98 count: 6400 average: 10.5978 | standard deviation: 21.9071 | 0 0 0 5709 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 155 224 231 8 9 5 15 17 16 0 0 1 1 0 1 0 0 1 0 0 0 0 0 0 1 0 1 ]
+miss_latency_NULL: [binsize: 1 max: 113 count: 8448 average: 15.4081 | standard deviation: 27.0652 | 0 0 0 6958 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 29 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 269 472 460 8 43 37 35 30 26 2 16 29 14 0 4 0 0 2 0 0 0 0 0 0 1 0 2 1 0 0 0 0 0 0 0 1 0 1 6 0 0 1 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -49,9 +49,9 @@ miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: N
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 imcomplete_dir_Times: 0
-miss_latency_LD_NULL: [binsize: 2 max: 287 count: 1185 average: 83.8878 | standard deviation: 84.2176 | 0 602 0 0 0 0 0 0 0 12 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 54 155 70 110 81 8 29 3 2 5 2 9 4 12 7 5 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 3 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_NULL: [binsize: 2 max: 297 count: 865 average: 43.8439 | standard deviation: 73.6087 | 0 649 0 0 0 0 0 0 0 12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 35 63 19 18 8 4 0 0 1 1 3 15 1 3 16 4 0 0 0 2 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH_NULL: [binsize: 2 max: 295 count: 6414 average: 20.8227 | standard deviation: 51.5606 | 0 5723 0 0 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 58 190 94 181 91 1 7 1 5 5 5 11 4 15 12 0 0 0 0 0 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_NULL: [binsize: 1 max: 113 count: 1183 average: 37.6915 | standard deviation: 35.8089 | 0 0 0 600 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 94 211 147 0 28 22 17 10 4 2 12 8 8 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 3 0 0 1 ]
+miss_latency_ST_NULL: [binsize: 1 max: 110 count: 865 average: 20.5237 | standard deviation: 31.2331 | 0 0 0 649 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 37 82 0 6 10 3 3 6 0 4 20 5 0 3 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ]
+miss_latency_IFETCH_NULL: [binsize: 1 max: 98 count: 6400 average: 10.5978 | standard deviation: 21.9071 | 0 0 0 5709 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 155 224 231 8 9 5 15 17 16 0 0 1 1 0 1 0 0 1 0 0 0 0 0 0 1 0 1 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -65,10 +65,10 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN
 
 Message Delayed Cycles
 ----------------------
-Total_delay_cycles: [binsize: 1 max: 18 count: 9645 average: 0.0636599 | standard deviation: 0.52686 | 9495 0 1 0 147 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ]
-Total_nonPF_delay_cycles: [binsize: 1 max: 2 count: 6920 average: 0.000289017 | standard deviation: 0.0240441 | 6919 0 1 ]
-  virtual_network_0_delay_cycles: [binsize: 1 max: 18 count: 2725 average: 0.224587 | standard deviation: 0.972266 | 2576 0 0 0 147 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ]
-  virtual_network_1_delay_cycles: [binsize: 1 max: 2 count: 5879 average: 0.000340194 | standard deviation: 0.0260865 | 5878 0 1 ]
+Total_delay_cycles: [binsize: 1 max: 4 count: 9645 average: 0.0609642 | standard deviation: 0.490156 | 9498 0 0 0 147 ]
+Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 6920 average:     0 | standard deviation: 0 | 6920 ]
+  virtual_network_0_delay_cycles: [binsize: 1 max: 4 count: 2725 average: 0.21578 | standard deviation: 0.90398 | 2578 0 0 0 147 ]
+  virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 5879 average:     0 | standard deviation: 0 | 5879 ]
   virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 1041 average:     0 | standard deviation: 0 | 1041 ]
   virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -83,11 +83,11 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 13465
-page_faults: 0
+page_reclaims: 10172
+page_faults: 15
 swaps: 0
-block_inputs: 0
-block_outputs: 0
+block_inputs: 1112
+block_outputs: 80
 
 Network Stats
 -------------
@@ -102,9 +102,9 @@ total_msgs: 37671 total_bytes: 976248
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 1.87549
-  links_utilized_percent_switch_0_link_0: 2.66455 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 1.08644 bw: 16000 base_latency: 1
+links_utilized_percent_switch_0: 3.77969
+  links_utilized_percent_switch_0_link_0: 5.36987 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 2.1895 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_0_link_0_Request_Control: 1041 8328 [ 1041 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_0_link_0_Response_Data: 1490 107280 [ 0 1490 0 0 0 0 0 0 0 0 ] base_latency: 1
@@ -116,9 +116,9 @@ links_utilized_percent_switch_0: 1.87549
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 3.64029
-  links_utilized_percent_switch_1_link_0: 3.69819 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 3.58239 bw: 16000 base_latency: 1
+links_utilized_percent_switch_1: 7.33627
+  links_utilized_percent_switch_1_link_0: 7.45296 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 7.21959 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_1_link_0_Control: 1490 11920 [ 1490 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_1_link_0_Response_Data: 1460 105120 [ 0 1460 0 0 0 0 0 0 0 0 ] base_latency: 1
@@ -132,9 +132,9 @@ links_utilized_percent_switch_1: 3.64029
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 1.76479
-  links_utilized_percent_switch_2_link_0: 0.917835 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 2.61175 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 3.55659
+  links_utilized_percent_switch_2_link_0: 1.84971 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 5.26346 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_2_link_0_Control: 1460 11680 [ 1460 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_2_link_0_Response_Data: 277 19944 [ 0 277 0 0 0 0 0 0 0 0 ] base_latency: 1
@@ -144,10 +144,10 @@ links_utilized_percent_switch_2: 1.76479
 
 switch_3_inlinks: 3
 switch_3_outlinks: 3
-links_utilized_percent_switch_3: 2.42686
-  links_utilized_percent_switch_3_link_0: 2.66455 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_1: 3.69819 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_2: 0.917835 bw: 16000 base_latency: 1
+links_utilized_percent_switch_3: 4.89085
+  links_utilized_percent_switch_3_link_0: 5.36987 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_1: 7.45296 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_2: 1.84971 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_3_link_0_Request_Control: 1041 8328 [ 1041 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_3_link_0_Response_Data: 1490 107280 [ 0 1490 0 0 0 0 0 0 0 0 ] base_latency: 1
@@ -186,8 +186,8 @@ Cache Stats: system.l1_cntrl0.L1DcacheMemory
 
  --- L1Cache ---
  - Event Counts -
-Load [1185 ] 1185
-Ifetch [6414 ] 6414
+Load [1183 ] 1183
+Ifetch [6400 ] 6400
 Store [865 ] 865
 Inv [1041 ] 1041
 L1_Replacement [1354 ] 1354
@@ -216,12 +216,12 @@ I  Inv [0 ] 0
 I  L1_Replacement [556 ] 556
 
 S  Load [0 ] 0
-S  Ifetch [5723 ] 5723
+S  Ifetch [5709 ] 5709
 S  Store [0 ] 0
 S  Inv [325 ] 325
 S  L1_Replacement [362 ] 362
 
-E  Load [454 ] 454
+E  Load [452 ] 452
 E  Ifetch [0 ] 0
 E  Store [71 ] 71
 E  Inv [219 ] 219
@@ -307,7 +307,7 @@ Cache Stats: system.l2_cntrl0.L2cacheMemory
  --- L2Cache ---
  - Event Counts -
 L1_GET_INSTR [691 ] 691
-L1_GETS [585 ] 585
+L1_GETS [583 ] 583
 L1_GETX [216 ] 216
 L1_UPGRADE [0 ] 0
 L1_PUTX [436 ] 436
@@ -364,7 +364,7 @@ MT  L2_Replacement_clean [352 ] 352
 MT  MEM_Inv [0 ] 0
 
 M_I  L1_GET_INSTR [0 ] 0
-M_I  L1_GETS [2 ] 2
+M_I  L1_GETS [0 ] 0
 M_I  L1_GETX [0 ] 0
 M_I  L1_UPGRADE [0 ] 0
 M_I  L1_PUTX [0 ] 0
@@ -518,19 +518,19 @@ Memory controller: system.dir_cntrl0.memBuffer:
   memory_total_requests: 1737
   memory_reads: 1460
   memory_writes: 277
-  memory_refreshes: 582
-  memory_total_request_delays: 821
-  memory_delays_per_request: 0.472654
-  memory_delays_in_input_queue: 84
+  memory_refreshes: 963
+  memory_total_request_delays: 341
+  memory_delays_per_request: 0.196315
+  memory_delays_in_input_queue: 0
   memory_delays_behind_head_of_bank_queue: 0
-  memory_delays_stalled_at_head_of_bank_queue: 737
-  memory_stalls_for_bank_busy: 197
+  memory_delays_stalled_at_head_of_bank_queue: 341
+  memory_stalls_for_bank_busy: 166
   memory_stalls_for_random_busy: 0
   memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 40
-  memory_stalls_for_bus: 242
+  memory_stalls_for_arbitration: 24
+  memory_stalls_for_bus: 147
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 258
+  memory_stalls_for_read_write_turnaround: 4
   memory_stalls_for_read_read_turnaround: 0
   accesses_per_bank: 92  21  45  54  57  174  48  18  19  22  35  37  56  59  44  36  41  24  22  28  32  48  122  36  32  25  35  96  114  185  19  61  
 

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout
index f5d6aede8165dc40014aba289ae6d36b07e51a21..226bed9cc41aba21d538b6d12afbe9f5a48b40a9 100755 (executable)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout
@@ -1,12 +1,14 @@
+Redirecting stdout to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Aug 13 2012 16:55:16
-gem5 started Aug 13 2012 18:08:58
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 14:01:54
+gem5 started Sep  1 2012 14:02:52
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MESI_CMP_directory/gem5.opt -d build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_CMP_directory
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
 Hello world!
-Exiting @ tick 279353 because target called exit()
+Exiting @ tick 138616 because target called exit()

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt
index 1923905554c0ced8af0fc23c44a26add83fe1f8b..682a62f271710edfe8e408a07e0bf7f268e1601e 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt
@@ -1,14 +1,14 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000279                       # Number of seconds simulated
-sim_ticks                                      279353                       # Number of ticks simulated
-final_tick                                     279353                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.000139                       # Number of seconds simulated
+sim_ticks                                      138616                       # Number of ticks simulated
+final_tick                                     138616                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                  30486                       # Simulator instruction rate (inst/s)
-host_op_rate                                    30483                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                1332529                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 233960                       # Number of bytes of host memory used
-host_seconds                                     0.21                       # Real time elapsed on the host
+host_inst_rate                                  27614                       # Simulator instruction rate (inst/s)
+host_op_rate                                    27611                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                 598893                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 266140                       # Number of bytes of host memory used
+host_seconds                                     0.23                       # Real time elapsed on the host
 sim_insts                                        6390                       # Number of instructions simulated
 sim_ops                                          6390                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::cpu.inst             25600                       # Number of bytes read from this memory
@@ -23,16 +23,16 @@ system.physmem.num_reads::cpu.data               1183                       # Nu
 system.physmem.num_reads::total                  7583                       # Number of read requests responded to by this memory
 system.physmem.num_writes::cpu.data               865                       # Number of write requests responded to by this memory
 system.physmem.num_writes::total                  865                       # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst             91640326                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data             31458406                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total               123098732                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst        91640326                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total           91640326                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data            23969673                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total               23969673                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst            91640326                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data            55428078                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total              147068404                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst            184682865                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data             63398165                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total               248081030                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst       184682865                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total          184682865                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::cpu.data            48306112                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total               48306112                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst           184682865                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data           111704277                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total              296387141                       # Total bandwidth to/from this memory (bytes/s)
 system.l1_cntrl0.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl0.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads
@@ -84,7 +84,7 @@ system.cpu.itb.data_misses                          0                       # DT
 system.cpu.itb.data_acv                             0                       # DTB access violations
 system.cpu.itb.data_accesses                        0                       # DTB accesses
 system.cpu.workload.num_syscalls                   17                       # Number of system calls
-system.cpu.numCycles                           279353                       # number of cpu cycles simulated
+system.cpu.numCycles                           138616                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.committedInsts                        6390                       # Number of instructions committed
@@ -103,7 +103,7 @@ system.cpu.num_mem_refs                          2058                       # nu
 system.cpu.num_load_insts                        1190                       # Number of load instructions
 system.cpu.num_store_insts                        868                       # Number of store instructions
 system.cpu.num_idle_cycles                          0                       # Number of idle cycles
-system.cpu.num_busy_cycles                     279353                       # Number of busy cycles
+system.cpu.num_busy_cycles                     138616                       # Number of busy cycles
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini
index adbe5198935911289250e28dcb5ee459ad589cd2..562053d7fc1875235c421f347270f31c79678bb8 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=cpu dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -47,7 +48,6 @@ max_insts_any_thread=0
 max_loads_all_threads=0
 max_loads_any_thread=0
 numThreads=1
-phase=0
 profile=0
 progress_interval=0
 system=system
@@ -78,7 +78,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello
+executable=tests/test-progs/hello/bin/alpha/linux/hello
 gid=100
 input=cin
 max_stack_size=67108864
@@ -118,9 +118,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -129,6 +129,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -180,6 +181,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=true
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -223,6 +225,7 @@ tagArrayBanks=1
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -347,6 +350,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats
index a84c970a41a4fc9f0415c116b97ae6b8fb3e3527..1e3f433da4f7737c78451ed16f05aadbaec675ae 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats
@@ -1,4 +1,4 @@
-Real time: Jul/10/2012 17:36:36
+Real time: Sep/01/2012 14:11:17
 
 Profiler Stats
 --------------
@@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0
 Elapsed_time_in_hours: 0
 Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 0.67
-Virtual_time_in_minutes: 0.0111667
-Virtual_time_in_hours:   0.000186111
-Virtual_time_in_days:    7.75463e-06
+Virtual_time_in_seconds: 0.58
+Virtual_time_in_minutes: 0.00966667
+Virtual_time_in_hours:   0.000161111
+Virtual_time_in_days:    6.71296e-06
 
-Ruby_current_time: 223694
+Ruby_current_time: 117611
 Ruby_start_time: 0
-Ruby_cycles: 223694
+Ruby_cycles: 117611
 
-mbytes_resident: 48.0078
-mbytes_total: 230.77
-resident_ratio: 0.208051
+mbytes_resident: 49.6211
+mbytes_total: 260.035
+resident_ratio: 0.190885
 
-ruby_cycles_executed: [ 223695 ]
+ruby_cycles_executed: [ 117612 ]
 
 Busy Controller Counts:
 L2Cache-0:0  
@@ -30,15 +30,15 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8465 average:     1 | standard deviation: 0 | 0 8465 ]
+sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8449 average:     1 | standard deviation: 0 | 0 8449 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 2 max: 276 count: 8464 average: 25.4289 | standard deviation: 56.47 | 0 7102 0 0 0 0 0 0 0 164 89 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 243 195 220 185 167 17 4 19 5 3 3 5 21 6 1 2 1 0 0 0 0 1 0 0 0 0 0 3 1 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 2 max: 259 count: 1185 average: 62.8405 | standard deviation: 79.0945 | 0 660 0 0 0 0 0 0 0 99 14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 95 54 83 83 64 4 1 2 2 1 3 3 5 6 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 2 max: 233 count: 865 average: 29.4509 | standard deviation: 59.7812 | 0 674 0 0 0 0 0 0 0 0 61 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31 41 10 37 6 1 1 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH: [binsize: 2 max: 276 count: 6414 average: 17.9746 | standard deviation: 47.4906 | 0 5768 0 0 0 0 0 0 0 65 14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 148 110 96 92 66 7 2 16 3 2 0 2 14 0 1 2 0 0 0 0 0 0 0 0 0 0 0 2 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_NULL: [binsize: 2 max: 276 count: 8464 average: 25.4289 | standard deviation: 56.47 | 0 7102 0 0 0 0 0 0 0 164 89 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 243 195 220 185 167 17 4 19 5 3 3 5 21 6 1 2 1 0 0 0 0 1 0 0 0 0 0 3 1 0 0 0 1 0 1 0 0 1 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency: [binsize: 1 max: 113 count: 8448 average: 12.9218 | standard deviation: 24.261 | 0 0 0 7086 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 164 88 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 316 301 294 68 55 13 19 22 2 2 1 2 1 0 0 0 0 0 0 0 3 2 3 0 0 0 0 0 2 0 0 1 1 0 0 0 0 0 0 0 1 ]
+miss_latency_LD: [binsize: 1 max: 113 count: 1183 average: 29.4725 | standard deviation: 33.3864 | 0 0 0 658 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 99 14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 136 145 102 9 2 2 3 3 1 0 0 1 0 0 0 0 0 0 0 0 2 2 1 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 ]
+miss_latency_ST: [binsize: 1 max: 95 count: 865 average: 15.259 | standard deviation: 26.186 | 0 0 0 674 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31 47 44 1 2 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 2 ]
+miss_latency_IFETCH: [binsize: 1 max: 105 count: 6400 average: 9.54656 | standard deviation: 20.3893 | 0 0 0 5754 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 65 14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 180 156 161 12 9 10 14 19 0 0 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 1 ]
+miss_latency_NULL: [binsize: 1 max: 113 count: 8448 average: 12.9218 | standard deviation: 24.261 | 0 0 0 7086 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 164 88 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 316 301 294 68 55 13 19 22 2 2 1 2 1 0 0 0 0 0 0 0 3 2 3 0 0 0 0 0 2 0 0 1 1 0 0 0 0 0 0 0 1 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -49,9 +49,9 @@ miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: N
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 imcomplete_dir_Times: 0
-miss_latency_LD_NULL: [binsize: 2 max: 259 count: 1185 average: 62.8405 | standard deviation: 79.0945 | 0 660 0 0 0 0 0 0 0 99 14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 95 54 83 83 64 4 1 2 2 1 3 3 5 6 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_NULL: [binsize: 2 max: 233 count: 865 average: 29.4509 | standard deviation: 59.7812 | 0 674 0 0 0 0 0 0 0 0 61 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31 41 10 37 6 1 1 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH_NULL: [binsize: 2 max: 276 count: 6414 average: 17.9746 | standard deviation: 47.4906 | 0 5768 0 0 0 0 0 0 0 65 14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 148 110 96 92 66 7 2 16 3 2 0 2 14 0 1 2 0 0 0 0 0 0 0 0 0 0 0 2 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_NULL: [binsize: 1 max: 113 count: 1183 average: 29.4725 | standard deviation: 33.3864 | 0 0 0 658 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 99 14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 136 145 102 9 2 2 3 3 1 0 0 1 0 0 0 0 0 0 0 0 2 2 1 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 ]
+miss_latency_ST_NULL: [binsize: 1 max: 95 count: 865 average: 15.259 | standard deviation: 26.186 | 0 0 0 674 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 60 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31 47 44 1 2 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 2 ]
+miss_latency_IFETCH_NULL: [binsize: 1 max: 105 count: 6400 average: 9.54656 | standard deviation: 20.3893 | 0 0 0 5754 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 65 14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 180 156 161 12 9 10 14 19 0 0 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 1 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -83,11 +83,11 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 13444
-page_faults: 0
+page_reclaims: 10188
+page_faults: 19
 swaps: 0
-block_inputs: 0
-block_outputs: 0
+block_inputs: 1176
+block_outputs: 80
 
 Network Stats
 -------------
@@ -102,9 +102,9 @@ total_msgs: 44262 total_bytes: 1125744
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 5.24221
-  links_utilized_percent_switch_0_link_0: 6.11058 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 4.37383 bw: 16000 base_latency: 1
+links_utilized_percent_switch_0: 9.97058
+  links_utilized_percent_switch_0_link_0: 11.6222 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 8.31895 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_0_link_0_Request_Control: 1362 10896 [ 1362 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_0_link_0_Response_Data: 1109 79848 [ 0 0 1109 0 0 0 0 0 0 0 ] base_latency: 1
@@ -120,9 +120,9 @@ links_utilized_percent_switch_0: 5.24221
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 3.33894
-  links_utilized_percent_switch_1_link_0: 3.04255 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 3.63532 bw: 16000 base_latency: 1
+links_utilized_percent_switch_1: 6.3506
+  links_utilized_percent_switch_1_link_0: 5.78687 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 6.91432 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_1_link_0_Response_Data: 1109 79848 [ 0 0 1109 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_1_link_0_ResponseL2hit_Data: 253 18216 [ 0 0 253 0 0 0 0 0 0 0 ] base_latency: 1
@@ -134,9 +134,9 @@ links_utilized_percent_switch_1: 3.33894
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 1.90327
-  links_utilized_percent_switch_2_link_0: 1.33128 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 2.47526 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 3.61998
+  links_utilized_percent_switch_2_link_0: 2.53208 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 4.70789 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_2_link_0_Request_Control: 1109 8872 [ 0 1109 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_2_link_0_Writeback_Data: 194 13968 [ 0 0 194 0 0 0 0 0 0 0 ] base_latency: 1
@@ -147,10 +147,10 @@ links_utilized_percent_switch_2: 1.90327
 
 switch_3_inlinks: 3
 switch_3_outlinks: 3
-links_utilized_percent_switch_3: 3.4948
-  links_utilized_percent_switch_3_link_0: 6.11058 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_1: 3.04255 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_2: 1.33128 bw: 16000 base_latency: 1
+links_utilized_percent_switch_3: 6.64705
+  links_utilized_percent_switch_3_link_0: 11.6222 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_1: 5.78687 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_2: 2.53208 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_3_link_0_Request_Control: 1362 10896 [ 1362 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_3_link_0_Response_Data: 1109 79848 [ 0 0 1109 0 0 0 0 0 0 0 ] base_latency: 1
@@ -183,8 +183,8 @@ Cache Stats: system.l1_cntrl0.L1DcacheMemory
 
  --- L1Cache ---
  - Event Counts -
-Load [1185 ] 1185
-Ifetch [6414 ] 6414
+Load [1183 ] 1183
+Ifetch [6400 ] 6400
 Store [865 ] 865
 L1_Replacement [1379 ] 1379
 Own_GETX [0 ] 0
@@ -224,8 +224,8 @@ O  Fwd_GETX [0 ] 0
 O  Fwd_GETS [0 ] 0
 O  Fwd_DMA [0 ] 0
 
-M  Load [307 ] 307
-M  Ifetch [3481 ] 3481
+M  Load [305 ] 305
+M  Ifetch [3467 ] 3467
 M  Store [51 ] 51
 M  L1_Replacement [1086 ] 1086
 M  Fwd_GETX [0 ] 0
@@ -1199,19 +1199,19 @@ Memory controller: system.dir_cntrl0.memBuffer:
   memory_total_requests: 1303
   memory_reads: 1109
   memory_writes: 194
-  memory_refreshes: 466
-  memory_total_request_delays: 279
-  memory_delays_per_request: 0.214121
-  memory_delays_in_input_queue: 12
+  memory_refreshes: 817
+  memory_total_request_delays: 115
+  memory_delays_per_request: 0.0882579
+  memory_delays_in_input_queue: 0
   memory_delays_behind_head_of_bank_queue: 0
-  memory_delays_stalled_at_head_of_bank_queue: 267
-  memory_stalls_for_bank_busy: 123
+  memory_delays_stalled_at_head_of_bank_queue: 115
+  memory_stalls_for_bank_busy: 40
   memory_stalls_for_random_busy: 0
   memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 16
-  memory_stalls_for_bus: 58
+  memory_stalls_for_arbitration: 17
+  memory_stalls_for_bus: 55
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 70
+  memory_stalls_for_read_write_turnaround: 3
   memory_stalls_for_read_read_turnaround: 0
   accesses_per_bank: 74  17  45  40  54  99  29  16  19  22  31  34  52  48  38  30  39  21  21  27  28  37  55  22  31  21  32  69  84  103  13  52  
 
@@ -1240,7 +1240,7 @@ I  GETS [979 ] 979
 I  PUTX [0 ] 0
 I  PUTO [0 ] 0
 I  Memory_Data [0 ] 0
-I  Memory_Ack [190 ] 190
+I  Memory_Ack [193 ] 193
 I  DMA_READ [0 ] 0
 I  DMA_WRITE [0 ] 0
 
@@ -1281,7 +1281,7 @@ IS  PUTO_SHARERS [0 ] 0
 IS  Unblock [0 ] 0
 IS  Exclusive_Unblock [979 ] 979
 IS  Memory_Data [979 ] 979
-IS  Memory_Ack [3 ] 3
+IS  Memory_Ack [1 ] 1
 IS  DMA_READ [0 ] 0
 IS  DMA_WRITE [0 ] 0
 
@@ -1328,7 +1328,7 @@ MM  PUTO [0 ] 0
 MM  PUTO_SHARERS [0 ] 0
 MM  Exclusive_Unblock [130 ] 130
 MM  Memory_Data [130 ] 130
-MM  Memory_Ack [1 ] 1
+MM  Memory_Ack [0 ] 0
 MM  DMA_READ [0 ] 0
 MM  DMA_WRITE [0 ] 0
 

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout
index 871e7f56ed93b0e64f3c556e346418f6cfc04744..0b27bcc4390b5f03c8e293c90517a8887c0e446b 100755 (executable)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout
@@ -1,12 +1,14 @@
+Redirecting stdout to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Aug 13 2012 16:57:01
-gem5 started Aug 13 2012 18:09:22
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 14:10:16
+gem5 started Sep  1 2012 14:11:17
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
 Hello world!
-Exiting @ tick 223694 because target called exit()
+Exiting @ tick 117611 because target called exit()

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt
index 46c57187f512a105a5638cf2305756f40a7aa5ab..05d596c9a9c8d172c60549a40cb205819d9a5095 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt
@@ -1,14 +1,14 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000224                       # Number of seconds simulated
-sim_ticks                                      223694                       # Number of ticks simulated
-final_tick                                     223694                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.000118                       # Number of seconds simulated
+sim_ticks                                      117611                       # Number of ticks simulated
+final_tick                                     117611                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                  29074                       # Simulator instruction rate (inst/s)
-host_op_rate                                    29072                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                1017648                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 235156                       # Number of bytes of host memory used
-host_seconds                                     0.22                       # Real time elapsed on the host
+host_inst_rate                                  24451                       # Simulator instruction rate (inst/s)
+host_op_rate                                    24449                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                 449950                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 266280                       # Number of bytes of host memory used
+host_seconds                                     0.26                       # Real time elapsed on the host
 sim_insts                                        6390                       # Number of instructions simulated
 sim_ops                                          6390                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::cpu.inst             25600                       # Number of bytes read from this memory
@@ -23,16 +23,16 @@ system.physmem.num_reads::cpu.data               1183                       # Nu
 system.physmem.num_reads::total                  7583                       # Number of read requests responded to by this memory
 system.physmem.num_writes::cpu.data               865                       # Number of write requests responded to by this memory
 system.physmem.num_writes::total                  865                       # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst            114442050                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data             39285810                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total               153727860                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst       114442050                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total          114442050                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data            29933749                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total               29933749                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst           114442050                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data            69219559                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total              183661609                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst            217666715                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data             74720902                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total               292387617                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst       217666715                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total          217666715                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::cpu.data            56933450                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total               56933450                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst           217666715                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data           131654352                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total              349321067                       # Total bandwidth to/from this memory (bytes/s)
 system.l1_cntrl0.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl0.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads
@@ -84,7 +84,7 @@ system.cpu.itb.data_misses                          0                       # DT
 system.cpu.itb.data_acv                             0                       # DTB access violations
 system.cpu.itb.data_accesses                        0                       # DTB accesses
 system.cpu.workload.num_syscalls                   17                       # Number of system calls
-system.cpu.numCycles                           223694                       # number of cpu cycles simulated
+system.cpu.numCycles                           117611                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.committedInsts                        6390                       # Number of instructions committed
@@ -103,7 +103,7 @@ system.cpu.num_mem_refs                          2058                       # nu
 system.cpu.num_load_insts                        1190                       # Number of load instructions
 system.cpu.num_store_insts                        868                       # Number of store instructions
 system.cpu.num_idle_cycles                          0                       # Number of idle cycles
-system.cpu.num_busy_cycles                     223694                       # Number of busy cycles
+system.cpu.num_busy_cycles                     117611                       # Number of busy cycles
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini
index f5efe89cb07db27cbfa64bdb06ed31188438c02a..490417398d449f786a534a7742f859fd26d7dc93 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=cpu dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -47,7 +48,6 @@ max_insts_any_thread=0
 max_loads_all_threads=0
 max_loads_any_thread=0
 numThreads=1
-phase=0
 profile=0
 progress_interval=0
 system=system
@@ -78,7 +78,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello
+executable=tests/test-progs/hello/bin/alpha/linux/hello
 gid=100
 input=cin
 max_stack_size=67108864
@@ -121,9 +121,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -132,6 +132,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -214,6 +215,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=true
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -229,6 +231,7 @@ slave=system.cpu.icache_port system.cpu.dcache_port
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -330,6 +333,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats
index 16dff144b849c77f4acc8847488049c9ab5bf3e6..6604bf6a9d32212d0e68a0633a3dc338f4411a71 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats
@@ -1,4 +1,4 @@
-Real time: Jul/10/2012 17:50:25
+Real time: Sep/01/2012 13:54:22
 
 Profiler Stats
 --------------
@@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0
 Elapsed_time_in_hours: 0
 Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 0.53
-Virtual_time_in_minutes: 0.00883333
-Virtual_time_in_hours:   0.000147222
-Virtual_time_in_days:    6.13426e-06
+Virtual_time_in_seconds: 0.47
+Virtual_time_in_minutes: 0.00783333
+Virtual_time_in_hours:   0.000130556
+Virtual_time_in_days:    5.43981e-06
 
-Ruby_current_time: 208400
+Ruby_current_time: 93341
 Ruby_start_time: 0
-Ruby_cycles: 208400
+Ruby_cycles: 93341
 
-mbytes_resident: 45.6484
-mbytes_total: 228.203
-resident_ratio: 0.200068
+mbytes_resident: 47.3203
+mbytes_total: 257.496
+resident_ratio: 0.183832
 
-ruby_cycles_executed: [ 208401 ]
+ruby_cycles_executed: [ 93342 ]
 
 Busy Controller Counts:
 L1Cache-0:0  
@@ -29,17 +29,17 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8465 average:     1 | standard deviation: 0 | 0 8465 ]
+sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8449 average:     1 | standard deviation: 0 | 0 8449 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 2 max: 340 count: 8464 average: 23.6219 | standard deviation: 54.4451 | 0 7102 0 0 0 0 203 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 81 188 166 188 149 272 6 5 3 5 20 2 4 9 1 15 3 1 0 0 1 1 0 3 2 1 0 1 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 2 3 18 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 2 max: 327 count: 1185 average: 57.3924 | standard deviation: 73.6654 | 0 660 0 0 0 0 105 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 37 78 73 59 44 91 2 3 1 3 5 2 2 3 0 6 1 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 2 max: 340 count: 865 average: 34.9399 | standard deviation: 73.2706 | 0 674 0 0 0 0 33 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 8 37 38 7 31 0 0 0 0 1 0 2 1 0 2 0 1 0 0 0 1 0 2 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 3 17 0 0 0 0 0 0 0 0 0 1 ]
-miss_latency_IFETCH: [binsize: 2 max: 206 count: 6414 average: 15.8564 | standard deviation: 43.57 | 0 5768 0 0 0 0 65 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 43 102 56 91 98 150 4 2 2 2 14 0 0 5 1 7 2 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_L1Cache: [binsize: 1 max: 2 count: 7102 average:     2 | standard deviation: 0 | 0 0 7102 ]
+miss_latency: [binsize: 1 max: 128 count: 8448 average: 10.0489 | standard deviation: 19.8982 | 0 0 7086 0 0 0 0 0 0 0 0 0 0 203 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 840 107 39 100 1 1 10 0 0 4 0 0 2 0 0 1 0 0 2 0 0 0 0 0 1 3 0 16 0 0 3 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 26 0 0 0 1 0 1 ]
+miss_latency_LD: [binsize: 1 max: 122 count: 1183 average: 22.776 | standard deviation: 26.5223 | 0 0 658 0 0 0 0 0 0 0 0 0 0 105 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 314 33 13 37 0 0 6 0 0 1 0 0 2 0 0 1 0 0 2 0 0 0 0 0 1 0 0 5 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 ]
+miss_latency_ST: [binsize: 1 max: 128 count: 865 average: 14.3214 | standard deviation: 27.0647 | 0 0 674 0 0 0 0 0 0 0 0 0 0 33 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 108 7 1 11 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 22 0 0 0 1 0 1 ]
+miss_latency_IFETCH: [binsize: 1 max: 90 count: 6400 average: 7.11891 | standard deviation: 15.9003 | 0 0 5754 0 0 0 0 0 0 0 0 0 0 65 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 418 67 25 52 0 1 3 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 7 0 0 2 0 0 0 1 ]
+miss_latency_L1Cache: [binsize: 1 max: 2 count: 7086 average:     2 | standard deviation: 0 | 0 0 7086 ]
 miss_latency_L2Cache: [binsize: 1 max: 13 count: 203 average:    13 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 203 ]
-miss_latency_Directory: [binsize: 2 max: 340 count: 1159 average: 157.975 | standard deviation: 26.6537 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 81 188 166 188 149 272 6 5 3 5 20 2 4 9 1 15 3 1 0 0 1 1 0 3 2 1 0 1 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 2 3 18 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 ]
+miss_latency_Directory: [binsize: 1 max: 128 count: 1159 average: 58.742 | standard deviation: 10.823 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 840 107 39 100 1 1 10 0 0 4 0 0 2 0 0 1 0 0 2 0 0 0 0 0 1 3 0 16 0 0 3 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 26 0 0 0 1 0 1 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -47,18 +47,18 @@ miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 avera
 imcomplete_wCC_Times: 0
 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
 miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
-miss_latency_dir_forward_to_first_response: [binsize: 1 max: 158 count: 1 average:   158 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_dir_forward_to_first_response: [binsize: 1 max: 61 count: 1 average:    61 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
 imcomplete_dir_Times: 1158
-miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 660 average:     2 | standard deviation: 0 | 0 0 660 ]
+miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 658 average:     2 | standard deviation: 0 | 0 0 658 ]
 miss_latency_LD_L2Cache: [binsize: 1 max: 13 count: 105 average:    13 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 105 ]
-miss_latency_LD_Directory: [binsize: 2 max: 327 count: 420 average: 155.536 | standard deviation: 18.768 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 37 78 73 59 44 91 2 3 1 3 5 2 2 3 0 6 1 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_Directory: [binsize: 1 max: 122 count: 420 average: 57.769 | standard deviation: 7.42617 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 314 33 13 37 0 0 6 0 0 1 0 0 2 0 0 1 0 0 2 0 0 0 0 0 1 0 0 5 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 ]
 miss_latency_ST_L1Cache: [binsize: 1 max: 2 count: 674 average:     2 | standard deviation: 0 | 0 0 674 ]
 miss_latency_ST_L2Cache: [binsize: 1 max: 13 count: 33 average:    13 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 33 ]
-miss_latency_ST_Directory: [binsize: 2 max: 340 count: 158 average: 180.038 | standard deviation: 59.9794 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 8 37 38 7 31 0 0 0 0 1 0 2 1 0 2 0 1 0 0 0 1 0 2 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 3 17 0 0 0 0 0 0 0 0 0 1 ]
-miss_latency_IFETCH_L1Cache: [binsize: 1 max: 2 count: 5768 average:     2 | standard deviation: 0 | 0 0 5768 ]
+miss_latency_ST_Directory: [binsize: 1 max: 128 count: 158 average: 67.1582 | standard deviation: 23.8632 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 108 7 1 11 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 22 0 0 0 1 0 1 ]
+miss_latency_IFETCH_L1Cache: [binsize: 1 max: 2 count: 5754 average:     2 | standard deviation: 0 | 0 0 5754 ]
 miss_latency_IFETCH_L2Cache: [binsize: 1 max: 13 count: 65 average:    13 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 65 ]
-miss_latency_IFETCH_Directory: [binsize: 2 max: 206 count: 581 average: 153.738 | standard deviation: 5.93543 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 43 102 56 91 98 150 4 2 2 2 14 0 0 5 1 7 2 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_IFETCH_Directory: [binsize: 1 max: 90 count: 581 average: 57.1566 | standard deviation: 4.1703 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 418 67 25 52 0 1 3 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 7 0 0 2 0 0 0 1 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -90,11 +90,11 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 12815
-page_faults: 0
+page_reclaims: 9600
+page_faults: 19
 swaps: 0
-block_inputs: 0
-block_outputs: 0
+block_inputs: 1136
+block_outputs: 80
 
 Network Stats
 -------------
@@ -108,9 +108,9 @@ total_msgs: 20718 total_bytes: 430512
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 2.15187
-  links_utilized_percent_switch_0_link_0: 2.77687 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 1.52687 bw: 16000 base_latency: 1
+links_utilized_percent_switch_0: 4.80443
+  links_utilized_percent_switch_0_link_0: 6.19985 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 3.40901 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_0_link_0_Response_Data: 1159 83448 [ 0 0 0 0 1159 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_0_link_0_Writeback_Control: 1143 9144 [ 0 0 0 1143 0 0 0 0 0 0 ] base_latency: 1
@@ -121,9 +121,9 @@ links_utilized_percent_switch_0: 2.15187
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 2.15187
-  links_utilized_percent_switch_1_link_0: 1.52687 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 2.77687 bw: 16000 base_latency: 1
+links_utilized_percent_switch_1: 4.80443
+  links_utilized_percent_switch_1_link_0: 3.40901 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 6.19985 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_1_link_0_Request_Control: 1159 9272 [ 0 0 1159 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_1_link_0_Writeback_Data: 220 15840 [ 0 0 0 0 0 220 0 0 0 0 ] base_latency: 1
@@ -134,9 +134,9 @@ links_utilized_percent_switch_1: 2.15187
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 2.15187
-  links_utilized_percent_switch_2_link_0: 2.77687 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 1.52687 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 4.80443
+  links_utilized_percent_switch_2_link_0: 6.19985 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 3.40901 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_2_link_0_Response_Data: 1159 83448 [ 0 0 0 0 1159 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_2_link_0_Writeback_Control: 1143 9144 [ 0 0 0 1143 0 0 0 0 0 0 ] base_latency: 1
@@ -183,8 +183,8 @@ Cache Stats: system.l1_cntrl0.L2cacheMemory
 
  --- L1Cache ---
  - Event Counts -
-Load [1193 ] 1193
-Ifetch [6425 ] 6425
+Load [1191 ] 1191
+Ifetch [6411 ] 6411
 Store [892 ] 892
 L2_Replacement [1143 ] 1143
 L1_to_L2 [1354 ] 1354
@@ -253,8 +253,8 @@ O  NC_DMA_GETS [0 ] 0
 O  Invalidate [0 ] 0
 O  Flush_line [0 ] 0
 
-M  Load [306 ] 306
-M  Ifetch [5768 ] 5768
+M  Load [304 ] 304
+M  Ifetch [5754 ] 5754
 M  Store [60 ] 60
 M  L2_Replacement [923 ] 923
 M  L1_to_L2 [1061 ] 1061
@@ -590,26 +590,26 @@ Memory controller: system.dir_cntrl0.memBuffer:
   memory_total_requests: 1379
   memory_reads: 1159
   memory_writes: 220
-  memory_refreshes: 435
-  memory_total_request_delays: 495
-  memory_delays_per_request: 0.358956
-  memory_delays_in_input_queue: 3
+  memory_refreshes: 649
+  memory_total_request_delays: 167
+  memory_delays_per_request: 0.121102
+  memory_delays_in_input_queue: 1
   memory_delays_behind_head_of_bank_queue: 0
-  memory_delays_stalled_at_head_of_bank_queue: 492
-  memory_stalls_for_bank_busy: 124
+  memory_delays_stalled_at_head_of_bank_queue: 166
+  memory_stalls_for_bank_busy: 114
   memory_stalls_for_random_busy: 0
   memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 23
-  memory_stalls_for_bus: 78
+  memory_stalls_for_arbitration: 11
+  memory_stalls_for_bus: 33
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 267
+  memory_stalls_for_read_write_turnaround: 8
   memory_stalls_for_read_read_turnaround: 0
   accesses_per_bank: 75  17  45  40  54  101  33  16  20  22  32  34  53  50  39  31  39  22  21  27  28  38  81  22  31  23  32  72  89  126  14  52  
 
  --- Directory ---
  - Event Counts -
-GETX [189 ] 189
-GETS [1027 ] 1027
+GETX [186 ] 186
+GETS [1022 ] 1022
 PUT [1143 ] 1143
 Unblock [0 ] 0
 UnblockS [0 ] 0
@@ -909,8 +909,8 @@ WB_O_W  DMA_WRITE [0 ] 0
 WB_O_W  Memory_Ack [0 ] 0
 WB_O_W  GETF [0 ] 0
 
-WB_E_W  GETX [4 ] 4
-WB_E_W  GETS [7 ] 7
+WB_E_W  GETX [1 ] 1
+WB_E_W  GETS [2 ] 2
 WB_E_W  PUT [0 ] 0
 WB_E_W  Pf_Replacement [0 ] 0
 WB_E_W  DMA_READ [0 ] 0

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout
index d96b1791c7396d61ae0c6bf025dd924a53aa97f6..d752652feecd2e552fd3c04ebc7de24ecc5bbfe4 100755 (executable)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout
@@ -1,12 +1,14 @@
+Redirecting stdout to build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer/simout
+Redirecting stderr to build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Aug 13 2012 16:53:31
-gem5 started Aug 13 2012 18:06:43
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 13:53:26
+gem5 started Sep  1 2012 13:54:22
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer -re tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
 Hello world!
-Exiting @ tick 208110 because target called exit()
+Exiting @ tick 93341 because target called exit()

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt
index 02a4e6d9eafa8206ea6030165cba6bb50e30e362..c852b744db8bf09921a270fad1494075520c15d4 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt
@@ -1,13 +1,13 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000208                       # Number of seconds simulated
-sim_ticks                                      208110                       # Number of ticks simulated
-final_tick                                     208110                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.000093                       # Number of seconds simulated
+sim_ticks                                       93341                       # Number of ticks simulated
+final_tick                                      93341                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                  43199                       # Simulator instruction rate (inst/s)
-host_op_rate                                    43194                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                1406596                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 231928                       # Number of bytes of host memory used
+host_inst_rate                                  42148                       # Simulator instruction rate (inst/s)
+host_op_rate                                    42141                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                 615474                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 263680                       # Number of bytes of host memory used
 host_seconds                                     0.15                       # Real time elapsed on the host
 sim_insts                                        6390                       # Number of instructions simulated
 sim_ops                                          6390                       # Number of ops (including micro ops) simulated
@@ -23,16 +23,16 @@ system.physmem.num_reads::cpu.data               1183                       # Nu
 system.physmem.num_reads::total                  7583                       # Number of read requests responded to by this memory
 system.physmem.num_writes::cpu.data               865                       # Number of write requests responded to by this memory
 system.physmem.num_writes::total                  865                       # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst            123011869                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data             42227668                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total               165239537                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst       123011869                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total          123011869                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data            32175292                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total               32175292                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst           123011869                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data            74402960                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total              197414829                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst            274263186                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data             94149409                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total               368412595                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst       274263186                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total          274263186                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::cpu.data            71736964                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total               71736964                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst           274263186                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data           165886374                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total              440149559                       # Total bandwidth to/from this memory (bytes/s)
 system.l1_cntrl0.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl0.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads
@@ -90,7 +90,7 @@ system.cpu.itb.data_misses                          0                       # DT
 system.cpu.itb.data_acv                             0                       # DTB access violations
 system.cpu.itb.data_accesses                        0                       # DTB accesses
 system.cpu.workload.num_syscalls                   17                       # Number of system calls
-system.cpu.numCycles                           208110                       # number of cpu cycles simulated
+system.cpu.numCycles                            93341                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.committedInsts                        6390                       # Number of instructions committed
@@ -109,7 +109,7 @@ system.cpu.num_mem_refs                          2058                       # nu
 system.cpu.num_load_insts                        1190                       # Number of load instructions
 system.cpu.num_store_insts                        868                       # Number of store instructions
 system.cpu.num_idle_cycles                          0                       # Number of idle cycles
-system.cpu.num_busy_cycles                     208110                       # Number of busy cycles
+system.cpu.num_busy_cycles                      93341                       # Number of busy cycles
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini
index 0ae04efddfbd3509d0160bdad9975a44235f99f2..e4e42d50cb1104173e294783c2fd5619df15b800 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=cpu dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -47,7 +48,6 @@ max_insts_any_thread=0
 max_loads_all_threads=0
 max_loads_any_thread=0
 numThreads=1
-phase=0
 profile=0
 progress_interval=0
 system=system
@@ -78,7 +78,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello
+executable=tests/test-progs/hello/bin/alpha/linux/hello
 gid=100
 input=cin
 max_stack_size=67108864
@@ -118,9 +118,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -129,6 +129,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -165,6 +166,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=true
+clock=1
 dcache=system.l1_cntrl0.cacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.cacheMemory
@@ -180,6 +182,7 @@ slave=system.cpu.icache_port system.cpu.dcache_port
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -281,6 +284,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats
index a61eed7785727836b86339ac13ba25808d744ffb..12453125c83ed1d172ea280074688ef65da8f1c3 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats
@@ -1,4 +1,4 @@
-Real time: Jul/10/2012 17:16:10
+Real time: Sep/01/2012 13:43:15
 
 Profiler Stats
 --------------
@@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0
 Elapsed_time_in_hours: 0
 Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 0.53
-Virtual_time_in_minutes: 0.00883333
-Virtual_time_in_hours:   0.000147222
-Virtual_time_in_days:    6.13426e-06
+Virtual_time_in_seconds: 0.47
+Virtual_time_in_minutes: 0.00783333
+Virtual_time_in_hours:   0.000130556
+Virtual_time_in_days:    5.43981e-06
 
-Ruby_current_time: 342698
+Ruby_current_time: 143853
 Ruby_start_time: 0
-Ruby_cycles: 342698
+Ruby_cycles: 143853
 
-mbytes_resident: 46.8906
-mbytes_total: 229.363
-resident_ratio: 0.204455
+mbytes_resident: 48.5508
+mbytes_total: 258.688
+resident_ratio: 0.187727
 
-ruby_cycles_executed: [ 342699 ]
+ruby_cycles_executed: [ 143854 ]
 
 Busy Controller Counts:
 L1Cache-0:0  
@@ -29,16 +29,16 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8465 average:     1 | standard deviation: 0 | 0 8465 ]
+sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8449 average:     1 | standard deviation: 0 | 0 8449 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 2 max: 377 count: 8464 average: 39.4889 | standard deviation: 72.9776 | 0 6734 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 6 1 3 6 0 334 211 182 529 243 4 4 0 5 2 15 9 4 14 10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 30 18 15 24 37 2 3 0 0 2 2 1 1 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 2 max: 375 count: 1185 average: 110.608 | standard deviation: 87.0282 | 0 458 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 3 0 1 2 0 147 90 74 255 81 2 1 0 3 0 12 3 1 9 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 4 2 11 4 0 2 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 2 max: 377 count: 865 average: 62.2439 | standard deviation: 89.6671 | 0 592 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 30 31 54 70 0 0 0 1 0 1 0 2 2 4 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 8 3 21 0 0 0 0 0 0 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH: [binsize: 2 max: 285 count: 6414 average: 23.2806 | standard deviation: 57.2661 | 0 5684 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 2 4 0 155 91 77 220 92 2 3 0 1 2 2 6 1 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 20 9 5 10 12 2 1 0 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_L1Cache: [binsize: 1 max: 3 count: 6734 average:     3 | standard deviation: 0 | 0 0 0 6734 ]
-miss_latency_Directory: [binsize: 2 max: 377 count: 1730 average: 181.521 | standard deviation: 26.4115 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 6 1 3 6 0 334 211 182 529 243 4 4 0 5 2 15 9 4 14 10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 30 18 15 24 37 2 3 0 0 2 2 1 1 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 ]
+miss_latency: [binsize: 1 max: 123 count: 8448 average: 16.0281 | standard deviation: 25.9113 | 0 0 0 6718 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 14 10 309 629 543 10 7 7 7 24 22 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 42 37 51 2 1 1 3 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ]
+miss_latency_LD: [binsize: 1 max: 98 count: 1183 average: 41.5604 | standard deviation: 30.9227 | 0 0 0 456 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 9 4 103 318 220 1 4 2 4 12 9 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 10 13 11 1 0 0 0 0 1 ]
+miss_latency_ST: [binsize: 1 max: 95 count: 865 average: 23.8058 | standard deviation: 31.1488 | 0 0 0 592 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 27 63 122 1 2 4 0 3 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 6 30 0 0 1 ]
+miss_latency_IFETCH: [binsize: 1 max: 123 count: 6400 average: 10.2573 | standard deviation: 20.4119 | 0 0 0 5670 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 4 5 179 248 201 8 1 1 3 9 6 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 27 18 10 1 1 0 3 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ]
+miss_latency_L1Cache: [binsize: 1 max: 3 count: 6718 average:     3 | standard deviation: 0 | 0 0 0 6718 ]
+miss_latency_Directory: [binsize: 1 max: 123 count: 1730 average: 66.6191 | standard deviation: 7.72578 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 14 10 309 629 543 10 7 7 7 24 22 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 42 37 51 2 1 1 3 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -47,14 +47,14 @@ imcomplete_wCC_Times: 0
 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
 miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
-miss_latency_dir_first_response_to_completion: [binsize: 1 max: 159 count: 1 average:   159 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_dir_first_response_to_completion: [binsize: 1 max: 61 count: 1 average:    61 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
 imcomplete_dir_Times: 1729
-miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 458 average:     3 | standard deviation: 0 | 0 0 0 458 ]
-miss_latency_LD_Directory: [binsize: 2 max: 375 count: 727 average: 178.4 | standard deviation: 21.0913 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 3 0 1 2 0 147 90 74 255 81 2 1 0 3 0 12 3 1 9 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 4 2 11 4 0 2 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 456 average:     3 | standard deviation: 0 | 0 0 0 456 ]
+miss_latency_LD_Directory: [binsize: 1 max: 98 count: 727 average: 65.7469 | standard deviation: 6.09023 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 9 4 103 318 220 1 4 2 4 12 9 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 10 13 11 1 0 0 0 0 1 ]
 miss_latency_ST_L1Cache: [binsize: 1 max: 3 count: 592 average:     3 | standard deviation: 0 | 0 0 0 592 ]
-miss_latency_ST_Directory: [binsize: 2 max: 377 count: 273 average: 190.714 | standard deviation: 36.5384 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 30 31 54 70 0 0 0 1 0 1 0 2 2 4 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 5 8 3 21 0 0 0 0 0 0 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 5684 average:     3 | standard deviation: 0 | 0 0 0 5684 ]
-miss_latency_IFETCH_Directory: [binsize: 2 max: 285 count: 730 average: 181.192 | standard deviation: 25.9199 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 1 2 4 0 155 91 77 220 92 2 3 0 1 2 2 6 1 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 20 9 5 10 12 2 1 0 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST_Directory: [binsize: 1 max: 95 count: 273 average: 68.9231 | standard deviation: 9.83653 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 27 63 122 1 2 4 0 3 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 6 30 0 0 1 ]
+miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 5670 average:     3 | standard deviation: 0 | 0 0 0 5670 ]
+miss_latency_IFETCH_Directory: [binsize: 1 max: 123 count: 730 average: 66.626 | standard deviation: 8.11043 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 4 5 179 248 201 8 1 1 3 9 6 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 27 18 10 1 1 0 3 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -86,11 +86,11 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 13155
+page_reclaims: 9931
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 80
 
 Network Stats
 -------------
@@ -103,9 +103,9 @@ total_msgs: 20736 total_bytes: 829440
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 2.52117
-  links_utilized_percent_switch_0_link_0: 2.5235 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 2.51884 bw: 16000 base_latency: 1
+links_utilized_percent_switch_0: 6.00613
+  links_utilized_percent_switch_0_link_0: 6.01169 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 6.00057 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_0_link_0_Response_Data: 1730 124560 [ 0 0 0 0 1730 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_0_link_0_Writeback_Control: 1726 13808 [ 0 0 0 1726 0 0 0 0 0 0 ] base_latency: 1
@@ -114,9 +114,9 @@ links_utilized_percent_switch_0: 2.52117
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 2.52117
-  links_utilized_percent_switch_1_link_0: 2.51884 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 2.5235 bw: 16000 base_latency: 1
+links_utilized_percent_switch_1: 6.00613
+  links_utilized_percent_switch_1_link_0: 6.00057 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 6.01169 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_1_link_0_Control: 1730 13840 [ 0 0 1730 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_1_link_0_Data: 1726 124272 [ 0 0 1726 0 0 0 0 0 0 0 ] base_latency: 1
@@ -125,9 +125,9 @@ links_utilized_percent_switch_1: 2.52117
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 2.52117
-  links_utilized_percent_switch_2_link_0: 2.5235 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 2.51884 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 6.00613
+  links_utilized_percent_switch_2_link_0: 6.01169 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 6.00057 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_2_link_0_Response_Data: 1730 124560 [ 0 0 0 0 1730 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_2_link_0_Writeback_Control: 1726 13808 [ 0 0 0 1726 0 0 0 0 0 0 ] base_latency: 1
@@ -149,8 +149,8 @@ Cache Stats: system.l1_cntrl0.cacheMemory
 
  --- L1Cache ---
  - Event Counts -
-Load [1185 ] 1185
-Ifetch [6414 ] 6414
+Load [1183 ] 1183
+Ifetch [6400 ] 6400
 Store [865 ] 865
 Data [1730 ] 1730
 Fwd_GETX [0 ] 0
@@ -168,8 +168,8 @@ I  Replacement [0 ] 0
 
 II  Writeback_Nack [0 ] 0
 
-M  Load [458 ] 458
-M  Ifetch [5684 ] 5684
+M  Load [456 ] 456
+M  Ifetch [5670 ] 5670
 M  Store [592 ] 592
 M  Fwd_GETX [0 ] 0
 M  Inv [0 ] 0
@@ -190,19 +190,19 @@ Memory controller: system.dir_cntrl0.memBuffer:
   memory_total_requests: 3456
   memory_reads: 1730
   memory_writes: 1726
-  memory_refreshes: 714
-  memory_total_request_delays: 4411
-  memory_delays_per_request: 1.27633
-  memory_delays_in_input_queue: 1083
-  memory_delays_behind_head_of_bank_queue: 8
-  memory_delays_stalled_at_head_of_bank_queue: 3320
-  memory_stalls_for_bank_busy: 1509
+  memory_refreshes: 999
+  memory_total_request_delays: 3048
+  memory_delays_per_request: 0.881944
+  memory_delays_in_input_queue: 0
+  memory_delays_behind_head_of_bank_queue: 11
+  memory_delays_stalled_at_head_of_bank_queue: 3037
+  memory_stalls_for_bank_busy: 1500
   memory_stalls_for_random_busy: 0
   memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 99
-  memory_stalls_for_bus: 1677
+  memory_stalls_for_arbitration: 107
+  memory_stalls_for_bus: 1375
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 35
+  memory_stalls_for_read_write_turnaround: 55
   memory_stalls_for_read_read_turnaround: 0
   accesses_per_bank: 162  36  92  110  106  362  98  36  32  34  83  92  110  104  84  86  83  53  50  58  64  124  212  72  66  50  122  190  220  325  42  98  
 

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simout
index d2962a54f292ca1ca191cea51ba55ed67f317442..c7e4dff49c61cdc77b07aa747859909ec9728c0e 100755 (executable)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simout
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simout
@@ -1,12 +1,14 @@
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Aug 13 2012 16:51:51
-gem5 started Aug 13 2012 17:17:12
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 13:41:29
+gem5 started Sep  1 2012 13:43:15
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
 Hello world!
-Exiting @ tick 342698 because target called exit()
+Exiting @ tick 143853 because target called exit()

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt
index 5041c7f6ade6c8f753a5d2d70bad42dee08088c1..c15797da9019e696f48c30b6fff0c6ef5e611876 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt
@@ -1,14 +1,14 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000343                       # Number of seconds simulated
-sim_ticks                                      342698                       # Number of ticks simulated
-final_tick                                     342698                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.000144                       # Number of seconds simulated
+sim_ticks                                      143853                       # Number of ticks simulated
+final_tick                                     143853                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                  30637                       # Simulator instruction rate (inst/s)
-host_op_rate                                    30634                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                1642762                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 233644                       # Number of bytes of host memory used
-host_seconds                                     0.21                       # Real time elapsed on the host
+host_inst_rate                                  43143                       # Simulator instruction rate (inst/s)
+host_op_rate                                    43136                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                 970941                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 264900                       # Number of bytes of host memory used
+host_seconds                                     0.15                       # Real time elapsed on the host
 sim_insts                                        6390                       # Number of instructions simulated
 sim_ops                                          6390                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::cpu.inst             25600                       # Number of bytes read from this memory
@@ -23,16 +23,16 @@ system.physmem.num_reads::cpu.data               1183                       # Nu
 system.physmem.num_reads::total                  7583                       # Number of read requests responded to by this memory
 system.physmem.num_writes::cpu.data               865                       # Number of write requests responded to by this memory
 system.physmem.num_writes::total                  865                       # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst             74701341                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data             25643570                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total               100344910                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst        74701341                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total           74701341                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data            19539069                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total               19539069                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst            74701341                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data            45182639                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total              119883979                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst            177959445                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data             61090141                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total               239049585                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst       177959445                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total          177959445                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::cpu.data            46547517                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total               46547517                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst           177959445                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data           107637658                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total              285597103                       # Total bandwidth to/from this memory (bytes/s)
 system.l1_cntrl0.cacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl0.cacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl0.cacheMemory.num_tag_array_reads            0                       # number of tag array reads
@@ -72,7 +72,7 @@ system.cpu.itb.data_misses                          0                       # DT
 system.cpu.itb.data_acv                             0                       # DTB access violations
 system.cpu.itb.data_accesses                        0                       # DTB accesses
 system.cpu.workload.num_syscalls                   17                       # Number of system calls
-system.cpu.numCycles                           342698                       # number of cpu cycles simulated
+system.cpu.numCycles                           143853                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.committedInsts                        6390                       # Number of instructions committed
@@ -91,7 +91,7 @@ system.cpu.num_mem_refs                          2058                       # nu
 system.cpu.num_load_insts                        1190                       # Number of load instructions
 system.cpu.num_store_insts                        868                       # Number of store instructions
 system.cpu.num_idle_cycles                          0                       # Number of idle cycles
-system.cpu.num_busy_cycles                     342698                       # Number of busy cycles
+system.cpu.num_busy_cycles                     143853                       # Number of busy cycles
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini
index cc1d6c0b9ec96655a47bac95e2d76b6cdef89d3a..ae9a50a52dd35dca60e4c7209650d086f94e4187 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=cpu dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -47,7 +48,6 @@ max_insts_any_thread=0
 max_loads_all_threads=0
 max_loads_any_thread=0
 numThreads=1
-phase=0
 profile=0
 progress_interval=0
 system=system
@@ -78,7 +78,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello
+executable=tests/test-progs/hello/bin/alpha/tru64/hello
 gid=100
 input=cin
 max_stack_size=67108864
@@ -119,9 +119,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -130,6 +130,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -183,6 +184,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=true
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -227,6 +229,7 @@ tagArrayBanks=1
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -351,6 +354,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats
index 48e6b0fca2ee17a614a2743a00b28c059985e68f..8f6a28b1587a83086035d7e3797c3952525f01dc 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats
@@ -1,4 +1,4 @@
-Real time: Jul/10/2012 17:31:25
+Real time: Sep/01/2012 14:03:04
 
 Profiler Stats
 --------------
@@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0
 Elapsed_time_in_hours: 0
 Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 0.47
-Virtual_time_in_minutes: 0.00783333
-Virtual_time_in_hours:   0.000130556
-Virtual_time_in_days:    5.43981e-06
+Virtual_time_in_seconds: 0.41
+Virtual_time_in_minutes: 0.00683333
+Virtual_time_in_hours:   0.000113889
+Virtual_time_in_days:    4.74537e-06
 
-Ruby_current_time: 104867
+Ruby_current_time: 52575
 Ruby_start_time: 0
-Ruby_cycles: 104867
+Ruby_cycles: 52575
 
-mbytes_resident: 45.3203
-mbytes_total: 228.348
-resident_ratio: 0.198488
+mbytes_resident: 46.8984
+mbytes_total: 257.648
+resident_ratio: 0.182086
 
-ruby_cycles_executed: [ 104868 ]
+ruby_cycles_executed: [ 52576 ]
 
 Busy Controller Counts:
 L1Cache-0:0  
@@ -34,11 +34,11 @@ sequencer_requests_outstanding: [binsize: 1 max: 1 count: 3295 average:     1 |
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 2 max: 275 count: 3294 average: 30.8358 | standard deviation: 62.2139 | 0 2722 0 0 0 0 0 0 0 23 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 62 131 87 117 74 6 17 4 2 2 1 11 10 5 4 3 5 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 2 max: 235 count: 415 average: 80.7349 | standard deviation: 83.1868 | 0 211 0 0 0 0 0 0 0 11 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 24 46 24 49 14 4 7 4 1 1 0 5 0 4 0 3 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 2 max: 275 count: 294 average: 39.8435 | standard deviation: 69.7713 | 0 226 0 0 0 0 0 0 0 3 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 19 3 12 8 0 8 0 0 0 0 1 1 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH: [binsize: 2 max: 267 count: 2585 average: 21.8004 | standard deviation: 52.7361 | 0 2285 0 0 0 0 0 0 0 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 30 66 60 56 52 2 2 0 1 1 1 5 9 1 1 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_NULL: [binsize: 2 max: 275 count: 3294 average: 30.8358 | standard deviation: 62.2139 | 0 2722 0 0 0 0 0 0 0 23 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 62 131 87 117 74 6 17 4 2 2 1 11 10 5 4 3 5 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency: [binsize: 1 max: 116 count: 3294 average: 14.9608 | standard deviation: 26.5582 | 0 0 0 2722 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 23 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 107 178 170 5 17 15 15 11 9 0 5 5 3 0 0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_LD: [binsize: 1 max: 116 count: 415 average: 36.7566 | standard deviation: 35.7458 | 0 0 0 211 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 24 70 54 1 10 7 8 4 0 0 4 4 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_ST: [binsize: 1 max: 106 count: 294 average: 18.915 | standard deviation: 29.8083 | 0 0 0 226 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 17 15 0 6 5 3 2 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_IFETCH: [binsize: 1 max: 89 count: 2585 average: 11.012 | standard deviation: 22.3546 | 0 0 0 2285 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 71 91 101 4 1 3 4 5 9 0 0 0 0 0 0 0 1 1 ]
+miss_latency_NULL: [binsize: 1 max: 116 count: 3294 average: 14.9608 | standard deviation: 26.5582 | 0 0 0 2722 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 23 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 107 178 170 5 17 15 15 11 9 0 5 5 3 0 0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 1 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -49,9 +49,9 @@ miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: N
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 imcomplete_dir_Times: 0
-miss_latency_LD_NULL: [binsize: 2 max: 235 count: 415 average: 80.7349 | standard deviation: 83.1868 | 0 211 0 0 0 0 0 0 0 11 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 24 46 24 49 14 4 7 4 1 1 0 5 0 4 0 3 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_NULL: [binsize: 2 max: 275 count: 294 average: 39.8435 | standard deviation: 69.7713 | 0 226 0 0 0 0 0 0 0 3 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 19 3 12 8 0 8 0 0 0 0 1 1 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH_NULL: [binsize: 2 max: 267 count: 2585 average: 21.8004 | standard deviation: 52.7361 | 0 2285 0 0 0 0 0 0 0 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 30 66 60 56 52 2 2 0 1 1 1 5 9 1 1 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_NULL: [binsize: 1 max: 116 count: 415 average: 36.7566 | standard deviation: 35.7458 | 0 0 0 211 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 24 70 54 1 10 7 8 4 0 0 4 4 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_ST_NULL: [binsize: 1 max: 106 count: 294 average: 18.915 | standard deviation: 29.8083 | 0 0 0 226 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 17 15 0 6 5 3 2 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_IFETCH_NULL: [binsize: 1 max: 89 count: 2585 average: 11.012 | standard deviation: 22.3546 | 0 0 0 2285 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 71 91 101 4 1 3 4 5 9 0 0 0 0 0 0 0 1 1 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -65,10 +65,10 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN
 
 Message Delayed Cycles
 ----------------------
-Total_delay_cycles: [binsize: 1 max: 18 count: 3612 average: 0.0625692 | standard deviation: 0.620431 | 3562 0 1 0 47 0 0 0 0 0 0 0 0 0 0 0 0 0 2 ]
-Total_nonPF_delay_cycles: [binsize: 1 max: 2 count: 2644 average: 0.00075643 | standard deviation: 0.0389028 | 2643 0 1 ]
-  virtual_network_0_delay_cycles: [binsize: 1 max: 18 count: 968 average: 0.231405 | standard deviation: 1.18112 | 919 0 0 0 47 0 0 0 0 0 0 0 0 0 0 0 0 0 2 ]
-  virtual_network_1_delay_cycles: [binsize: 1 max: 2 count: 2213 average: 0.000903751 | standard deviation: 0.0425243 | 2212 0 1 ]
+Total_delay_cycles: [binsize: 1 max: 4 count: 3612 average: 0.0520487 | standard deviation: 0.453608 | 3565 0 0 0 47 ]
+Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 2644 average:     0 | standard deviation: 0 | 2644 ]
+  virtual_network_0_delay_cycles: [binsize: 1 max: 4 count: 968 average: 0.194215 | standard deviation: 0.860485 | 921 0 0 0 47 ]
+  virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 2213 average:     0 | standard deviation: 0 | 2213 ]
   virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 431 average:     0 | standard deviation: 0 | 431 ]
   virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -83,11 +83,11 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 12765
+page_reclaims: 9494
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 80
 
 Network Stats
 -------------
@@ -102,9 +102,9 @@ total_msgs: 14094 total_bytes: 368304
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 1.90098
-  links_utilized_percent_switch_0_link_0: 2.71916 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 1.0828 bw: 16000 base_latency: 1
+links_utilized_percent_switch_0: 3.79173
+  links_utilized_percent_switch_0_link_0: 5.42368 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 2.15977 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_0_link_0_Request_Control: 431 3448 [ 431 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_0_link_0_Response_Data: 572 41184 [ 0 572 0 0 0 0 0 0 0 0 ] base_latency: 1
@@ -116,9 +116,9 @@ links_utilized_percent_switch_0: 1.90098
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 3.65844
-  links_utilized_percent_switch_1_link_0: 3.68705 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 3.62984 bw: 16000 base_latency: 1
+links_utilized_percent_switch_1: 7.29719
+  links_utilized_percent_switch_1_link_0: 7.35426 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 7.24013 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_1_link_0_Control: 572 4576 [ 572 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_1_link_0_Response_Data: 547 39384 [ 0 547 0 0 0 0 0 0 0 0 ] base_latency: 1
@@ -132,9 +132,9 @@ links_utilized_percent_switch_1: 3.65844
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 1.75746
-  links_utilized_percent_switch_2_link_0: 0.910677 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 2.60425 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 3.50547
+  links_utilized_percent_switch_2_link_0: 1.81645 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 5.19448 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_2_link_0_Control: 547 4376 [ 547 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_2_link_0_Response_Data: 103 7416 [ 0 103 0 0 0 0 0 0 0 0 ] base_latency: 1
@@ -144,10 +144,10 @@ links_utilized_percent_switch_2: 1.75746
 
 switch_3_inlinks: 3
 switch_3_outlinks: 3
-links_utilized_percent_switch_3: 2.43896
-  links_utilized_percent_switch_3_link_0: 2.71916 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_1: 3.68705 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_2: 0.910677 bw: 16000 base_latency: 1
+links_utilized_percent_switch_3: 4.8648
+  links_utilized_percent_switch_3_link_0: 5.42368 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_1: 7.35426 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_2: 1.81645 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_3_link_0_Request_Control: 431 3448 [ 431 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_3_link_0_Response_Data: 572 41184 [ 0 572 0 0 0 0 0 0 0 0 ] base_latency: 1
@@ -307,8 +307,8 @@ Cache Stats: system.l2_cntrl0.L2cacheMemory
  --- L2Cache ---
  - Event Counts -
 L1_GET_INSTR [300 ] 300
-L1_GETS [205 ] 205
-L1_GETX [69 ] 69
+L1_GETS [204 ] 204
+L1_GETX [68 ] 68
 L1_UPGRADE [0 ] 0
 L1_PUTX [124 ] 124
 L1_PUTX_old [0 ] 0
@@ -364,8 +364,8 @@ MT  L2_Replacement_clean [141 ] 141
 MT  MEM_Inv [0 ] 0
 
 M_I  L1_GET_INSTR [0 ] 0
-M_I  L1_GETS [1 ] 1
-M_I  L1_GETX [1 ] 1
+M_I  L1_GETS [0 ] 0
+M_I  L1_GETX [0 ] 0
 M_I  L1_UPGRADE [0 ] 0
 M_I  L1_PUTX [0 ] 0
 M_I  L1_PUTX_old [0 ] 0
@@ -518,19 +518,19 @@ Memory controller: system.dir_cntrl0.memBuffer:
   memory_total_requests: 650
   memory_reads: 547
   memory_writes: 103
-  memory_refreshes: 219
-  memory_total_request_delays: 306
-  memory_delays_per_request: 0.470769
-  memory_delays_in_input_queue: 27
+  memory_refreshes: 365
+  memory_total_request_delays: 117
+  memory_delays_per_request: 0.18
+  memory_delays_in_input_queue: 0
   memory_delays_behind_head_of_bank_queue: 0
-  memory_delays_stalled_at_head_of_bank_queue: 279
-  memory_stalls_for_bank_busy: 56
+  memory_delays_stalled_at_head_of_bank_queue: 117
+  memory_stalls_for_bank_busy: 63
   memory_stalls_for_random_busy: 0
   memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 9
-  memory_stalls_for_bus: 94
+  memory_stalls_for_arbitration: 8
+  memory_stalls_for_bus: 46
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 120
+  memory_stalls_for_read_write_turnaround: 0
   memory_stalls_for_read_read_turnaround: 0
   accesses_per_bank: 26  14  0  49  21  21  42  25  6  4  7  4  24  42  26  3  5  7  7  18  10  29  15  50  19  5  6  16  14  24  19  92  
 

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout
index 9a67c296327b1f6295b497c409d2d20a5ee41adb..b08e9f127e3106031768b2b7e2b324b80b3ffe08 100755 (executable)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout
@@ -1,12 +1,14 @@
+Redirecting stdout to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 28 2012 11:30:15
-gem5 started Jul 28 2012 11:35:39
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 14:01:54
+gem5 started Sep  1 2012 14:03:04
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MESI_CMP_directory/gem5.opt -d build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
 Hello world!
-Exiting @ tick 104867 because target called exit()
+Exiting @ tick 52575 because target called exit()

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt
index 198022e25e39faf45b4aefb90e1a629b273fee4b..84321c81eeebec651c7d36372068914b2ed98edd 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt
@@ -1,14 +1,14 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000105                       # Number of seconds simulated
-sim_ticks                                      104867                       # Number of ticks simulated
-final_tick                                     104867                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.000053                       # Number of seconds simulated
+sim_ticks                                       52575                       # Number of ticks simulated
+final_tick                                      52575                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                  22041                       # Simulator instruction rate (inst/s)
-host_op_rate                                    22037                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                 896641                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 231628                       # Number of bytes of host memory used
-host_seconds                                     0.12                       # Real time elapsed on the host
+host_inst_rate                                  27172                       # Simulator instruction rate (inst/s)
+host_op_rate                                    27165                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                 554084                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 263836                       # Number of bytes of host memory used
+host_seconds                                     0.10                       # Real time elapsed on the host
 sim_insts                                        2577                       # Number of instructions simulated
 sim_ops                                          2577                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::cpu.inst             10340                       # Number of bytes read from this memory
@@ -23,16 +23,16 @@ system.physmem.num_reads::cpu.data                415                       # Nu
 system.physmem.num_reads::total                  3000                       # Number of read requests responded to by this memory
 system.physmem.num_writes::cpu.data               294                       # Number of write requests responded to by this memory
 system.physmem.num_writes::total                  294                       # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst             98601085                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data             28760239                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total               127361324                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst        98601085                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total           98601085                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data            19624858                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total               19624858                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst            98601085                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data            48385097                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total              146986182                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst            196671422                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data             57365668                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total               254037090                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst       196671422                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total          196671422                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::cpu.data            39144080                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total               39144080                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst           196671422                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data            96509748                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total              293181170                       # Total bandwidth to/from this memory (bytes/s)
 system.l1_cntrl0.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl0.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads
@@ -84,7 +84,7 @@ system.cpu.itb.data_misses                          0                       # DT
 system.cpu.itb.data_acv                             0                       # DTB access violations
 system.cpu.itb.data_accesses                        0                       # DTB accesses
 system.cpu.workload.num_syscalls                    4                       # Number of system calls
-system.cpu.numCycles                           104867                       # number of cpu cycles simulated
+system.cpu.numCycles                            52575                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.committedInsts                        2577                       # Number of instructions committed
@@ -103,7 +103,7 @@ system.cpu.num_mem_refs                           717                       # nu
 system.cpu.num_load_insts                         419                       # Number of load instructions
 system.cpu.num_store_insts                        298                       # Number of store instructions
 system.cpu.num_idle_cycles                          0                       # Number of idle cycles
-system.cpu.num_busy_cycles                     104867                       # Number of busy cycles
+system.cpu.num_busy_cycles                      52575                       # Number of busy cycles
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini
index e62cfb19969bd760a0c0f3ebcdd45bb11a65a3be..2e8369b1edf2313ded31a607bc873a091e3cc682 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=cpu dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -47,7 +48,6 @@ max_insts_any_thread=0
 max_loads_all_threads=0
 max_loads_any_thread=0
 numThreads=1
-phase=0
 profile=0
 progress_interval=0
 system=system
@@ -78,7 +78,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello
+executable=tests/test-progs/hello/bin/alpha/tru64/hello
 gid=100
 input=cin
 max_stack_size=67108864
@@ -118,9 +118,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -129,6 +129,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -180,6 +181,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=true
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -223,6 +225,7 @@ tagArrayBanks=1
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -347,6 +350,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats
index 8dafccdfe530a76408abb2f3ddb059749ff37653..9e474b916e95d709247f1f871b1a82a4e31bad48 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats
@@ -1,4 +1,4 @@
-Real time: Jul/10/2012 17:37:10
+Real time: Sep/01/2012 14:11:29
 
 Profiler Stats
 --------------
@@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0
 Elapsed_time_in_hours: 0
 Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 0.48
-Virtual_time_in_minutes: 0.008
-Virtual_time_in_hours:   0.000133333
-Virtual_time_in_days:    5.55556e-06
+Virtual_time_in_seconds: 0.43
+Virtual_time_in_minutes: 0.00716667
+Virtual_time_in_hours:   0.000119444
+Virtual_time_in_days:    4.97685e-06
 
-Ruby_current_time: 85418
+Ruby_current_time: 44968
 Ruby_start_time: 0
-Ruby_cycles: 85418
+Ruby_cycles: 44968
 
-mbytes_resident: 45.4062
-mbytes_total: 228.586
-resident_ratio: 0.198657
+mbytes_resident: 46.9961
+mbytes_total: 257.863
+resident_ratio: 0.182313
 
-ruby_cycles_executed: [ 85419 ]
+ruby_cycles_executed: [ 44969 ]
 
 Busy Controller Counts:
 L2Cache-0:0  
@@ -34,11 +34,11 @@ sequencer_requests_outstanding: [binsize: 1 max: 1 count: 3295 average:     1 |
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 2 max: 281 count: 3294 average: 24.9314 | standard deviation: 56.0488 | 0 2784 0 0 0 0 0 0 0 67 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 80 91 84 78 63 5 2 2 1 3 3 0 2 2 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 2 max: 277 count: 415 average: 60.9277 | standard deviation: 78.686 | 0 233 0 0 0 0 0 0 0 40 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31 17 41 19 25 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 2 max: 245 count: 294 average: 28.5238 | standard deviation: 59.597 | 0 236 0 0 0 0 0 0 0 0 15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 17 3 12 7 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH: [binsize: 2 max: 281 count: 2585 average: 18.7439 | standard deviation: 48.5885 | 0 2315 0 0 0 0 0 0 0 27 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 49 57 40 47 31 2 2 2 1 3 2 0 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_NULL: [binsize: 2 max: 281 count: 3294 average: 24.9314 | standard deviation: 56.0488 | 0 2784 0 0 0 0 0 0 0 67 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 80 91 84 78 63 5 2 2 1 3 3 0 2 2 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency: [binsize: 1 max: 115 count: 3294 average: 12.6515 | standard deviation: 24.0471 | 0 0 0 2784 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 67 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 126 124 112 20 18 9 5 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 2 1 0 1 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_LD: [binsize: 1 max: 115 count: 415 average: 28.8699 | standard deviation: 33.4854 | 0 0 0 233 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 51 44 27 6 0 2 3 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_ST: [binsize: 1 max: 82 count: 294 average: 14.5476 | standard deviation: 25.7644 | 0 0 0 236 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 19 10 12 1 0 0 0 1 ]
+miss_latency_IFETCH: [binsize: 1 max: 101 count: 2585 average: 9.83211 | standard deviation: 20.7704 | 0 0 0 2315 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 27 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 75 80 66 4 6 6 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_NULL: [binsize: 1 max: 115 count: 3294 average: 12.6515 | standard deviation: 24.0471 | 0 0 0 2784 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 67 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 126 124 112 20 18 9 5 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 2 1 0 1 0 0 0 0 0 0 0 0 0 0 1 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -49,9 +49,9 @@ miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: N
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 imcomplete_dir_Times: 0
-miss_latency_LD_NULL: [binsize: 2 max: 277 count: 415 average: 60.9277 | standard deviation: 78.686 | 0 233 0 0 0 0 0 0 0 40 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 31 17 41 19 25 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_NULL: [binsize: 2 max: 245 count: 294 average: 28.5238 | standard deviation: 59.597 | 0 236 0 0 0 0 0 0 0 0 15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 17 3 12 7 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH_NULL: [binsize: 2 max: 281 count: 2585 average: 18.7439 | standard deviation: 48.5885 | 0 2315 0 0 0 0 0 0 0 27 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 49 57 40 47 31 2 2 2 1 3 2 0 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_NULL: [binsize: 1 max: 115 count: 415 average: 28.8699 | standard deviation: 33.4854 | 0 0 0 233 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 40 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 51 44 27 6 0 2 3 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_ST_NULL: [binsize: 1 max: 82 count: 294 average: 14.5476 | standard deviation: 25.7644 | 0 0 0 236 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 19 10 12 1 0 0 0 1 ]
+miss_latency_IFETCH_NULL: [binsize: 1 max: 101 count: 2585 average: 9.83211 | standard deviation: 20.7704 | 0 0 0 2315 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 27 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 75 80 66 4 6 6 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -83,11 +83,11 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 12740
+page_reclaims: 9533
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 80
 
 Network Stats
 -------------
@@ -102,9 +102,9 @@ total_msgs: 16577 total_bytes: 422728
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 5.15524
-  links_utilized_percent_switch_0_link_0: 6.00225 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 4.30823 bw: 16000 base_latency: 1
+links_utilized_percent_switch_0: 9.79252
+  links_utilized_percent_switch_0_link_0: 11.4014 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 8.1836 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_0_link_0_Request_Control: 510 4080 [ 510 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_0_link_0_Response_Data: 423 30456 [ 0 0 423 0 0 0 0 0 0 0 ] base_latency: 1
@@ -120,9 +120,9 @@ links_utilized_percent_switch_0: 5.15524
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 3.2581
-  links_utilized_percent_switch_1_link_0: 2.98064 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 3.53555 bw: 16000 base_latency: 1
+links_utilized_percent_switch_1: 6.18885
+  links_utilized_percent_switch_1_link_0: 5.6618 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 6.71589 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_1_link_0_Response_Data: 423 30456 [ 0 0 423 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_1_link_0_ResponseL2hit_Data: 87 6264 [ 0 0 87 0 0 0 0 0 0 0 ] base_latency: 1
@@ -134,9 +134,9 @@ links_utilized_percent_switch_1: 3.2581
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 1.89685
-  links_utilized_percent_switch_2_link_0: 1.327 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 2.46669 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 3.60312
+  links_utilized_percent_switch_2_link_0: 2.52068 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 4.68555 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_2_link_0_Request_Control: 423 3384 [ 0 423 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_2_link_0_Writeback_Data: 76 5472 [ 0 0 76 0 0 0 0 0 0 0 ] base_latency: 1
@@ -147,10 +147,10 @@ links_utilized_percent_switch_2: 1.89685
 
 switch_3_inlinks: 3
 switch_3_outlinks: 3
-links_utilized_percent_switch_3: 3.43682
-  links_utilized_percent_switch_3_link_0: 6.00225 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_1: 2.98064 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_2: 1.32759 bw: 16000 base_latency: 1
+links_utilized_percent_switch_3: 6.52835
+  links_utilized_percent_switch_3_link_0: 11.4014 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_1: 5.6618 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_2: 2.52179 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_3_link_0_Request_Control: 510 4080 [ 510 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_3_link_0_Response_Data: 423 30456 [ 0 0 423 0 0 0 0 0 0 0 ] base_latency: 1
@@ -1199,19 +1199,19 @@ Memory controller: system.dir_cntrl0.memBuffer:
   memory_total_requests: 499
   memory_reads: 423
   memory_writes: 76
-  memory_refreshes: 178
-  memory_total_request_delays: 116
-  memory_delays_per_request: 0.232465
-  memory_delays_in_input_queue: 2
+  memory_refreshes: 313
+  memory_total_request_delays: 77
+  memory_delays_per_request: 0.154309
+  memory_delays_in_input_queue: 0
   memory_delays_behind_head_of_bank_queue: 0
-  memory_delays_stalled_at_head_of_bank_queue: 114
-  memory_stalls_for_bank_busy: 56
+  memory_delays_stalled_at_head_of_bank_queue: 77
+  memory_stalls_for_bank_busy: 41
   memory_stalls_for_random_busy: 0
   memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 10
+  memory_stalls_for_arbitration: 9
   memory_stalls_for_bus: 25
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 23
+  memory_stalls_for_read_write_turnaround: 2
   memory_stalls_for_read_read_turnaround: 0
   accesses_per_bank: 18  10  0  34  20  19  28  21  5  3  6  4  21  40  20  3  4  5  7  13  10  16  14  41  15  5  5  12  12  18  14  56  
 

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout
index 6a5f96ccf370dbccc954c668b841e90ce6c9853d..0eff99821c2084cd3614b0b7097421eec4784aef 100755 (executable)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout
@@ -1,12 +1,14 @@
+Redirecting stdout to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 28 2012 11:32:56
-gem5 started Jul 28 2012 11:35:53
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 14:10:16
+gem5 started Sep  1 2012 14:11:29
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
 Hello world!
-Exiting @ tick 85418 because target called exit()
+Exiting @ tick 44968 because target called exit()

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt
index 2737629f891aad413e78060daa69afc26abb54f0..b192d2700b5e35daed02beceaae0ebd5cf38bc80 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt
@@ -1,14 +1,14 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000085                       # Number of seconds simulated
-sim_ticks                                       85418                       # Number of ticks simulated
-final_tick                                      85418                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.000045                       # Number of seconds simulated
+sim_ticks                                       44968                       # Number of ticks simulated
+final_tick                                      44968                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                   1284                       # Simulator instruction rate (inst/s)
-host_op_rate                                     1284                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                  42571                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 232824                       # Number of bytes of host memory used
-host_seconds                                     2.01                       # Real time elapsed on the host
+host_inst_rate                                  22673                       # Simulator instruction rate (inst/s)
+host_op_rate                                    22668                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                 395469                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 264056                       # Number of bytes of host memory used
+host_seconds                                     0.11                       # Real time elapsed on the host
 sim_insts                                        2577                       # Number of instructions simulated
 sim_ops                                          2577                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::cpu.inst             10340                       # Number of bytes read from this memory
@@ -23,16 +23,16 @@ system.physmem.num_reads::cpu.data                415                       # Nu
 system.physmem.num_reads::total                  3000                       # Number of read requests responded to by this memory
 system.physmem.num_writes::cpu.data               294                       # Number of write requests responded to by this memory
 system.physmem.num_writes::total                  294                       # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst            121051769                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data             35308717                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total               156360486                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst       121051769                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total          121051769                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data            24093282                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total               24093282                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst           121051769                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data            59402000                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total              180453769                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst            229941292                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data             67069916                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total               297011208                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst       229941292                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total          229941292                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::cpu.data            45765878                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total               45765878                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst           229941292                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data           112835794                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total              342777086                       # Total bandwidth to/from this memory (bytes/s)
 system.l1_cntrl0.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl0.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads
@@ -84,7 +84,7 @@ system.cpu.itb.data_misses                          0                       # DT
 system.cpu.itb.data_acv                             0                       # DTB access violations
 system.cpu.itb.data_accesses                        0                       # DTB accesses
 system.cpu.workload.num_syscalls                    4                       # Number of system calls
-system.cpu.numCycles                            85418                       # number of cpu cycles simulated
+system.cpu.numCycles                            44968                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.committedInsts                        2577                       # Number of instructions committed
@@ -103,7 +103,7 @@ system.cpu.num_mem_refs                           717                       # nu
 system.cpu.num_load_insts                         419                       # Number of load instructions
 system.cpu.num_store_insts                        298                       # Number of store instructions
 system.cpu.num_idle_cycles                          0                       # Number of idle cycles
-system.cpu.num_busy_cycles                      85418                       # Number of busy cycles
+system.cpu.num_busy_cycles                      44968                       # Number of busy cycles
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini
index 1640431a213a8a38a01ed3b4e352f8ed1e0fe658..4e9dec81e4f641a87e4e1a44edcda55c77de8f8a 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=cpu dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -47,7 +48,6 @@ max_insts_any_thread=0
 max_loads_all_threads=0
 max_loads_any_thread=0
 numThreads=1
-phase=0
 profile=0
 progress_interval=0
 system=system
@@ -78,7 +78,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello
+executable=tests/test-progs/hello/bin/alpha/tru64/hello
 gid=100
 input=cin
 max_stack_size=67108864
@@ -121,9 +121,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -132,6 +132,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -214,6 +215,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=true
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -229,6 +231,7 @@ slave=system.cpu.icache_port system.cpu.dcache_port
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -330,6 +333,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats
index 9dff590a44b798618ef824a3942056d8d1d7756f..9e9602eaf34ad3911aa05b61cf02018ccceefef6 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats
@@ -1,26 +1,26 @@
-Real time: Jul/10/2012 17:50:59
+Real time: Sep/01/2012 13:54:35
 
 Profiler Stats
 --------------
-Elapsed_time_in_seconds: 0
-Elapsed_time_in_minutes: 0
-Elapsed_time_in_hours: 0
-Elapsed_time_in_days: 0
+Elapsed_time_in_seconds: 1
+Elapsed_time_in_minutes: 0.0166667
+Elapsed_time_in_hours: 0.000277778
+Elapsed_time_in_days: 1.15741e-05
 
-Virtual_time_in_seconds: 0.42
-Virtual_time_in_minutes: 0.007
-Virtual_time_in_hours:   0.000116667
-Virtual_time_in_days:    4.86111e-06
+Virtual_time_in_seconds: 0.39
+Virtual_time_in_minutes: 0.0065
+Virtual_time_in_hours:   0.000108333
+Virtual_time_in_days:    4.51389e-06
 
-Ruby_current_time: 78448
+Ruby_current_time: 35432
 Ruby_start_time: 0
-Ruby_cycles: 78448
+Ruby_cycles: 35432
 
-mbytes_resident: 44.0312
-mbytes_total: 227.02
-resident_ratio: 0.193988
+mbytes_resident: 47.6953
+mbytes_total: 256.324
+resident_ratio: 0.186135
 
-ruby_cycles_executed: [ 78449 ]
+ruby_cycles_executed: [ 35433 ]
 
 Busy Controller Counts:
 L1Cache-0:0  
@@ -33,13 +33,13 @@ sequencer_requests_outstanding: [binsize: 1 max: 1 count: 3295 average:     1 |
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 2 max: 320 count: 3294 average: 22.8154 | standard deviation: 52.8821 | 0 2784 0 0 0 0 69 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 35 77 95 66 57 76 2 2 1 4 2 0 1 2 2 5 1 4 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 2 max: 319 count: 415 average: 57.3952 | standard deviation: 74.7751 | 0 233 0 0 0 0 36 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 16 35 24 16 16 26 0 1 1 0 1 0 0 1 2 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 2 max: 320 count: 294 average: 28.9728 | standard deviation: 63.5282 | 0 236 0 0 0 0 11 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 7 6 7 5 10 0 0 0 1 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 2 0 1 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH: [binsize: 1 max: 181 count: 2585 average: 16.5636 | standard deviation: 44.4401 | 0 0 2315 0 0 0 0 0 0 0 0 0 0 22 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 16 17 18 47 18 11 32 22 14 39 1 1 1 1 0 0 0 2 1 0 0 0 0 0 0 0 1 0 0 0 2 1 0 2 1 ]
+miss_latency: [binsize: 1 max: 122 count: 3294 average: 9.75653 | standard deviation: 19.3896 | 0 0 2784 0 0 0 0 0 0 0 0 0 0 69 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 327 37 9 38 4 1 5 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 2 1 8 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 ]
+miss_latency_LD: [binsize: 1 max: 122 count: 415 average: 22.8313 | standard deviation: 27.0523 | 0 0 233 0 0 0 0 0 0 0 0 0 0 36 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 110 14 1 9 2 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 1 3 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 ]
+miss_latency_ST: [binsize: 1 max: 122 count: 294 average: 12.0102 | standard deviation: 23.154 | 0 0 236 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 0 2 4 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 ]
+miss_latency_IFETCH: [binsize: 1 max: 83 count: 2585 average: 7.40116 | standard deviation: 16.3551 | 0 0 2315 0 0 0 0 0 0 0 0 0 0 22 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 181 23 6 25 1 1 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 5 ]
 miss_latency_L1Cache: [binsize: 1 max: 2 count: 2784 average:     2 | standard deviation: 0 | 0 0 2784 ]
 miss_latency_L2Cache: [binsize: 1 max: 13 count: 69 average:    13 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 69 ]
-miss_latency_Directory: [binsize: 2 max: 320 count: 441 average: 155.757 | standard deviation: 21.4255 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 35 77 95 66 57 76 2 2 1 4 2 0 1 2 2 5 1 4 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_Directory: [binsize: 1 max: 122 count: 441 average: 58.2154 | standard deviation: 8.81927 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 327 37 9 38 4 1 5 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 2 1 8 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -47,18 +47,18 @@ miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 avera
 imcomplete_wCC_Times: 0
 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
 miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
-miss_latency_dir_forward_to_first_response: [binsize: 1 max: 158 count: 1 average:   158 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_dir_forward_to_first_response: [binsize: 1 max: 61 count: 1 average:    61 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
 imcomplete_dir_Times: 440
 miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 233 average:     2 | standard deviation: 0 | 0 0 233 ]
 miss_latency_LD_L2Cache: [binsize: 1 max: 13 count: 36 average:    13 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 36 ]
-miss_latency_LD_Directory: [binsize: 2 max: 319 count: 146 average: 156.747 | standard deviation: 24.5989 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 16 35 24 16 16 26 0 1 1 0 1 0 0 1 2 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_Directory: [binsize: 1 max: 122 count: 146 average:  58.5 | standard deviation: 9.33625 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 110 14 1 9 2 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 1 3 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 ]
 miss_latency_ST_L1Cache: [binsize: 1 max: 2 count: 236 average:     2 | standard deviation: 0 | 0 0 236 ]
 miss_latency_ST_L2Cache: [binsize: 1 max: 13 count: 11 average:    13 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 11 ]
-miss_latency_ST_Directory: [binsize: 2 max: 320 count: 47 average: 168.149 | standard deviation: 46.0633 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 7 6 7 5 10 0 0 0 1 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 2 0 1 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST_Directory: [binsize: 1 max: 122 count: 47 average: 62.0426 | standard deviation: 18.5144 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 0 2 4 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 ]
 miss_latency_IFETCH_L1Cache: [binsize: 1 max: 2 count: 2315 average:     2 | standard deviation: 0 | 0 0 2315 ]
 miss_latency_IFETCH_L2Cache: [binsize: 1 max: 13 count: 22 average:    13 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 22 ]
-miss_latency_IFETCH_Directory: [binsize: 1 max: 181 count: 248 average: 152.827 | standard deviation: 5.37952 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 16 17 18 47 18 11 32 22 14 39 1 1 1 1 0 0 0 2 1 0 0 0 0 0 0 0 1 0 0 0 2 1 0 2 1 ]
+miss_latency_IFETCH_Directory: [binsize: 1 max: 83 count: 248 average: 57.3226 | standard deviation: 4.46262 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 181 23 6 25 1 1 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 5 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -90,11 +90,11 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 12375
+page_reclaims: 9203
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 80
 
 Network Stats
 -------------
@@ -108,9 +108,9 @@ total_msgs: 7791 total_bytes: 162552
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 2.15844
-  links_utilized_percent_switch_0_link_0: 2.80058 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 1.51629 bw: 16000 base_latency: 1
+links_utilized_percent_switch_0: 4.77887
+  links_utilized_percent_switch_0_link_0: 6.20061 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 3.35713 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_0_link_0_Response_Data: 441 31752 [ 0 0 0 0 441 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_0_link_0_Writeback_Control: 425 3400 [ 0 0 0 425 0 0 0 0 0 0 ] base_latency: 1
@@ -121,9 +121,9 @@ links_utilized_percent_switch_0: 2.15844
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 2.15844
-  links_utilized_percent_switch_1_link_0: 1.51629 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 2.80058 bw: 16000 base_latency: 1
+links_utilized_percent_switch_1: 4.77887
+  links_utilized_percent_switch_1_link_0: 3.35713 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 6.20061 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_1_link_0_Request_Control: 441 3528 [ 0 0 441 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_1_link_0_Writeback_Data: 81 5832 [ 0 0 0 0 0 81 0 0 0 0 ] base_latency: 1
@@ -134,9 +134,9 @@ links_utilized_percent_switch_1: 2.15844
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 2.15844
-  links_utilized_percent_switch_2_link_0: 2.80058 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 1.51629 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 4.77887
+  links_utilized_percent_switch_2_link_0: 6.20061 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 3.35713 bw: 16000 base_latency: 1
 
   outgoing_messages_switch_2_link_0_Response_Data: 441 31752 [ 0 0 0 0 441 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_2_link_0_Writeback_Control: 425 3400 [ 0 0 0 425 0 0 0 0 0 0 ] base_latency: 1
@@ -590,25 +590,25 @@ Memory controller: system.dir_cntrl0.memBuffer:
   memory_total_requests: 522
   memory_reads: 441
   memory_writes: 81
-  memory_refreshes: 164
-  memory_total_request_delays: 151
-  memory_delays_per_request: 0.289272
-  memory_delays_in_input_queue: 2
+  memory_refreshes: 246
+  memory_total_request_delays: 39
+  memory_delays_per_request: 0.0747126
+  memory_delays_in_input_queue: 0
   memory_delays_behind_head_of_bank_queue: 0
-  memory_delays_stalled_at_head_of_bank_queue: 149
-  memory_stalls_for_bank_busy: 22
+  memory_delays_stalled_at_head_of_bank_queue: 39
+  memory_stalls_for_bank_busy: 15
   memory_stalls_for_random_busy: 0
   memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 7
-  memory_stalls_for_bus: 26
+  memory_stalls_for_arbitration: 5
+  memory_stalls_for_bus: 15
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 94
+  memory_stalls_for_read_write_turnaround: 4
   memory_stalls_for_read_read_turnaround: 0
   accesses_per_bank: 18  10  0  36  20  19  31  22  5  4  7  4  22  41  22  3  4  6  7  13  10  18  14  41  16  5  5  12  13  18  14  62  
 
  --- Directory ---
  - Event Counts -
-GETX [53 ] 53
+GETX [51 ] 51
 GETS [410 ] 410
 PUT [425 ] 425
 Unblock [0 ] 0
@@ -909,7 +909,7 @@ WB_O_W  DMA_WRITE [0 ] 0
 WB_O_W  Memory_Ack [0 ] 0
 WB_O_W  GETF [0 ] 0
 
-WB_E_W  GETX [2 ] 2
+WB_E_W  GETX [0 ] 0
 WB_E_W  GETS [2 ] 2
 WB_E_W  PUT [0 ] 0
 WB_E_W  Pf_Replacement [0 ] 0

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout
index 55a2f065ee9a5c106693a5cf13bbf11abb5b0789..8fae8fc4c0aa2de61c10a0c158ebf401f45d305b 100755 (executable)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout
@@ -1,12 +1,14 @@
+Redirecting stdout to build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout
+Redirecting stderr to build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 28 2012 11:27:37
-gem5 started Jul 28 2012 11:35:39
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 13:53:26
+gem5 started Sep  1 2012 13:54:34
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer -re tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
 Hello world!
-Exiting @ tick 78448 because target called exit()
+Exiting @ tick 35432 because target called exit()

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt
index a36f9967877ac6f2f6438d00b9f486e5dc61b731..c2b9c6eb8988af4dddb34fa93d310c59fd337cdc 100644 (file)
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt
@@ -1,13 +1,13 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000078                       # Number of seconds simulated
-sim_ticks                                       78448                       # Number of ticks simulated
-final_tick                                      78448                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.000035                       # Number of seconds simulated
+sim_ticks                                       35432                       # Number of ticks simulated
+final_tick                                      35432                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                  31170                       # Simulator instruction rate (inst/s)
-host_op_rate                                    31163                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                 948464                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 230616                       # Number of bytes of host memory used
+host_inst_rate                                  32925                       # Simulator instruction rate (inst/s)
+host_op_rate                                    32915                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                 452422                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 262480                       # Number of bytes of host memory used
 host_seconds                                     0.08                       # Real time elapsed on the host
 sim_insts                                        2577                       # Number of instructions simulated
 sim_ops                                          2577                       # Number of ops (including micro ops) simulated
@@ -23,16 +23,16 @@ system.physmem.num_reads::cpu.data                415                       # Nu
 system.physmem.num_reads::total                  3000                       # Number of read requests responded to by this memory
 system.physmem.num_writes::cpu.data               294                       # Number of write requests responded to by this memory
 system.physmem.num_writes::total                  294                       # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst            131807057                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data             38445849                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total               170252906                       # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst       131807057                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total          131807057                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data            26233938                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total               26233938                       # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst           131807057                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data            64679788                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total              196486845                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst            291826597                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data             85120795                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total               376947392                       # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst       291826597                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total          291826597                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::cpu.data            58083089                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total               58083089                       # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst           291826597                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data           143203883                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total              435030481                       # Total bandwidth to/from this memory (bytes/s)
 system.l1_cntrl0.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl0.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads
@@ -90,7 +90,7 @@ system.cpu.itb.data_misses                          0                       # DT
 system.cpu.itb.data_acv                             0                       # DTB access violations
 system.cpu.itb.data_accesses                        0                       # DTB accesses
 system.cpu.workload.num_syscalls                    4                       # Number of system calls
-system.cpu.numCycles                            78448                       # number of cpu cycles simulated
+system.cpu.numCycles                            35432                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.committedInsts                        2577                       # Number of instructions committed
@@ -109,7 +109,7 @@ system.cpu.num_mem_refs                           717                       # nu
 system.cpu.num_load_insts                         419                       # Number of load instructions
 system.cpu.num_store_insts                        298                       # Number of store instructions
 system.cpu.num_idle_cycles                          0                       # Number of idle cycles
-system.cpu.num_busy_cycles                      78448                       # Number of busy cycles
+system.cpu.num_busy_cycles                      35432                       # Number of busy cycles
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini
index bd62cb8ca41fdda98a4ce3c406de6410fc212bb3..93b40e7464e5b59e6847e255193c44d91df5353a 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini
@@ -10,11 +10,12 @@ time_sync_spin_threshold=100000
 type=System
 children=cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 dir_cntrl0 funcbus funcmem l1_cntrl0 l1_cntrl1 l1_cntrl2 l1_cntrl3 l1_cntrl4 l1_cntrl5 l1_cntrl6 l1_cntrl7 l2_cntrl0 physmem ruby sys_port_proxy
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
 mem_mode=timing
-memories=system.funcmem system.physmem
+memories=system.physmem system.funcmem
 num_work_ids=16
 readfile=
 symbolfile=
@@ -30,6 +31,7 @@ system_port=system.sys_port_proxy.slave[0]
 [system.cpu0]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -48,6 +50,7 @@ test=system.l1_cntrl0.sequencer.slave[0]
 [system.cpu1]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -66,6 +69,7 @@ test=system.l1_cntrl1.sequencer.slave[0]
 [system.cpu2]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -84,6 +88,7 @@ test=system.l1_cntrl2.sequencer.slave[0]
 [system.cpu3]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -102,6 +107,7 @@ test=system.l1_cntrl3.sequencer.slave[0]
 [system.cpu4]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -120,6 +126,7 @@ test=system.l1_cntrl4.sequencer.slave[0]
 [system.cpu5]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -138,6 +145,7 @@ test=system.l1_cntrl5.sequencer.slave[0]
 [system.cpu6]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -156,6 +164,7 @@ test=system.l1_cntrl6.sequencer.slave[0]
 [system.cpu7]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -201,9 +210,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -212,6 +221,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -227,6 +237,7 @@ slave=system.cpu0.functional system.cpu1.functional system.cpu2.functional syste
 
 [system.funcmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=false
@@ -287,6 +298,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -350,6 +362,7 @@ tagArrayBanks=1
 [system.l1_cntrl1.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl1.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl1.L1IcacheMemory
@@ -413,6 +426,7 @@ tagArrayBanks=1
 [system.l1_cntrl2.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl2.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl2.L1IcacheMemory
@@ -476,6 +490,7 @@ tagArrayBanks=1
 [system.l1_cntrl3.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl3.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl3.L1IcacheMemory
@@ -539,6 +554,7 @@ tagArrayBanks=1
 [system.l1_cntrl4.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl4.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl4.L1IcacheMemory
@@ -602,6 +618,7 @@ tagArrayBanks=1
 [system.l1_cntrl5.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl5.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl5.L1IcacheMemory
@@ -665,6 +682,7 @@ tagArrayBanks=1
 [system.l1_cntrl6.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl6.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl6.L1IcacheMemory
@@ -728,6 +746,7 @@ tagArrayBanks=1
 [system.l1_cntrl7.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl7.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl7.L1IcacheMemory
@@ -772,6 +791,7 @@ tagArrayBanks=1
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -1057,6 +1077,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats
index 5287a3d9ce5b5ec189cca03f38c0bab743d8554c..4e78c037e24bd36bbfdaff46237cb1679d47a6a6 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats
@@ -1,26 +1,26 @@
-Real time: Jul/10/2012 17:34:09
+Real time: Sep/01/2012 14:04:53
 
 Profiler Stats
 --------------
-Elapsed_time_in_seconds: 132
-Elapsed_time_in_minutes: 2.2
-Elapsed_time_in_hours: 0.0366667
-Elapsed_time_in_days: 0.00152778
+Elapsed_time_in_seconds: 96
+Elapsed_time_in_minutes: 1.6
+Elapsed_time_in_hours: 0.0266667
+Elapsed_time_in_days: 0.00111111
 
-Virtual_time_in_seconds: 132.01
-Virtual_time_in_minutes: 2.20017
-Virtual_time_in_hours:   0.0366694
-Virtual_time_in_days:    0.00152789
+Virtual_time_in_seconds: 97.01
+Virtual_time_in_minutes: 1.61683
+Virtual_time_in_hours:   0.0269472
+Virtual_time_in_days:    0.0011228
 
-Ruby_current_time: 22495354
+Ruby_current_time: 7277301
 Ruby_start_time: 0
-Ruby_cycles: 22495354
+Ruby_cycles: 7277301
 
-mbytes_resident: 59.8242
-mbytes_total: 371.453
-resident_ratio: 0.161065
+mbytes_resident: 65.2539
+mbytes_total: 400.625
+resident_ratio: 0.162919
 
-ruby_cycles_executed: [ 22495355 22495355 22495355 22495355 22495355 22495355 22495355 22495355 ]
+ruby_cycles_executed: [ 7277302 7277302 7277302 7277302 7277302 7277302 7277302 7277302 ]
 
 Busy Controller Counts:
 L1Cache-0:0  L1Cache-1:0  L1Cache-2:0  L1Cache-3:0  L1Cache-4:0  L1Cache-5:0  L1Cache-6:0  L1Cache-7:0  
@@ -31,14 +31,14 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 16 count: 613548 average: 15.9984 | standard deviation: 0.127148 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 613428 ]
+sequencer_requests_outstanding: [binsize: 1 max: 16 count: 611958 average: 15.9984 | standard deviation: 0.127313 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 611838 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 128 max: 13760 count: 613420 average: 4693.39 | standard deviation: 2857.78 | 94 8107 8803 9224 9186 10525 10961 11442 11448 10498 11027 10528 10145 9544 8769 9370 9040 8741 8591 7835 8409 8244 8431 8001 7426 7941 7973 7817 7780 7113 7670 7647 7635 7776 6976 7610 7590 7484 7517 7019 7616 7463 7684 7795 7113 7764 7804 7992 7925 7546 8139 8147 8400 8208 7986 8390 8549 8426 8400 7693 8367 8205 8096 7773 6799 7277 6993 6893 6382 5460 5473 5204 4661 4177 3467 3327 2966 2573 2263 1761 1663 1326 1150 948 717 631 469 342 286 220 150 125 96 56 41 36 22 14 12 8 3 7 1 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 128 max: 13760 count: 398461 average: 4689.46 | standard deviation: 2856.72 | 72 5284 5756 6047 6025 6856 7148 7398 7440 6842 7162 6943 6556 6164 5710 6049 5875 5695 5624 5114 5411 5296 5403 5181 4802 5110 5252 5041 5021 4659 5089 4909 4962 5082 4482 4914 4844 4859 4886 4553 4946 4845 4968 5042 4606 5005 5029 5181 5176 4969 5367 5331 5542 5351 5247 5408 5581 5501 5512 5015 5431 5333 5242 5034 4435 4767 4539 4418 4177 3498 3544 3320 2976 2691 2251 2175 1943 1649 1439 1171 1031 871 734 599 439 421 289 224 184 143 85 71 64 43 28 23 12 8 8 2 3 4 1 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 128 max: 13020 count: 214959 average: 4700.66 | standard deviation: 2859.74 | 22 2823 3047 3177 3161 3669 3813 4044 4008 3656 3865 3585 3589 3380 3059 3321 3165 3046 2967 2721 2998 2948 3028 2820 2624 2831 2721 2776 2759 2454 2581 2738 2673 2694 2494 2696 2746 2625 2631 2466 2670 2618 2716 2753 2507 2759 2775 2811 2749 2577 2772 2816 2858 2857 2739 2982 2968 2925 2888 2678 2936 2872 2854 2739 2364 2510 2454 2475 2205 1962 1929 1884 1685 1486 1216 1152 1023 924 824 590 632 455 416 349 278 210 180 118 102 77 65 54 32 13 13 13 10 6 4 6 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_NULL: [binsize: 128 max: 13760 count: 613420 average: 4693.39 | standard deviation: 2857.78 | 94 8107 8803 9224 9186 10525 10961 11442 11448 10498 11027 10528 10145 9544 8769 9370 9040 8741 8591 7835 8409 8244 8431 8001 7426 7941 7973 7817 7780 7113 7670 7647 7635 7776 6976 7610 7590 7484 7517 7019 7616 7463 7684 7795 7113 7764 7804 7992 7925 7546 8139 8147 8400 8208 7986 8390 8549 8426 8400 7693 8367 8205 8096 7773 6799 7277 6993 6893 6382 5460 5473 5204 4661 4177 3467 3327 2966 2573 2263 1761 1663 1326 1150 948 717 631 469 342 286 220 150 125 96 56 41 36 22 14 12 8 3 7 1 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency: [binsize: 32 max: 4313 count: 611830 average: 1522.26 | standard deviation: 914.155 | 26 63 5067 7488 7283 6990 7667 7910 8087 9056 8958 8733 8991 8823 8076 8211 7930 7441 7590 7247 7103 7130 6873 6585 6779 6594 6349 6537 6418 6279 6424 6111 6077 6255 6019 5877 6151 5976 5707 5955 5995 5730 5780 5873 5721 5941 5822 5671 5889 5918 5657 5778 5750 5724 5870 6037 5803 5741 5904 5835 6057 5989 5802 6194 5941 6118 6386 6421 6230 6321 6327 6349 6700 6549 6246 6358 6576 6215 6722 6386 6171 6277 6153 5786 5923 5716 5062 5223 4885 4600 4454 4110 3801 3539 3453 3026 2875 2608 2302 2111 1858 1616 1477 1311 1040 878 821 671 565 470 355 326 245 208 165 125 109 72 65 54 42 40 22 9 13 11 6 3 3 4 2 2 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD: [binsize: 32 max: 4313 count: 397447 average: 1522.3 | standard deviation: 913.551 | 18 51 3238 4837 4716 4554 5025 5174 5182 5887 5756 5654 5844 5710 5243 5401 5071 4843 4945 4673 4596 4595 4508 4311 4373 4312 4181 4358 4217 4113 4110 3919 3997 4087 3891 3766 3989 3930 3649 3806 3966 3732 3732 3863 3699 3892 3781 3641 3866 3817 3686 3741 3698 3723 3812 3927 3833 3627 3828 3737 3999 3896 3776 3993 3950 3977 4112 4203 4043 4112 4163 4136 4344 4324 4106 4105 4272 4041 4385 4179 3936 4074 3993 3743 3854 3767 3298 3402 3162 2997 2858 2675 2443 2281 2280 1951 1846 1672 1526 1284 1201 1032 949 847 677 589 533 442 371 279 231 218 159 138 102 85 66 55 43 35 25 26 18 7 9 7 3 3 1 3 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST: [binsize: 32 max: 4275 count: 214383 average: 1522.18 | standard deviation: 915.277 | 8 12 1829 2651 2567 2436 2642 2736 2905 3169 3202 3079 3147 3113 2833 2810 2859 2598 2645 2574 2507 2535 2365 2274 2406 2282 2168 2179 2201 2166 2314 2192 2080 2168 2128 2111 2162 2046 2058 2149 2029 1998 2048 2010 2022 2049 2041 2030 2023 2101 1971 2037 2052 2001 2058 2110 1970 2114 2076 2098 2058 2093 2026 2201 1991 2141 2274 2218 2187 2209 2164 2213 2356 2225 2140 2253 2304 2174 2337 2207 2235 2203 2160 2043 2069 1949 1764 1821 1723 1603 1596 1435 1358 1258 1173 1075 1029 936 776 827 657 584 528 464 363 289 288 229 194 191 124 108 86 70 63 40 43 17 22 19 17 14 4 2 4 4 3 0 2 1 1 1 1 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_NULL: [binsize: 32 max: 4313 count: 611830 average: 1522.26 | standard deviation: 914.155 | 26 63 5067 7488 7283 6990 7667 7910 8087 9056 8958 8733 8991 8823 8076 8211 7930 7441 7590 7247 7103 7130 6873 6585 6779 6594 6349 6537 6418 6279 6424 6111 6077 6255 6019 5877 6151 5976 5707 5955 5995 5730 5780 5873 5721 5941 5822 5671 5889 5918 5657 5778 5750 5724 5870 6037 5803 5741 5904 5835 6057 5989 5802 6194 5941 6118 6386 6421 6230 6321 6327 6349 6700 6549 6246 6358 6576 6215 6722 6386 6171 6277 6153 5786 5923 5716 5062 5223 4885 4600 4454 4110 3801 3539 3453 3026 2875 2608 2302 2111 1858 1616 1477 1311 1040 878 821 671 565 470 355 326 245 208 165 125 109 72 65 54 42 40 22 9 13 11 6 3 3 4 2 2 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -49,8 +49,8 @@ miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: N
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 imcomplete_dir_Times: 0
-miss_latency_LD_NULL: [binsize: 128 max: 13760 count: 398461 average: 4689.46 | standard deviation: 2856.72 | 72 5284 5756 6047 6025 6856 7148 7398 7440 6842 7162 6943 6556 6164 5710 6049 5875 5695 5624 5114 5411 5296 5403 5181 4802 5110 5252 5041 5021 4659 5089 4909 4962 5082 4482 4914 4844 4859 4886 4553 4946 4845 4968 5042 4606 5005 5029 5181 5176 4969 5367 5331 5542 5351 5247 5408 5581 5501 5512 5015 5431 5333 5242 5034 4435 4767 4539 4418 4177 3498 3544 3320 2976 2691 2251 2175 1943 1649 1439 1171 1031 871 734 599 439 421 289 224 184 143 85 71 64 43 28 23 12 8 8 2 3 4 1 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_NULL: [binsize: 128 max: 13020 count: 214959 average: 4700.66 | standard deviation: 2859.74 | 22 2823 3047 3177 3161 3669 3813 4044 4008 3656 3865 3585 3589 3380 3059 3321 3165 3046 2967 2721 2998 2948 3028 2820 2624 2831 2721 2776 2759 2454 2581 2738 2673 2694 2494 2696 2746 2625 2631 2466 2670 2618 2716 2753 2507 2759 2775 2811 2749 2577 2772 2816 2858 2857 2739 2982 2968 2925 2888 2678 2936 2872 2854 2739 2364 2510 2454 2475 2205 1962 1929 1884 1685 1486 1216 1152 1023 924 824 590 632 455 416 349 278 210 180 118 102 77 65 54 32 13 13 13 10 6 4 6 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_NULL: [binsize: 32 max: 4313 count: 397447 average: 1522.3 | standard deviation: 913.551 | 18 51 3238 4837 4716 4554 5025 5174 5182 5887 5756 5654 5844 5710 5243 5401 5071 4843 4945 4673 4596 4595 4508 4311 4373 4312 4181 4358 4217 4113 4110 3919 3997 4087 3891 3766 3989 3930 3649 3806 3966 3732 3732 3863 3699 3892 3781 3641 3866 3817 3686 3741 3698 3723 3812 3927 3833 3627 3828 3737 3999 3896 3776 3993 3950 3977 4112 4203 4043 4112 4163 4136 4344 4324 4106 4105 4272 4041 4385 4179 3936 4074 3993 3743 3854 3767 3298 3402 3162 2997 2858 2675 2443 2281 2280 1951 1846 1672 1526 1284 1201 1032 949 847 677 589 533 442 371 279 231 218 159 138 102 85 66 55 43 35 25 26 18 7 9 7 3 3 1 3 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST_NULL: [binsize: 32 max: 4275 count: 214383 average: 1522.18 | standard deviation: 915.277 | 8 12 1829 2651 2567 2436 2642 2736 2905 3169 3202 3079 3147 3113 2833 2810 2859 2598 2645 2574 2507 2535 2365 2274 2406 2282 2168 2179 2201 2166 2314 2192 2080 2168 2128 2111 2162 2046 2058 2149 2029 1998 2048 2010 2022 2049 2041 2030 2023 2101 1971 2037 2052 2001 2058 2110 1970 2114 2076 2098 2058 2093 2026 2201 1991 2141 2274 2218 2187 2209 2164 2213 2356 2225 2140 2253 2304 2174 2337 2207 2235 2203 2160 2043 2069 1949 1764 1821 1723 1603 1596 1435 1358 1258 1173 1075 1029 936 776 827 657 584 528 464 363 289 288 229 194 191 124 108 86 70 63 40 43 17 22 19 17 14 4 2 4 4 3 0 2 1 1 1 1 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -64,11 +64,11 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN
 
 Message Delayed Cycles
 ----------------------
-Total_delay_cycles: [binsize: 64 max: 3179 count: 4811273 average: 127.048 | standard deviation: 323.611 | 4016293 21294 31915 31760 34402 31903 33934 40187 38896 47238 41772 44405 51825 44867 51717 41964 38758 38516 28855 27620 18752 15150 13181 7952 6612 3942 2736 1881 1057 812 372 250 176 94 60 33 19 17 9 12 11 4 7 3 2 1 4 2 0 1 ]
-Total_nonPF_delay_cycles: [binsize: 1 max: 18 count: 3280807 average: 0.508064 | standard deviation: 1.45159 | 2800178 124575 22976 51320 209007 25390 4707 8014 22215 9190 1858 856 301 130 48 28 7 3 4 ]
-  virtual_network_0_delay_cycles: [binsize: 64 max: 3179 count: 1530466 average: 398.307 | standard deviation: 470.433 | 735486 21294 31915 31760 34402 31903 33934 40187 38896 47238 41772 44405 51825 44867 51717 41964 38758 38516 28855 27620 18752 15150 13181 7952 6612 3942 2736 1881 1057 812 372 250 176 94 60 33 19 17 9 12 11 4 7 3 2 1 4 2 0 1 ]
-  virtual_network_1_delay_cycles: [binsize: 1 max: 18 count: 2708629 average: 0.539198 | standard deviation: 1.52481 | 2354224 27019 9675 47646 206207 21637 2514 7649 21850 8964 267 562 268 103 24 9 4 3 4 ]
-  virtual_network_2_delay_cycles: [binsize: 1 max: 16 count: 572178 average: 0.360678 | standard deviation: 1.02424 | 445954 97556 13301 3674 2800 3753 2193 365 365 226 1591 294 33 27 24 19 3 ]
+Total_delay_cycles: [binsize: 32 max: 1034 count: 4867383 average: 43.2933 | standard deviation: 103.966 | 4034737 47969 64568 49261 58426 69451 62594 82731 80896 76781 75237 58633 43373 29776 17256 8673 4184 1779 636 243 97 32 15 13 6 11 0 3 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+Total_nonPF_delay_cycles: [binsize: 1 max: 35 count: 3328667 average: 1.5584 | standard deviation: 2.56943 | 1936154 350513 185166 210372 242929 153355 64954 47498 47950 34387 18982 9856 6169 6314 5648 2554 1438 1052 828 845 502 260 201 294 212 72 42 37 41 22 7 3 7 1 0 2 ]
+  virtual_network_0_delay_cycles: [binsize: 32 max: 1034 count: 1538716 average: 133.578 | standard deviation: 149.193 | 706080 47959 64568 49261 58426 69451 62594 82731 80896 76781 75237 58633 43373 29776 17256 8673 4184 1779 636 243 97 32 15 13 6 11 0 3 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+  virtual_network_1_delay_cycles: [binsize: 1 max: 25 count: 2735846 average: 1.39707 | standard deviation: 2.32903 | 1670179 261675 141846 181912 192399 108048 51007 39410 36263 24263 11588 5924 4361 3561 1833 664 358 318 143 55 19 12 4 3 0 1 ]
+  virtual_network_2_delay_cycles: [binsize: 1 max: 35 count: 592821 average: 2.30293 | standard deviation: 3.37074 | 265975 88838 43320 28460 50530 45307 13947 8088 11687 10124 7394 3932 1808 2753 3815 1890 1080 734 685 790 483 248 197 291 212 71 42 37 41 22 7 3 7 1 0 2 ]
   virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -80,219 +80,219 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 18 count: 3280807 average: 0.508064 |
 Resource Usage
 --------------
 page_size: 4096
-user_time: 131
+user_time: 96
 system_time: 0
-page_reclaims: 16523
+page_reclaims: 9081
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 216
 
 Network Stats
 -------------
 
-total_msg_count_Control: 3663942 29311536
-total_msg_count_Request_Control: 1712725 13701800
-total_msg_count_Response_Data: 4307603 310147416
-total_msg_count_Response_Control: 6353639 50829112
-total_msg_count_Writeback_Data: 1438122 103544784
-total_msg_count_Writeback_Control: 598632 4789056
-total_msgs: 18074663 total_bytes: 512323704
+total_msg_count_Control: 3654905 29239240
+total_msg_count_Request_Control: 1774787 14198296
+total_msg_count_Response_Data: 4297389 309412008
+total_msg_count_Response_Control: 6351852 50814816
+total_msg_count_Writeback_Data: 1535181 110533032
+total_msg_count_Writeback_Control: 620712 4965696
+total_msgs: 18234826 total_bytes: 519163088
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 1.71236
-  links_utilized_percent_switch_0_link_0: 1.77334 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 1.65137 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_0_link_0_Request_Control: 71340 570720 [ 71340 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Response_Data: 76457 5504904 [ 0 76457 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Response_Control: 38387 307096 [ 0 38387 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Control: 76459 611672 [ 76459 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Response_Data: 495 35640 [ 0 495 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Response_Control: 100727 805816 [ 0 24908 75819 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Data: 59608 4291776 [ 13535 46073 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Control: 24852 198816 [ 24852 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_0: 5.43268
+  links_utilized_percent_switch_0_link_0: 5.50698 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 5.35837 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_0_link_0_Request_Control: 74016 592128 [ 74016 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Data: 76403 5501016 [ 0 76403 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Control: 39876 319008 [ 0 39876 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Control: 76406 611248 [ 76406 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Response_Data: 497 35784 [ 0 497 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Response_Control: 99877 799016 [ 0 24098 75779 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Data: 63710 4587120 [ 14133 49577 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Control: 25744 205952 [ 25744 0 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 1.72774
-  links_utilized_percent_switch_1_link_0: 1.78626 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 1.66922 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_1_link_0_Request_Control: 71710 573680 [ 71710 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Response_Data: 76990 5543280 [ 0 76990 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Response_Control: 39031 312248 [ 0 39031 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Control: 76993 615944 [ 76993 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Response_Data: 492 35424 [ 0 492 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Response_Control: 101090 808720 [ 0 24786 76304 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Writeback_Data: 60359 4345848 [ 13777 46582 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Writeback_Control: 25254 202032 [ 25254 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_1: 5.43716
+  links_utilized_percent_switch_1_link_0: 5.50065 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 5.37367 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_1_link_0_Request_Control: 73971 591768 [ 73971 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Response_Data: 76300 5493600 [ 0 76300 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Response_Control: 39926 319408 [ 0 39926 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Control: 76303 610424 [ 76303 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Response_Data: 535 38520 [ 0 535 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Response_Control: 99445 795560 [ 0 23764 75681 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Data: 63975 4606200 [ 14147 49828 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Control: 25779 206232 [ 25779 0 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 1.71123
-  links_utilized_percent_switch_2_link_0: 1.77117 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 1.65128 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_2_link_0_Request_Control: 71363 570904 [ 71363 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Response_Data: 76359 5497848 [ 0 76359 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Response_Control: 38270 306160 [ 0 38270 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Control: 76362 610896 [ 76362 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Response_Data: 517 37224 [ 0 517 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Response_Control: 100631 805048 [ 0 24940 75691 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Writeback_Data: 59620 4292640 [ 13569 46051 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Writeback_Control: 24698 197584 [ 24698 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_2: 5.45523
+  links_utilized_percent_switch_2_link_0: 5.52262 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 5.38784 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_2_link_0_Request_Control: 74184 593472 [ 74184 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Response_Data: 76610 5515920 [ 0 76610 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Response_Control: 40125 321000 [ 0 40125 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Control: 76610 612880 [ 76610 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Response_Data: 501 36072 [ 0 501 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Response_Control: 99904 799232 [ 0 23896 76008 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Writeback_Data: 64139 4618008 [ 14210 49929 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Writeback_Control: 25905 207240 [ 25905 0 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_3_inlinks: 2
 switch_3_outlinks: 2
-links_utilized_percent_switch_3: 1.72523
-  links_utilized_percent_switch_3_link_0: 1.78279 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_1: 1.66767 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_3_link_0_Request_Control: 71726 573808 [ 71726 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Response_Data: 76841 5532552 [ 0 76841 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Response_Control: 38801 310408 [ 0 38801 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Control: 76842 614736 [ 76842 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Response_Data: 516 37152 [ 0 516 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Response_Control: 101063 808504 [ 0 24869 76194 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Writeback_Data: 60307 4342104 [ 13816 46491 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Writeback_Control: 24983 199864 [ 24983 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_3: 5.42603
+  links_utilized_percent_switch_3_link_0: 5.49535 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_1: 5.3567 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_3_link_0_Request_Control: 73932 591456 [ 73932 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Response_Data: 76240 5489280 [ 0 76240 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Response_Control: 39734 317872 [ 0 39734 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Control: 76242 609936 [ 76242 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Response_Data: 531 38232 [ 0 531 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Response_Control: 99585 796680 [ 0 23943 75642 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Writeback_Data: 63711 4587192 [ 14093 49618 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Writeback_Control: 25642 205136 [ 25642 0 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_4_inlinks: 2
 switch_4_outlinks: 2
-links_utilized_percent_switch_4: 1.70715
-  links_utilized_percent_switch_4_link_0: 1.76795 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_4_link_1: 1.64635 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_4_link_0_Request_Control: 71024 568192 [ 71024 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_Response_Data: 76231 5488632 [ 0 76231 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_Response_Control: 38311 306488 [ 0 38311 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Control: 76234 609872 [ 76234 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Response_Data: 452 32544 [ 0 452 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Response_Control: 100447 803576 [ 0 24896 75551 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Writeback_Data: 59480 4282560 [ 13673 45807 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Writeback_Control: 24637 197096 [ 24637 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_4: 5.45447
+  links_utilized_percent_switch_4_link_0: 5.52271 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_4_link_1: 5.38622 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_4_link_0_Request_Control: 74244 593952 [ 74244 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Response_Data: 76611 5515992 [ 0 76611 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Response_Control: 40066 320528 [ 0 40066 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Control: 76614 612912 [ 76614 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Response_Data: 489 35208 [ 0 489 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Response_Control: 99919 799352 [ 0 23911 76008 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Writeback_Data: 64120 4616640 [ 14137 49983 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Writeback_Control: 25929 207432 [ 25929 0 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_5_inlinks: 2
 switch_5_outlinks: 2
-links_utilized_percent_switch_5: 1.71406
-  links_utilized_percent_switch_5_link_0: 1.77633 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_5_link_1: 1.65179 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_5_link_0_Request_Control: 71452 571616 [ 71452 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_Response_Data: 76590 5514480 [ 0 76590 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_Response_Control: 38423 307384 [ 0 38423 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Control: 76593 612744 [ 76593 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Response_Data: 489 35208 [ 0 489 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Response_Control: 101169 809352 [ 0 25242 75927 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Writeback_Data: 59588 4290336 [ 13727 45861 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Writeback_Control: 24697 197576 [ 24697 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_5: 5.44063
+  links_utilized_percent_switch_5_link_0: 5.51002 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_5_link_1: 5.37125 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_5_link_0_Request_Control: 74115 592920 [ 74115 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_Response_Data: 76443 5503896 [ 0 76443 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_Response_Control: 39859 318872 [ 0 39859 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Control: 76446 611568 [ 76446 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Response_Data: 562 40464 [ 0 562 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Response_Control: 99784 798272 [ 0 23954 75830 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Writeback_Data: 63855 4597560 [ 14076 49779 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Writeback_Control: 25781 206248 [ 25781 0 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_6_inlinks: 2
 switch_6_outlinks: 2
-links_utilized_percent_switch_6: 1.72355
-  links_utilized_percent_switch_6_link_0: 1.78407 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_6_link_1: 1.66303 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_6_link_0_Request_Control: 71663 573304 [ 71663 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_Response_Data: 76911 5537592 [ 0 76911 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_Response_Control: 38805 310440 [ 0 38805 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Control: 76915 615320 [ 76915 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Response_Data: 527 37944 [ 0 527 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Response_Control: 101113 808904 [ 0 24886 76227 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Writeback_Data: 60030 4322160 [ 13633 46397 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Writeback_Control: 25170 201360 [ 25170 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_6: 5.49098
+  links_utilized_percent_switch_6_link_0: 5.55717 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_6_link_1: 5.4248 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_6_link_0_Request_Control: 74607 596856 [ 74607 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_Response_Data: 77065 5548680 [ 0 77065 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_Response_Control: 40632 325056 [ 0 40632 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Control: 77068 616544 [ 77068 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Response_Data: 525 37800 [ 0 525 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Response_Control: 100343 802744 [ 0 23907 76436 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Writeback_Data: 64557 4648104 [ 14224 50333 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Writeback_Control: 26409 211272 [ 26409 0 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_7_inlinks: 2
 switch_7_outlinks: 2
-links_utilized_percent_switch_7: 1.72847
-  links_utilized_percent_switch_7_link_0: 1.78743 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_7_link_1: 1.66951 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_7_link_0_Request_Control: 71900 575200 [ 71900 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_Response_Data: 77033 5546376 [ 0 77033 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_Response_Control: 38982 311856 [ 0 38982 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Control: 77037 616296 [ 77037 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Response_Data: 460 33120 [ 0 460 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Response_Control: 101258 810064 [ 0 24915 76343 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Writeback_Data: 60382 4347504 [ 13729 46653 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Writeback_Control: 25253 202024 [ 25253 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_7: 5.41853
+  links_utilized_percent_switch_7_link_0: 5.48871 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_7_link_1: 5.34835 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_7_link_0_Request_Control: 73752 590016 [ 73752 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Response_Data: 76149 5482728 [ 0 76149 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Response_Control: 39767 318136 [ 0 39767 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Control: 76153 609224 [ 76153 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Response_Data: 476 34272 [ 0 476 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Response_Control: 99339 794712 [ 0 23801 75538 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Writeback_Data: 63660 4583520 [ 14051 49609 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Writeback_Control: 25715 205720 [ 25715 0 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_8_inlinks: 2
 switch_8_outlinks: 2
-links_utilized_percent_switch_8: 23.6747
-  links_utilized_percent_switch_8_link_0: 26.7248 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_8_link_1: 20.6245 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_8_link_0_Control: 613435 4907480 [ 613435 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Response_Data: 609000 43848000 [ 0 609000 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Response_Control: 1415348 11322784 [ 0 807292 608056 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Writeback_Data: 479374 34514928 [ 109459 369915 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Writeback_Control: 199544 1596352 [ 199544 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Control: 607879 4863032 [ 607879 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Request_Control: 568369 4546952 [ 568369 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Response_Data: 822260 59202720 [ 0 822260 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Response_Control: 702513 5620104 [ 0 702513 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_8: 74.1642
+  links_utilized_percent_switch_8_link_0: 84.4959 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_8_link_1: 63.8326 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_8_link_0_Control: 611842 4894736 [ 611842 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Response_Data: 607680 43752960 [ 0 607680 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Response_Control: 1404626 11237008 [ 0 797704 606922 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Writeback_Data: 511727 36844344 [ 113071 398656 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Writeback_Control: 206904 1655232 [ 206904 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Control: 606461 4851688 [ 606461 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Request_Control: 589144 4713152 [ 589144 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Response_Data: 820260 59058720 [ 0 820260 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Response_Control: 712640 5701120 [ 0 712640 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_9_inlinks: 2
 switch_9_outlinks: 2
-links_utilized_percent_switch_9: 10.0124
-  links_utilized_percent_switch_9_link_0: 6.51366 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_1: 13.5111 bw: 16000 base_latency: 1
+links_utilized_percent_switch_9: 30.8757
+  links_utilized_percent_switch_9_link_0: 20.0839 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_1: 41.6675 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_9_link_0_Control: 607879 4863032 [ 607879 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_0_Response_Data: 214349 15433128 [ 0 214349 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_0_Response_Control: 393521 3148168 [ 0 393521 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_1_Response_Data: 607873 43766856 [ 0 607873 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_1_Response_Control: 607869 4862952 [ 0 607869 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Control: 606459 4851672 [ 606459 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Response_Data: 213778 15392016 [ 0 213778 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Response_Control: 392673 3141384 [ 0 392673 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_1_Response_Data: 606455 43664760 [ 0 606455 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_1_Response_Control: 606448 4851584 [ 0 606448 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_10_inlinks: 10
 switch_10_outlinks: 10
-links_utilized_percent_switch_10: 4.74679
-  links_utilized_percent_switch_10_link_0: 1.77334 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_1: 1.78626 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_2: 1.77117 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_3: 1.7828 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_4: 1.76795 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_5: 1.77633 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_6: 1.78407 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_7: 1.78743 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_8: 26.7248 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_9: 6.51366 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_10_link_0_Request_Control: 71340 570720 [ 71340 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_0_Response_Data: 76457 5504904 [ 0 76457 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_0_Response_Control: 38387 307096 [ 0 38387 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_1_Request_Control: 71710 573680 [ 71710 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_1_Response_Data: 76990 5543280 [ 0 76990 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_1_Response_Control: 39031 312248 [ 0 39031 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_2_Request_Control: 71363 570904 [ 71363 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_2_Response_Data: 76359 5497848 [ 0 76359 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_2_Response_Control: 38270 306160 [ 0 38270 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_3_Request_Control: 71726 573808 [ 71726 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_3_Response_Data: 76841 5532552 [ 0 76841 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_3_Response_Control: 38801 310408 [ 0 38801 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_4_Request_Control: 71024 568192 [ 71024 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_4_Response_Data: 76231 5488632 [ 0 76231 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_4_Response_Control: 38311 306488 [ 0 38311 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_5_Request_Control: 71452 571616 [ 71452 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_5_Response_Data: 76590 5514480 [ 0 76590 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_5_Response_Control: 38423 307384 [ 0 38423 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_6_Request_Control: 71663 573304 [ 71663 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_6_Response_Data: 76911 5537592 [ 0 76911 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_6_Response_Control: 38805 310440 [ 0 38805 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_7_Request_Control: 71900 575200 [ 71900 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_7_Response_Data: 77033 5546376 [ 0 77033 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_7_Response_Control: 38982 311856 [ 0 38982 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_Control: 613435 4907480 [ 613435 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_Response_Data: 609000 43848000 [ 0 609000 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_Response_Control: 1415349 11322792 [ 0 807293 608056 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_Writeback_Data: 479374 34514928 [ 109459 369915 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_Writeback_Control: 199544 1596352 [ 199544 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_9_Control: 607879 4863032 [ 607879 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_9_Response_Data: 214349 15433128 [ 0 214349 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_9_Response_Control: 393521 3148168 [ 0 393521 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_10: 14.8684
+  links_utilized_percent_switch_10_link_0: 5.50698 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_1: 5.50065 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_2: 5.52265 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_3: 5.49535 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_4: 5.52271 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_5: 5.51002 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_6: 5.55717 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_7: 5.48871 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_8: 84.4959 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_9: 20.0839 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_10_link_0_Request_Control: 74016 592128 [ 74016 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_0_Response_Data: 76403 5501016 [ 0 76403 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_0_Response_Control: 39876 319008 [ 0 39876 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_1_Request_Control: 73971 591768 [ 73971 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_1_Response_Data: 76300 5493600 [ 0 76300 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_1_Response_Control: 39926 319408 [ 0 39926 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_2_Request_Control: 74184 593472 [ 74184 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_2_Response_Data: 76610 5515920 [ 0 76610 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_2_Response_Control: 40125 321000 [ 0 40125 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_3_Request_Control: 73932 591456 [ 73932 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_3_Response_Data: 76240 5489280 [ 0 76240 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_3_Response_Control: 39734 317872 [ 0 39734 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_4_Request_Control: 74244 593952 [ 74244 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_4_Response_Data: 76611 5515992 [ 0 76611 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_4_Response_Control: 40066 320528 [ 0 40066 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_5_Request_Control: 74116 592928 [ 74116 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_5_Response_Data: 76443 5503896 [ 0 76443 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_5_Response_Control: 39859 318872 [ 0 39859 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_6_Request_Control: 74607 596856 [ 74607 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_6_Response_Data: 77065 5548680 [ 0 77065 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_6_Response_Control: 40632 325056 [ 0 40632 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_7_Request_Control: 73752 590016 [ 73752 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_7_Response_Data: 76149 5482728 [ 0 76149 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_7_Response_Control: 39767 318136 [ 0 39767 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_Control: 611842 4894736 [ 611842 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_Response_Data: 607680 43752960 [ 0 607680 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_Response_Control: 1404626 11237008 [ 0 797704 606922 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_Writeback_Data: 511727 36844344 [ 113071 398656 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_Writeback_Control: 206904 1655232 [ 206904 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_9_Control: 606459 4851672 [ 606459 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_9_Response_Data: 213778 15392016 [ 0 213778 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_9_Response_Control: 392673 3141384 [ 0 392673 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 Cache Stats: system.l1_cntrl0.L1IcacheMemory
   system.l1_cntrl0.L1IcacheMemory_total_misses: 0
@@ -303,97 +303,97 @@ Cache Stats: system.l1_cntrl0.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl0.L1DcacheMemory
-  system.l1_cntrl0.L1DcacheMemory_total_misses: 76459
-  system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 76459
+  system.l1_cntrl0.L1DcacheMemory_total_misses: 76406
+  system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 76406
   system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl0.L1DcacheMemory_request_type_LD:   65.0113%
-  system.l1_cntrl0.L1DcacheMemory_request_type_ST:   34.9887%
+  system.l1_cntrl0.L1DcacheMemory_request_type_LD:   65.1035%
+  system.l1_cntrl0.L1DcacheMemory_request_type_ST:   34.8965%
 
-  system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor:   76459    100%
+  system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor:   76406    100%
 
  --- L1Cache ---
  - Event Counts -
-Load [49473 49872 49991 50118 49708 49965 49568 49786 ] 398481
+Load [49757 49622 50229 49448 49745 49454 49723 49492 ] 397470
 Ifetch [0 0 0 0 0 0 0 0 ] 0
-Store [26764 26724 26925 26923 26752 27029 26797 27058 ] 214972
-Inv [70703 71103 71283 71568 70981 71368 70991 71360 ] 569357
-L1_Replacement [522682 523116 525583 524399 523820 522840 522790 524027 ] 4189257
-Fwd_GETX [190 209 233 204 223 192 227 216 ] 1694
-Fwd_GETS [131 140 147 128 136 150 145 150 ] 1127
+Store [26865 26828 26843 26709 26663 26852 26890 26752 ] 214402
+Inv [73894 73733 74240 73410 73675 73592 73825 73561 ] 589930
+L1_Replacement [534232 531606 536705 531280 533435 534953 534561 531949 ] 4268721
+Fwd_GETX [211 202 209 208 185 223 217 211 ] 1666
+Fwd_GETS [139 180 158 134 156 156 142 160 ] 1225
 Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
-Data [1 1 2 1 0 1 2 1 ] 9
-Data_Exclusive [48660 49055 49156 49294 48937 49122 48757 48990 ] 391971
-DataS_fromL1 [129 151 148 128 130 153 141 147 ] 1127
-Data_all_Acks [27441 27383 27605 27610 27390 27714 27459 27703 ] 220305
-Ack [1 1 2 1 0 1 2 1 ] 9
-Ack_all [1 1 2 1 0 1 2 1 ] 9
-WB_Ack [38309 38421 38801 38980 38387 39029 38266 38799 ] 308992
+Data [0 1 1 1 0 1 5 0 ] 9
+Data_Exclusive [48999 48845 49423 48678 48983 48691 48968 48730 ] 391317
+DataS_fromL1 [147 163 170 155 135 140 154 161 ] 1225
+Data_all_Acks [27465 27434 27471 27315 27285 27468 27483 27349 ] 219270
+Ack [0 1 1 1 0 1 5 0 ] 9
+Ack_all [0 1 1 1 0 1 5 0 ] 9
+WB_Ack [40066 39857 40630 39765 39876 39924 40115 39734 ] 319967
 
  - Transitions -
-NP  Load [49459 49861 49979 50103 49696 49955 49563 49781 ] 398397
+NP  Load [49742 49615 50214 49434 49740 49448 49718 49480 ] 397391
 NP  Ifetch [0 0 0 0 0 0 0 0 ] 0
-NP  Store [26759 26717 26921 26917 26747 27020 26791 27052 ] 214924
-NP  Inv [382 408 406 403 399 408 401 395 ] 3202
+NP  Store [26859 26816 26840 26704 26661 26849 26887 26747 ] 214363
+NP  Inv [374 407 423 376 369 391 383 386 ] 3109
 NP  L1_Replacement [0 0 0 0 0 0 0 0 ] 0
 
-I  Load [12 10 11 11 11 9 4 3 ] 71
+I  Load [9 7 11 11 3 4 5 10 ] 60
 I  Ifetch [0 0 0 0 0 0 0 0 ] 0
-I  Store [4 5 4 6 5 9 4 6 ] 43
+I  Store [4 8 3 4 2 2 2 4 ] 29
 I  Inv [0 0 0 0 0 0 0 0 ] 0
-I  L1_Replacement [37572 37796 37742 37676 37704 37589 37732 37692 ] 301503
+I  L1_Replacement [36211 36248 36066 36049 36208 36037 36160 36166 ] 289145
 
 S  Load [0 0 0 0 0 0 0 0 ] 0
 S  Ifetch [0 0 0 0 0 0 0 0 ] 0
-S  Store [0 0 0 0 0 0 0 0 ] 0
-S  Inv [546 532 552 529 494 562 534 528 ] 4277
-S  L1_Replacement [332 354 351 358 348 351 351 338 ] 2783
+S  Store [0 0 0 0 0 0 0 1 ] 1
+S  Inv [490 521 514 506 515 499 500 500 ] 4045
+S  L1_Replacement [320 322 351 319 312 330 324 322 ] 2600
 
-E  Load [1 0 1 0 1 1 1 0 ] 5
+E  Load [1 0 1 1 0 0 0 0 ] 3
 E  Ifetch [0 0 0 0 0 0 0 0 ] 0
-E  Store [0 0 0 0 0 0 0 0 ] 0
-E  Inv [23956 24288 23907 23969 24004 23797 23986 23926 ] 191833
-E  L1_Replacement [24637 24697 25170 25253 24852 25254 24698 24983 ] 199544
-E  Fwd_GETX [54 60 70 62 72 60 66 71 ] 515
-E  Fwd_GETS [13 10 9 10 9 10 7 9 ] 77
+E  Store [0 1 0 0 0 0 0 0 ] 1
+E  Inv [23022 22998 22950 22901 23183 22849 22999 23024 ] 183926
+E  L1_Replacement [25929 25781 26409 25715 25744 25779 25907 25642 ] 206906
+E  Fwd_GETX [44 52 57 50 49 56 52 55 ] 415
+E  Fwd_GETS [4 12 7 12 7 6 10 9 ] 67
 E  Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
 
-M  Load [1 0 0 1 0 0 0 1 ] 3
+M  Load [1 0 0 0 1 1 0 1 ] 4
 M  Ifetch [0 0 0 0 0 0 0 0 ] 0
-M  Store [0 0 0 0 0 0 0 0 ] 0
-M  Inv [13006 12892 13186 13093 13118 13150 13113 13144 ] 104702
-M  L1_Replacement [13673 13727 13633 13729 13535 13777 13569 13816 ] 109459
-M  Fwd_GETX [27 40 42 40 34 38 42 34 ] 297
-M  Fwd_GETS [56 62 62 59 65 64 69 64 ] 501
+M  Store [0 0 0 1 0 0 0 0 ] 1
+M  Inv [12638 12655 12534 12557 12440 12611 12592 12582 ] 100609
+M  L1_Replacement [14137 14076 14224 14051 14133 14147 14210 14093 ] 113071
+M  Fwd_GETX [31 36 26 49 27 28 26 19 ] 242
+M  Fwd_GETS [56 56 59 48 61 64 59 57 ] 460
 M  Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
 
 IS  Load [0 0 0 0 0 0 0 0 ] 0
 IS  Ifetch [0 0 0 0 0 0 0 0 ] 0
 IS  Store [0 0 0 0 0 0 0 0 ] 0
-IS  Inv [0 0 0 0 0 0 0 0 ] 0
-IS  L1_Replacement [289783 289443 291226 290374 290759 288658 290058 288425 ] 2318726
-IS  Data_Exclusive [48660 49055 49156 49294 48937 49122 48757 48990 ] 391971
-IS  DataS_fromL1 [129 151 148 128 130 153 141 147 ] 1127
-IS  Data_all_Acks [680 663 684 690 638 686 668 646 ] 5355
+IS  Inv [0 1 0 1 0 0 0 2 ] 4
+IS  L1_Replacement [298131 295401 300826 295942 296751 297563 296802 294983 ] 2376399
+IS  Data_Exclusive [48999 48845 49423 48678 48983 48691 48968 48730 ] 391317
+IS  DataS_fromL1 [147 163 170 155 135 140 154 161 ] 1225
+IS  Data_all_Acks [603 612 629 610 624 619 601 596 ] 4894
 
 IM  Load [0 0 0 0 0 0 0 0 ] 0
 IM  Ifetch [0 0 0 0 0 0 0 0 ] 0
 IM  Store [0 0 0 0 0 0 0 0 ] 0
 IM  Inv [0 0 0 0 0 0 0 0 ] 0
-IM  L1_Replacement [156685 157099 157461 157009 156622 157211 156382 158773 ] 1257242
-IM  Data [1 1 2 1 0 1 2 1 ] 9
-IM  Data_all_Acks [26761 26720 26921 26920 26752 27028 26791 27057 ] 214950
+IM  L1_Replacement [159504 159778 158829 159204 160287 161097 161158 160743 ] 1280600
+IM  Data [0 1 1 1 0 1 5 0 ] 9
+IM  Data_all_Acks [26862 26821 26842 26704 26661 26849 26882 26751 ] 214372
 IM  Ack [0 0 0 0 0 0 0 0 ] 0
 
 SM  Load [0 0 0 0 0 0 0 0 ] 0
 SM  Ifetch [0 0 0 0 0 0 0 0 ] 0
 SM  Store [0 0 0 0 0 0 0 0 ] 0
-SM  Inv [0 0 0 0 0 0 0 0 ] 0
+SM  Inv [0 0 0 0 0 0 0 1 ] 1
 SM  L1_Replacement [0 0 0 0 0 0 0 0 ] 0
-SM  Ack [1 1 2 1 0 1 2 1 ] 9
-SM  Ack_all [1 1 2 1 0 1 2 1 ] 9
+SM  Ack [0 1 1 1 0 1 5 0 ] 9
+SM  Ack_all [0 1 1 1 0 1 5 0 ] 9
 
 IS_I  Load [0 0 0 0 0 0 0 0 ] 0
 IS_I  Ifetch [0 0 0 0 0 0 0 0 ] 0
@@ -402,24 +402,24 @@ IS_I  Inv [0 0 0 0 0 0 0 0 ] 0
 IS_I  L1_Replacement [0 0 0 0 0 0 0 0 ] 0
 IS_I  Data_Exclusive [0 0 0 0 0 0 0 0 ] 0
 IS_I  DataS_fromL1 [0 0 0 0 0 0 0 0 ] 0
-IS_I  Data_all_Acks [0 0 0 0 0 0 0 0 ] 0
+IS_I  Data_all_Acks [0 1 0 1 0 0 0 2 ] 4
 
-M_I  Load [0 0 0 0 0 0 0 0 ] 0
+M_I  Load [0 0 0 0 0 0 0 1 ] 1
 M_I  Ifetch [0 0 0 0 0 0 0 0 ] 0
-M_I  Store [0 0 0 0 0 0 0 0 ] 0
-M_I  Inv [32801 32969 33211 33560 32955 33432 32938 33347 ] 265213
+M_I  Store [0 1 0 0 0 1 0 0 ] 2
+M_I  Inv [37345 37124 37799 37052 37137 37217 37337 37036 ] 298047
 M_I  L1_Replacement [0 0 0 0 0 0 0 0 ] 0
-M_I  Fwd_GETX [109 109 121 102 117 94 119 111 ] 882
-M_I  Fwd_GETS [62 68 76 59 62 76 69 77 ] 549
+M_I  Fwd_GETX [136 114 126 109 109 139 139 137 ] 1009
+M_I  Fwd_GETS [79 112 92 74 88 86 73 94 ] 698
 M_I  Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0
-M_I  WB_Ack [5338 5278 5395 5261 5253 5429 5141 5264 ] 42359
+M_I  WB_Ack [2506 2507 2616 2531 2543 2484 2566 2468 ] 20221
 
-SINK_WB_ACK  Load [0 1 0 3 0 0 0 1 ] 5
+SINK_WB_ACK  Load [4 0 3 2 1 1 0 0 ] 11
 SINK_WB_ACK  Ifetch [0 0 0 0 0 0 0 0 ] 0
-SINK_WB_ACK  Store [1 2 0 0 0 0 2 0 ] 5
-SINK_WB_ACK  Inv [12 14 21 14 11 19 19 20 ] 130
+SINK_WB_ACK  Store [2 2 0 0 0 0 1 0 ] 5
+SINK_WB_ACK  Inv [25 27 20 17 31 25 14 30 ] 189
 SINK_WB_ACK  L1_Replacement [0 0 0 0 0 0 0 0 ] 0
-SINK_WB_ACK  WB_Ack [32971 33143 33406 33719 33134 33600 33125 33535 ] 266633
+SINK_WB_ACK  WB_Ack [37560 37350 38014 37234 37333 37440 37549 37266 ] 299746
 
 Cache Stats: system.l1_cntrl1.L1IcacheMemory
   system.l1_cntrl1.L1IcacheMemory_total_misses: 0
@@ -430,16 +430,16 @@ Cache Stats: system.l1_cntrl1.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl1.L1DcacheMemory
-  system.l1_cntrl1.L1DcacheMemory_total_misses: 76993
-  system.l1_cntrl1.L1DcacheMemory_total_demand_misses: 76993
+  system.l1_cntrl1.L1DcacheMemory_total_misses: 76303
+  system.l1_cntrl1.L1DcacheMemory_total_demand_misses: 76303
   system.l1_cntrl1.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl1.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl1.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl1.L1DcacheMemory_request_type_LD:   64.8942%
-  system.l1_cntrl1.L1DcacheMemory_request_type_ST:   35.1058%
+  system.l1_cntrl1.L1DcacheMemory_request_type_LD:   64.81%
+  system.l1_cntrl1.L1DcacheMemory_request_type_ST:   35.19%
 
-  system.l1_cntrl1.L1DcacheMemory_access_mode_type_Supervisor:   76993    100%
+  system.l1_cntrl1.L1DcacheMemory_access_mode_type_Supervisor:   76303    100%
 
 Cache Stats: system.l1_cntrl2.L1IcacheMemory
   system.l1_cntrl2.L1IcacheMemory_total_misses: 0
@@ -450,16 +450,16 @@ Cache Stats: system.l1_cntrl2.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl2.L1DcacheMemory
-  system.l1_cntrl2.L1DcacheMemory_total_misses: 76362
-  system.l1_cntrl2.L1DcacheMemory_total_demand_misses: 76362
+  system.l1_cntrl2.L1DcacheMemory_total_misses: 76612
+  system.l1_cntrl2.L1DcacheMemory_total_demand_misses: 76612
   system.l1_cntrl2.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl2.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl2.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl2.L1DcacheMemory_request_type_LD:   64.9106%
-  system.l1_cntrl2.L1DcacheMemory_request_type_ST:   35.0894%
+  system.l1_cntrl2.L1DcacheMemory_request_type_LD:   64.9024%
+  system.l1_cntrl2.L1DcacheMemory_request_type_ST:   35.0976%
 
-  system.l1_cntrl2.L1DcacheMemory_access_mode_type_Supervisor:   76362    100%
+  system.l1_cntrl2.L1DcacheMemory_access_mode_type_Supervisor:   76612    100%
 
 Cache Stats: system.l1_cntrl3.L1IcacheMemory
   system.l1_cntrl3.L1IcacheMemory_total_misses: 0
@@ -470,16 +470,16 @@ Cache Stats: system.l1_cntrl3.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl3.L1DcacheMemory
-  system.l1_cntrl3.L1DcacheMemory_total_misses: 76842
-  system.l1_cntrl3.L1DcacheMemory_total_demand_misses: 76842
+  system.l1_cntrl3.L1DcacheMemory_total_misses: 76242
+  system.l1_cntrl3.L1DcacheMemory_total_demand_misses: 76242
   system.l1_cntrl3.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl3.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl3.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl3.L1DcacheMemory_request_type_LD:   64.7875%
-  system.l1_cntrl3.L1DcacheMemory_request_type_ST:   35.2125%
+  system.l1_cntrl3.L1DcacheMemory_request_type_LD:   64.9117%
+  system.l1_cntrl3.L1DcacheMemory_request_type_ST:   35.0883%
 
-  system.l1_cntrl3.L1DcacheMemory_access_mode_type_Supervisor:   76842    100%
+  system.l1_cntrl3.L1DcacheMemory_access_mode_type_Supervisor:   76242    100%
 
 Cache Stats: system.l1_cntrl4.L1IcacheMemory
   system.l1_cntrl4.L1IcacheMemory_total_misses: 0
@@ -490,16 +490,16 @@ Cache Stats: system.l1_cntrl4.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl4.L1DcacheMemory
-  system.l1_cntrl4.L1DcacheMemory_total_misses: 76234
-  system.l1_cntrl4.L1DcacheMemory_total_demand_misses: 76234
+  system.l1_cntrl4.L1DcacheMemory_total_misses: 76614
+  system.l1_cntrl4.L1DcacheMemory_total_demand_misses: 76614
   system.l1_cntrl4.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl4.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl4.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl4.L1DcacheMemory_request_type_LD:   64.8936%
-  system.l1_cntrl4.L1DcacheMemory_request_type_ST:   35.1064%
+  system.l1_cntrl4.L1DcacheMemory_request_type_LD:   64.9372%
+  system.l1_cntrl4.L1DcacheMemory_request_type_ST:   35.0628%
 
-  system.l1_cntrl4.L1DcacheMemory_access_mode_type_Supervisor:   76234    100%
+  system.l1_cntrl4.L1DcacheMemory_access_mode_type_Supervisor:   76614    100%
 
 Cache Stats: system.l1_cntrl5.L1IcacheMemory
   system.l1_cntrl5.L1IcacheMemory_total_misses: 0
@@ -510,16 +510,16 @@ Cache Stats: system.l1_cntrl5.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl5.L1DcacheMemory
-  system.l1_cntrl5.L1DcacheMemory_total_misses: 76593
-  system.l1_cntrl5.L1DcacheMemory_total_demand_misses: 76593
+  system.l1_cntrl5.L1DcacheMemory_total_misses: 76446
+  system.l1_cntrl5.L1DcacheMemory_total_demand_misses: 76446
   system.l1_cntrl5.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl5.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl5.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl5.L1DcacheMemory_request_type_LD:   65.1117%
-  system.l1_cntrl5.L1DcacheMemory_request_type_ST:   34.8883%
+  system.l1_cntrl5.L1DcacheMemory_request_type_LD:   64.9112%
+  system.l1_cntrl5.L1DcacheMemory_request_type_ST:   35.0888%
 
-  system.l1_cntrl5.L1DcacheMemory_access_mode_type_Supervisor:   76593    100%
+  system.l1_cntrl5.L1DcacheMemory_access_mode_type_Supervisor:   76446    100%
 
 Cache Stats: system.l1_cntrl6.L1IcacheMemory
   system.l1_cntrl6.L1IcacheMemory_total_misses: 0
@@ -530,16 +530,16 @@ Cache Stats: system.l1_cntrl6.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl6.L1DcacheMemory
-  system.l1_cntrl6.L1DcacheMemory_total_misses: 76915
-  system.l1_cntrl6.L1DcacheMemory_total_demand_misses: 76915
+  system.l1_cntrl6.L1DcacheMemory_total_misses: 77068
+  system.l1_cntrl6.L1DcacheMemory_total_demand_misses: 77068
   system.l1_cntrl6.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl6.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl6.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl6.L1DcacheMemory_request_type_LD:   64.9938%
-  system.l1_cntrl6.L1DcacheMemory_request_type_ST:   35.0062%
+  system.l1_cntrl6.L1DcacheMemory_request_type_LD:   65.1697%
+  system.l1_cntrl6.L1DcacheMemory_request_type_ST:   34.8303%
 
-  system.l1_cntrl6.L1DcacheMemory_access_mode_type_Supervisor:   76915    100%
+  system.l1_cntrl6.L1DcacheMemory_access_mode_type_Supervisor:   77068    100%
 
 Cache Stats: system.l1_cntrl7.L1IcacheMemory
   system.l1_cntrl7.L1IcacheMemory_total_misses: 0
@@ -550,95 +550,96 @@ Cache Stats: system.l1_cntrl7.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl7.L1DcacheMemory
-  system.l1_cntrl7.L1DcacheMemory_total_misses: 77037
-  system.l1_cntrl7.L1DcacheMemory_total_demand_misses: 77037
+  system.l1_cntrl7.L1DcacheMemory_total_misses: 76153
+  system.l1_cntrl7.L1DcacheMemory_total_demand_misses: 76153
   system.l1_cntrl7.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl7.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl7.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl7.L1DcacheMemory_request_type_LD:   65.0519%
-  system.l1_cntrl7.L1DcacheMemory_request_type_ST:   34.9481%
+  system.l1_cntrl7.L1DcacheMemory_request_type_LD:   64.9285%
+  system.l1_cntrl7.L1DcacheMemory_request_type_ST:   35.0715%
 
-  system.l1_cntrl7.L1DcacheMemory_access_mode_type_Supervisor:   77037    100%
+  system.l1_cntrl7.L1DcacheMemory_access_mode_type_Supervisor:   76153    100%
 
 Cache Stats: system.l2_cntrl0.L2cacheMemory
-  system.l2_cntrl0.L2cacheMemory_total_misses: 613380
-  system.l2_cntrl0.L2cacheMemory_total_demand_misses: 613380
+  system.l2_cntrl0.L2cacheMemory_total_misses: 611800
+  system.l2_cntrl0.L2cacheMemory_total_demand_misses: 611800
   system.l2_cntrl0.L2cacheMemory_total_prefetches: 0
   system.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0
   system.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0
 
-  system.l2_cntrl0.L2cacheMemory_request_type_GETS:   64.9578%
-  system.l2_cntrl0.L2cacheMemory_request_type_GETX:   35.0422%
+  system.l2_cntrl0.L2cacheMemory_request_type_GETS:   64.9608%
+  system.l2_cntrl0.L2cacheMemory_request_type_GETX:   35.0391%
+  system.l2_cntrl0.L2cacheMemory_request_type_UPGRADE:   0.000163452%
 
-  system.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor:   613380    100%
+  system.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor:   611800    100%
 
  --- L2Cache ---
  - Event Counts -
 L1_GET_INSTR [0 ] 0
-L1_GETS [400269 ] 400269
-L1_GETX [217488 ] 217488
+L1_GETS [399269 ] 399269
+L1_GETX [216713 ] 216713
 L1_UPGRADE [0 ] 0
-L1_PUTX [44208 ] 44208
-L1_PUTX_old [269254 ] 269254
+L1_PUTX [22133 ] 22133
+L1_PUTX_old [305447 ] 305447
 Fwd_L1_GETX [0 ] 0
 Fwd_L1_GETS [0 ] 0
 Fwd_L1_GET_INSTR [0 ] 0
-L2_Replacement [16468 ] 16468
-L2_Replacement_clean [4206008 ] 4206008
-Mem_Data [607873 ] 607873
-Mem_Ack [607869 ] 607869
-WB_Data [199304 ] 199304
-WB_Data_clean [171738 ] 171738
-Ack [3800 ] 3800
-Ack_all [195623 ] 195623
-Unblock [1127 ] 1127
+L2_Replacement [8370 ] 8370
+L2_Replacement_clean [4599562 ] 4599562
+Mem_Data [606455 ] 606455
+Mem_Ack [606448 ] 606448
+WB_Data [206700 ] 206700
+WB_Data_clean [193181 ] 193181
+Ack [3670 ] 3670
+Ack_all [187586 ] 187586
+Unblock [1225 ] 1225
 Unblock_Cancel [0 ] 0
-Exclusive_Unblock [606929 ] 606929
+Exclusive_Unblock [605697 ] 605697
 MEM_Inv [0 ] 0
 
  - Transitions -
 NP  L1_GET_INSTR [0 ] 0
-NP  L1_GETS [394631 ] 394631
-NP  L1_GETX [213248 ] 213248
+NP  L1_GETS [393757 ] 393757
+NP  L1_GETX [212704 ] 212704
 NP  L1_PUTX [0 ] 0
-NP  L1_PUTX_old [248888 ] 248888
+NP  L1_PUTX_old [283735 ] 283735
 
 SS  L1_GET_INSTR [0 ] 0
-SS  L1_GETS [2 ] 2
+SS  L1_GETS [6 ] 6
 SS  L1_GETX [9 ] 9
 SS  L1_UPGRADE [0 ] 0
-SS  L1_PUTX [416 ] 416
-SS  L1_PUTX_old [0 ] 0
-SS  L2_Replacement [1048 ] 1048
-SS  L2_Replacement_clean [2743 ] 2743
+SS  L1_PUTX [508 ] 508
+SS  L1_PUTX_old [1 ] 1
+SS  L2_Replacement [1138 ] 1138
+SS  L2_Replacement_clean [2522 ] 2522
 SS  MEM_Inv [0 ] 0
 
 M  L1_GET_INSTR [0 ] 0
-M  L1_GETS [19 ] 19
-M  L1_GETX [8 ] 8
+M  L1_GETS [8 ] 8
+M  L1_GETX [4 ] 4
 M  L1_PUTX [0 ] 0
 M  L1_PUTX_old [0 ] 0
-M  L2_Replacement [15037 ] 15037
-M  L2_Replacement_clean [27295 ] 27295
+M  L2_Replacement [7079 ] 7079
+M  L2_Replacement_clean [13130 ] 13130
 M  MEM_Inv [0 ] 0
 
 MT  L1_GET_INSTR [0 ] 0
-MT  L1_GETS [1127 ] 1127
-MT  L1_GETX [1694 ] 1694
-MT  L1_PUTX [42359 ] 42359
-MT  L1_PUTX_old [642 ] 642
-MT  L2_Replacement [14 ] 14
-MT  L2_Replacement_clean [561734 ] 561734
+MT  L1_GETS [1225 ] 1225
+MT  L1_GETX [1666 ] 1666
+MT  L1_PUTX [20221 ] 20221
+MT  L1_PUTX_old [740 ] 740
+MT  L2_Replacement [6 ] 6
+MT  L2_Replacement_clean [582578 ] 582578
 MT  MEM_Inv [0 ] 0
 
 M_I  L1_GET_INSTR [0 ] 0
-M_I  L1_GETS [322 ] 322
-M_I  L1_GETX [188 ] 188
+M_I  L1_GETS [228 ] 228
+M_I  L1_GETX [121 ] 121
 M_I  L1_UPGRADE [0 ] 0
 M_I  L1_PUTX [0 ] 0
-M_I  L1_PUTX_old [16257 ] 16257
-M_I  Mem_Ack [607869 ] 607869
+M_I  L1_PUTX_old [14216 ] 14216
+M_I  Mem_Ack [606448 ] 606448
 M_I  MEM_Inv [0 ] 0
 
 MT_I  L1_GET_INSTR [0 ] 0
@@ -649,18 +650,18 @@ MT_I  L1_PUTX [0 ] 0
 MT_I  L1_PUTX_old [0 ] 0
 MT_I  WB_Data [4 ] 4
 MT_I  WB_Data_clean [0 ] 0
-MT_I  Ack_all [10 ] 10
+MT_I  Ack_all [2 ] 2
 MT_I  MEM_Inv [0 ] 0
 
 MCT_I  L1_GET_INSTR [0 ] 0
-MCT_I  L1_GETS [46 ] 46
-MCT_I  L1_GETX [87 ] 87
+MCT_I  L1_GETS [77 ] 77
+MCT_I  L1_GETX [88 ] 88
 MCT_I  L1_UPGRADE [0 ] 0
 MCT_I  L1_PUTX [0 ] 0
-MCT_I  L1_PUTX_old [3034 ] 3034
-MCT_I  WB_Data [198250 ] 198250
-MCT_I  WB_Data_clean [171661 ] 171661
-MCT_I  Ack_all [191822 ] 191822
+MCT_I  L1_PUTX_old [6206 ] 6206
+MCT_I  WB_Data [205555 ] 205555
+MCT_I  WB_Data_clean [193097 ] 193097
+MCT_I  Ack_all [183924 ] 183924
 
 I_I  L1_GET_INSTR [0 ] 0
 I_I  L1_GETS [0 ] 0
@@ -668,71 +669,71 @@ I_I  L1_GETX [0 ] 0
 I_I  L1_UPGRADE [0 ] 0
 I_I  L1_PUTX [0 ] 0
 I_I  L1_PUTX_old [0 ] 0
-I_I  Ack [2751 ] 2751
-I_I  Ack_all [2743 ] 2743
+I_I  Ack [2527 ] 2527
+I_I  Ack_all [2522 ] 2522
 
 S_I  L1_GET_INSTR [0 ] 0
 S_I  L1_GETS [0 ] 0
 S_I  L1_GETX [0 ] 0
 S_I  L1_UPGRADE [0 ] 0
 S_I  L1_PUTX [0 ] 0
-S_I  L1_PUTX_old [3 ] 3
-S_I  Ack [1049 ] 1049
-S_I  Ack_all [1048 ] 1048
+S_I  L1_PUTX_old [1 ] 1
+S_I  Ack [1143 ] 1143
+S_I  Ack_all [1138 ] 1138
 S_I  MEM_Inv [0 ] 0
 
 ISS  L1_GET_INSTR [0 ] 0
-ISS  L1_GETS [2673 ] 2673
-ISS  L1_GETX [1435 ] 1435
+ISS  L1_GETS [2444 ] 2444
+ISS  L1_GETX [1295 ] 1295
 ISS  L1_PUTX [0 ] 0
-ISS  L1_PUTX_old [151 ] 151
+ISS  L1_PUTX_old [243 ] 243
 ISS  L2_Replacement [0 ] 0
-ISS  L2_Replacement_clean [2322371 ] 2322371
-ISS  Mem_Data [391952 ] 391952
+ISS  L2_Replacement_clean [2151771 ] 2151771
+ISS  Mem_Data [391309 ] 391309
 ISS  MEM_Inv [0 ] 0
 
 IS  L1_GET_INSTR [0 ] 0
-IS  L1_GETS [7 ] 7
-IS  L1_GETX [2 ] 2
+IS  L1_GETS [4 ] 4
+IS  L1_GETX [1 ] 1
 IS  L1_PUTX [0 ] 0
-IS  L1_PUTX_old [1 ] 1
+IS  L1_PUTX_old [0 ] 0
 IS  L2_Replacement [0 ] 0
-IS  L2_Replacement_clean [15202 ] 15202
-IS  Mem_Data [2673 ] 2673
+IS  L2_Replacement_clean [13480 ] 13480
+IS  Mem_Data [2444 ] 2444
 IS  MEM_Inv [0 ] 0
 
 IM  L1_GET_INSTR [0 ] 0
-IM  L1_GETS [1428 ] 1428
-IM  L1_GETX [804 ] 804
+IM  L1_GETS [1368 ] 1368
+IM  L1_GETX [720 ] 720
 IM  L1_PUTX [0 ] 0
-IM  L1_PUTX_old [275 ] 275
+IM  L1_PUTX_old [302 ] 302
 IM  L2_Replacement [0 ] 0
-IM  L2_Replacement_clean [1265010 ] 1265010
-IM  Mem_Data [213248 ] 213248
+IM  L2_Replacement_clean [1171194 ] 1171194
+IM  Mem_Data [212702 ] 212702
 IM  MEM_Inv [0 ] 0
 
 SS_MB  L1_GET_INSTR [0 ] 0
 SS_MB  L1_GETS [0 ] 0
 SS_MB  L1_GETX [0 ] 0
 SS_MB  L1_UPGRADE [0 ] 0
-SS_MB  L1_PUTX [2 ] 2
+SS_MB  L1_PUTX [3 ] 3
 SS_MB  L1_PUTX_old [0 ] 0
-SS_MB  L2_Replacement [9 ] 9
-SS_MB  L2_Replacement_clean [0 ] 0
+SS_MB  L2_Replacement [0 ] 0
+SS_MB  L2_Replacement_clean [12 ] 12
 SS_MB  Unblock_Cancel [0 ] 0
 SS_MB  Exclusive_Unblock [9 ] 9
 SS_MB  MEM_Inv [0 ] 0
 
 MT_MB  L1_GET_INSTR [0 ] 0
-MT_MB  L1_GETS [12 ] 12
-MT_MB  L1_GETX [10 ] 10
+MT_MB  L1_GETS [146 ] 146
+MT_MB  L1_GETX [101 ] 101
 MT_MB  L1_UPGRADE [0 ] 0
-MT_MB  L1_PUTX [882 ] 882
-MT_MB  L1_PUTX_old [3 ] 3
+MT_MB  L1_PUTX [838 ] 838
+MT_MB  L1_PUTX_old [1 ] 1
 MT_MB  L2_Replacement [0 ] 0
-MT_MB  L2_Replacement_clean [10256 ] 10256
+MT_MB  L2_Replacement_clean [661724 ] 661724
 MT_MB  Unblock_Cancel [0 ] 0
-MT_MB  Exclusive_Unblock [606920 ] 606920
+MT_MB  Exclusive_Unblock [605688 ] 605688
 MT_MB  MEM_Inv [0 ] 0
 
 M_MB  L1_GET_INSTR [0 ] 0
@@ -747,16 +748,16 @@ M_MB  Exclusive_Unblock [0 ] 0
 M_MB  MEM_Inv [0 ] 0
 
 MT_IIB  L1_GET_INSTR [0 ] 0
-MT_IIB  L1_GETS [2 ] 2
-MT_IIB  L1_GETX [3 ] 3
+MT_IIB  L1_GETS [6 ] 6
+MT_IIB  L1_GETX [4 ] 4
 MT_IIB  L1_UPGRADE [0 ] 0
-MT_IIB  L1_PUTX [549 ] 549
-MT_IIB  L1_PUTX_old [0 ] 0
+MT_IIB  L1_PUTX [563 ] 563
+MT_IIB  L1_PUTX_old [2 ] 2
 MT_IIB  L2_Replacement [0 ] 0
-MT_IIB  L2_Replacement_clean [1396 ] 1396
-MT_IIB  WB_Data [1014 ] 1014
-MT_IIB  WB_Data_clean [49 ] 49
-MT_IIB  Unblock [64 ] 64
+MT_IIB  L2_Replacement_clean [3123 ] 3123
+MT_IIB  WB_Data [791 ] 791
+MT_IIB  WB_Data_clean [46 ] 46
+MT_IIB  Unblock [388 ] 388
 MT_IIB  MEM_Inv [0 ] 0
 
 MT_IB  L1_GET_INSTR [0 ] 0
@@ -766,9 +767,9 @@ MT_IB  L1_UPGRADE [0 ] 0
 MT_IB  L1_PUTX [0 ] 0
 MT_IB  L1_PUTX_old [0 ] 0
 MT_IB  L2_Replacement [0 ] 0
-MT_IB  L2_Replacement_clean [0 ] 0
-MT_IB  WB_Data [36 ] 36
-MT_IB  WB_Data_clean [28 ] 28
+MT_IB  L2_Replacement_clean [28 ] 28
+MT_IB  WB_Data [350 ] 350
+MT_IB  WB_Data_clean [38 ] 38
 MT_IB  Unblock_Cancel [0 ] 0
 MT_IB  MEM_Inv [0 ] 0
 
@@ -778,43 +779,43 @@ MT_SB  L1_GETX [0 ] 0
 MT_SB  L1_UPGRADE [0 ] 0
 MT_SB  L1_PUTX [0 ] 0
 MT_SB  L1_PUTX_old [0 ] 0
-MT_SB  L2_Replacement [360 ] 360
-MT_SB  L2_Replacement_clean [1 ] 1
-MT_SB  Unblock [1063 ] 1063
+MT_SB  L2_Replacement [147 ] 147
+MT_SB  L2_Replacement_clean [0 ] 0
+MT_SB  Unblock [837 ] 837
 MT_SB  MEM_Inv [0 ] 0
 
 Memory controller: system.dir_cntrl0.memBuffer:
-  memory_total_requests: 822228
-  memory_reads: 607877
-  memory_writes: 214348
-  memory_refreshes: 46866
-  memory_total_request_delays: 11056095
-  memory_delays_per_request: 13.4465
-  memory_delays_in_input_queue: 305324
-  memory_delays_behind_head_of_bank_queue: 1501538
-  memory_delays_stalled_at_head_of_bank_queue: 9249233
-  memory_stalls_for_bank_busy: 1604583
+  memory_total_requests: 820237
+  memory_reads: 606457
+  memory_writes: 213778
+  memory_refreshes: 50537
+  memory_total_request_delays: 5712055
+  memory_delays_per_request: 6.96391
+  memory_delays_in_input_queue: 173579
+  memory_delays_behind_head_of_bank_queue: 420205
+  memory_delays_stalled_at_head_of_bank_queue: 5118271
+  memory_stalls_for_bank_busy: 997464
   memory_stalls_for_random_busy: 0
-  memory_stalls_for_anti_starvation: 760549
-  memory_stalls_for_arbitration: 1893614
-  memory_stalls_for_bus: 2911518
+  memory_stalls_for_anti_starvation: 191989
+  memory_stalls_for_arbitration: 983802
+  memory_stalls_for_bus: 1595683
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 1476231
-  memory_stalls_for_read_read_turnaround: 602738
-  accesses_per_bank: 25852  25458  25588  25863  25866  25734  25935  25720  25907  25655  25734  25844  25494  25550  25672  25550  25617  25674  25773  25682  25816  25648  25748  25552  25632  25308  25669  25310  25655  25850  26059  25813  
+  memory_stalls_for_read_write_turnaround: 933914
+  memory_stalls_for_read_read_turnaround: 415419
+  accesses_per_bank: 25814  25380  25554  25794  25830  25689  25895  25624  25814  25591  25638  25766  25376  25470  25597  25469  25579  25623  25682  25615  25713  25607  25737  25536  25557  25222  25632  25231  25594  25826  25962  25820  
 
  --- Directory ---
  - Event Counts -
-Fetch [607879 ] 607879
-Data [214349 ] 214349
-Memory_Data [607873 ] 607873
-Memory_Ack [214348 ] 214348
+Fetch [606459 ] 606459
+Data [213778 ] 213778
+Memory_Data [606456 ] 606456
+Memory_Ack [213775 ] 213775
 DMA_READ [0 ] 0
 DMA_WRITE [0 ] 0
-CleanReplacement [393521 ] 393521
+CleanReplacement [392673 ] 392673
 
  - Transitions -
-I  Fetch [607879 ] 607879
+I  Fetch [606459 ] 606459
 I  DMA_READ [0 ] 0
 I  DMA_WRITE [0 ] 0
 
@@ -830,20 +831,20 @@ ID_W  Memory_Ack [0 ] 0
 ID_W  DMA_READ [0 ] 0
 ID_W  DMA_WRITE [0 ] 0
 
-M  Data [214349 ] 214349
+M  Data [213778 ] 213778
 M  DMA_READ [0 ] 0
 M  DMA_WRITE [0 ] 0
-M  CleanReplacement [393521 ] 393521
+M  CleanReplacement [392673 ] 392673
 
 IM  Fetch [0 ] 0
 IM  Data [0 ] 0
-IM  Memory_Data [607873 ] 607873
+IM  Memory_Data [606456 ] 606456
 IM  DMA_READ [0 ] 0
 IM  DMA_WRITE [0 ] 0
 
 MI  Fetch [0 ] 0
 MI  Data [0 ] 0
-MI  Memory_Ack [214348 ] 214348
+MI  Memory_Ack [213775 ] 213775
 MI  DMA_READ [0 ] 0
 MI  DMA_WRITE [0 ] 0
 

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr
index ed079c69ccdbb305fea89ceb621c5c174831023e..c95b867cbcad057547eb4cfb1a6b0d08d6833e81 100755 (executable)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr
@@ -1,74 +1,74 @@
-system.cpu7: completed 10000 read, 5315 write accesses @2178175
-system.cpu3: completed 10000 read, 5321 write accesses @2258665
-system.cpu4: completed 10000 read, 5425 write accesses @2267755
-system.cpu6: completed 10000 read, 5427 write accesses @2268141
-system.cpu0: completed 10000 read, 5406 write accesses @2273125
-system.cpu1: completed 10000 read, 5452 write accesses @2273264
-system.cpu5: completed 10000 read, 5563 write accesses @2285825
-system.cpu2: completed 10000 read, 5393 write accesses @2319830
-system.cpu6: completed 20000 read, 10754 write accesses @4478934
-system.cpu7: completed 20000 read, 10722 write accesses @4479230
-system.cpu3: completed 20000 read, 10700 write accesses @4490364
-system.cpu1: completed 20000 read, 10770 write accesses @4490415
-system.cpu2: completed 20000 read, 10639 write accesses @4498895
-system.cpu5: completed 20000 read, 10822 write accesses @4521505
-system.cpu4: completed 20000 read, 10759 write accesses @4557615
-system.cpu0: completed 20000 read, 10835 write accesses @4559745
-system.cpu2: completed 30000 read, 15995 write accesses @6715895
-system.cpu6: completed 30000 read, 16176 write accesses @6737577
-system.cpu7: completed 30000 read, 16133 write accesses @6741445
-system.cpu5: completed 30000 read, 16232 write accesses @6761017
-system.cpu1: completed 30000 read, 16230 write accesses @6767058
-system.cpu3: completed 30000 read, 16227 write accesses @6779365
-system.cpu4: completed 30000 read, 16123 write accesses @6794365
-system.cpu0: completed 30000 read, 16180 write accesses @6842625
-system.cpu5: completed 40000 read, 21501 write accesses @9004145
-system.cpu3: completed 40000 read, 21499 write accesses @9006504
-system.cpu6: completed 40000 read, 21666 write accesses @9018985
-system.cpu4: completed 40000 read, 21471 write accesses @9035325
-system.cpu7: completed 40000 read, 21682 write accesses @9038295
-system.cpu2: completed 40000 read, 21469 write accesses @9046715
-system.cpu1: completed 40000 read, 21651 write accesses @9051455
-system.cpu0: completed 40000 read, 21538 write accesses @9086675
-system.cpu6: completed 50000 read, 27114 write accesses @11277374
-system.cpu3: completed 50000 read, 26914 write accesses @11278005
-system.cpu7: completed 50000 read, 27059 write accesses @11289715
-system.cpu5: completed 50000 read, 26974 write accesses @11300494
-system.cpu2: completed 50000 read, 27018 write accesses @11307085
-system.cpu1: completed 50000 read, 26955 write accesses @11338755
-system.cpu0: completed 50000 read, 26964 write accesses @11375085
-system.cpu4: completed 50000 read, 26957 write accesses @11429764
-system.cpu6: completed 60000 read, 32482 write accesses @13471525
-system.cpu3: completed 60000 read, 32172 write accesses @13503805
-system.cpu5: completed 60000 read, 32381 write accesses @13517804
-system.cpu7: completed 60000 read, 32276 write accesses @13525105
-system.cpu2: completed 60000 read, 32332 write accesses @13536245
-system.cpu1: completed 60000 read, 32320 write accesses @13562114
-system.cpu0: completed 60000 read, 32359 write accesses @13656465
-system.cpu4: completed 60000 read, 32583 write accesses @13754744
-system.cpu5: completed 70000 read, 37779 write accesses @15741524
-system.cpu3: completed 70000 read, 37626 write accesses @15742775
-system.cpu6: completed 70000 read, 37950 write accesses @15755405
-system.cpu7: completed 70000 read, 37483 write accesses @15767164
-system.cpu1: completed 70000 read, 37652 write accesses @15806815
-system.cpu2: completed 70000 read, 37653 write accesses @15812414
-system.cpu0: completed 70000 read, 37652 write accesses @15945564
-system.cpu4: completed 70000 read, 37919 write accesses @15985575
-system.cpu7: completed 80000 read, 42762 write accesses @17959865
-system.cpu5: completed 80000 read, 43041 write accesses @17974164
-system.cpu3: completed 80000 read, 42943 write accesses @17982045
-system.cpu6: completed 80000 read, 43147 write accesses @17984384
-system.cpu1: completed 80000 read, 42940 write accesses @18041354
-system.cpu2: completed 80000 read, 43118 write accesses @18148206
-system.cpu0: completed 80000 read, 42966 write accesses @18152744
-system.cpu4: completed 80000 read, 43236 write accesses @18256215
-system.cpu5: completed 90000 read, 48432 write accesses @20226495
-system.cpu6: completed 90000 read, 48567 write accesses @20256365
-system.cpu7: completed 90000 read, 48171 write accesses @20262095
-system.cpu3: completed 90000 read, 48375 write accesses @20266104
-system.cpu1: completed 90000 read, 48524 write accesses @20337685
-system.cpu0: completed 90000 read, 48274 write accesses @20381074
-system.cpu2: completed 90000 read, 48595 write accesses @20447365
-system.cpu4: completed 90000 read, 48684 write accesses @20509404
-system.cpu3: completed 100000 read, 53763 write accesses @22495354
+system.cpu6: completed 10000 read, 5365 write accesses @719672
+system.cpu4: completed 10000 read, 5437 write accesses @721238
+system.cpu2: completed 10000 read, 5421 write accesses @727405
+system.cpu5: completed 10000 read, 5337 write accesses @728640
+system.cpu1: completed 10000 read, 5306 write accesses @739695
+system.cpu0: completed 10000 read, 5242 write accesses @743577
+system.cpu3: completed 10000 read, 5450 write accesses @745629
+system.cpu7: completed 10000 read, 5714 write accesses @748519
+system.cpu6: completed 20000 read, 10620 write accesses @1427013
+system.cpu2: completed 20000 read, 10776 write accesses @1449780
+system.cpu4: completed 20000 read, 10676 write accesses @1454294
+system.cpu5: completed 20000 read, 10664 write accesses @1455327
+system.cpu1: completed 20000 read, 10677 write accesses @1463325
+system.cpu0: completed 20000 read, 10572 write accesses @1473996
+system.cpu7: completed 20000 read, 11108 write accesses @1487052
+system.cpu3: completed 20000 read, 10777 write accesses @1490754
+system.cpu5: completed 30000 read, 16039 write accesses @2158969
+system.cpu6: completed 30000 read, 16167 write accesses @2175252
+system.cpu2: completed 30000 read, 16167 write accesses @2180312
+system.cpu4: completed 30000 read, 16215 write accesses @2190381
+system.cpu0: completed 30000 read, 15974 write accesses @2206091
+system.cpu1: completed 30000 read, 16196 write accesses @2209395
+system.cpu7: completed 30000 read, 16345 write accesses @2219972
+system.cpu3: completed 30000 read, 16078 write accesses @2220143
+system.cpu5: completed 40000 read, 21392 write accesses @2899061
+system.cpu2: completed 40000 read, 21496 write accesses @2899829
+system.cpu6: completed 40000 read, 21553 write accesses @2911614
+system.cpu4: completed 40000 read, 21511 write accesses @2932562
+system.cpu1: completed 40000 read, 21671 write accesses @2938496
+system.cpu0: completed 40000 read, 21461 write accesses @2955945
+system.cpu3: completed 40000 read, 21481 write accesses @2956326
+system.cpu7: completed 40000 read, 21787 write accesses @2958263
+system.cpu2: completed 50000 read, 26881 write accesses @3632427
+system.cpu5: completed 50000 read, 26798 write accesses @3647589
+system.cpu6: completed 50000 read, 27058 write accesses @3655170
+system.cpu4: completed 50000 read, 26812 write accesses @3655319
+system.cpu1: completed 50000 read, 27071 write accesses @3688858
+system.cpu3: completed 50000 read, 26791 write accesses @3690833
+system.cpu0: completed 50000 read, 27081 write accesses @3690860
+system.cpu7: completed 50000 read, 27296 write accesses @3707477
+system.cpu2: completed 60000 read, 32129 write accesses @4356825
+system.cpu5: completed 60000 read, 32023 write accesses @4371741
+system.cpu6: completed 60000 read, 32443 write accesses @4376668
+system.cpu4: completed 60000 read, 32295 write accesses @4386108
+system.cpu3: completed 60000 read, 32175 write accesses @4408668
+system.cpu0: completed 60000 read, 32420 write accesses @4415861
+system.cpu1: completed 60000 read, 32486 write accesses @4431347
+system.cpu7: completed 60000 read, 32741 write accesses @4445010
+system.cpu2: completed 70000 read, 37617 write accesses @5091246
+system.cpu5: completed 70000 read, 37377 write accesses @5103537
+system.cpu4: completed 70000 read, 37661 write accesses @5110093
+system.cpu6: completed 70000 read, 37706 write accesses @5114409
+system.cpu3: completed 70000 read, 37523 write accesses @5122627
+system.cpu0: completed 70000 read, 37790 write accesses @5150115
+system.cpu7: completed 70000 read, 38053 write accesses @5173503
+system.cpu1: completed 70000 read, 37871 write accesses @5177041
+system.cpu2: completed 80000 read, 42964 write accesses @5827270
+system.cpu5: completed 80000 read, 42671 write accesses @5843646
+system.cpu4: completed 80000 read, 42873 write accesses @5844336
+system.cpu3: completed 80000 read, 42910 write accesses @5844576
+system.cpu6: completed 80000 read, 43090 write accesses @5845119
+system.cpu0: completed 80000 read, 43048 write accesses @5875184
+system.cpu1: completed 80000 read, 43196 write accesses @5885103
+system.cpu7: completed 80000 read, 43360 write accesses @5912912
+system.cpu2: completed 90000 read, 48230 write accesses @6556181
+system.cpu6: completed 90000 read, 48543 write accesses @6557564
+system.cpu4: completed 90000 read, 48345 write accesses @6563045
+system.cpu3: completed 90000 read, 48233 write accesses @6584230
+system.cpu5: completed 90000 read, 48065 write accesses @6589320
+system.cpu0: completed 90000 read, 48648 write accesses @6625439
+system.cpu1: completed 90000 read, 48656 write accesses @6633753
+system.cpu7: completed 90000 read, 48776 write accesses @6656500
+system.cpu2: completed 100000 read, 53615 write accesses @7277301
 hack: be nice to actually delete the event here

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout
index 03d3ca43380a4cc16e20a3c618dfa7df176c9150..f5c3907467e5c6962c91eb680d756f9a5da59f22 100755 (executable)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout
@@ -1,10 +1,12 @@
+Redirecting stdout to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 28 2012 11:30:15
-gem5 started Jul 28 2012 11:35:39
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 14:01:54
+gem5 started Sep  1 2012 14:03:16
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MESI_CMP_directory/gem5.opt -d build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 22495354 because maximum number of loads reached
+Exiting @ tick 7277301 because maximum number of loads reached

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt
index 4767c14b2d6e9f1cd506c51eb2b3dcaa5c0b68fa..c1652737d53d87f5b0455415806ee4a75f92dfff 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt
@@ -1,12 +1,12 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.022495                       # Number of seconds simulated
-sim_ticks                                    22495354                       # Number of ticks simulated
-final_tick                                   22495354                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.007277                       # Number of seconds simulated
+sim_ticks                                     7277301                       # Number of ticks simulated
+final_tick                                    7277301                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_tick_rate                                 269371                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 378776                       # Number of bytes of host memory used
-host_seconds                                    83.51                       # Real time elapsed on the host
+host_tick_rate                                  75137                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 410244                       # Number of bytes of host memory used
+host_seconds                                    96.85                       # Real time elapsed on the host
 system.l1_cntrl4.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl4.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl4.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads
@@ -109,29 +109,29 @@ system.l2_cntrl0.L2cacheMemory.num_tag_array_reads            0
 system.l2_cntrl0.L2cacheMemory.num_tag_array_writes            0                       # number of tag array writes
 system.l2_cntrl0.L2cacheMemory.num_tag_array_stalls            0                       # number of stalls caused by tag array
 system.l2_cntrl0.L2cacheMemory.num_data_array_stalls            0                       # number of stalls caused by data array
-system.cpu0.num_reads                           99326                       # number of read accesses completed
-system.cpu0.num_writes                          53132                       # number of write accesses completed
+system.cpu0.num_reads                           98746                       # number of read accesses completed
+system.cpu0.num_writes                          53285                       # number of write accesses completed
 system.cpu0.num_copies                              0                       # number of copy accesses completed
-system.cpu1.num_reads                           99634                       # number of read accesses completed
-system.cpu1.num_writes                          53798                       # number of write accesses completed
+system.cpu1.num_reads                           98932                       # number of read accesses completed
+system.cpu1.num_writes                          53387                       # number of write accesses completed
 system.cpu1.num_copies                              0                       # number of copy accesses completed
-system.cpu2.num_reads                           99031                       # number of read accesses completed
-system.cpu2.num_writes                          53441                       # number of write accesses completed
+system.cpu2.num_reads                          100001                       # number of read accesses completed
+system.cpu2.num_writes                          53615                       # number of write accesses completed
 system.cpu2.num_copies                              0                       # number of copy accesses completed
-system.cpu3.num_reads                          100000                       # number of read accesses completed
-system.cpu3.num_writes                          53763                       # number of write accesses completed
+system.cpu3.num_reads                           99438                       # number of read accesses completed
+system.cpu3.num_writes                          53391                       # number of write accesses completed
 system.cpu3.num_copies                              0                       # number of copy accesses completed
-system.cpu4.num_reads                           98726                       # number of read accesses completed
-system.cpu4.num_writes                          53438                       # number of write accesses completed
+system.cpu4.num_reads                           99851                       # number of read accesses completed
+system.cpu4.num_writes                          53668                       # number of write accesses completed
 system.cpu4.num_copies                              0                       # number of copy accesses completed
-system.cpu5.num_reads                           99955                       # number of read accesses completed
-system.cpu5.num_writes                          53794                       # number of write accesses completed
+system.cpu5.num_reads                           99263                       # number of read accesses completed
+system.cpu5.num_writes                          53077                       # number of write accesses completed
 system.cpu5.num_copies                              0                       # number of copy accesses completed
-system.cpu6.num_reads                           99893                       # number of read accesses completed
-system.cpu6.num_writes                          53796                       # number of write accesses completed
+system.cpu6.num_reads                           99775                       # number of read accesses completed
+system.cpu6.num_writes                          53756                       # number of write accesses completed
 system.cpu6.num_copies                              0                       # number of copy accesses completed
-system.cpu7.num_reads                           99993                       # number of read accesses completed
-system.cpu7.num_writes                          53567                       # number of write accesses completed
+system.cpu7.num_reads                           98608                       # number of read accesses completed
+system.cpu7.num_writes                          53419                       # number of write accesses completed
 system.cpu7.num_copies                              0                       # number of copy accesses completed
 
 ---------- End Simulation Statistics   ----------

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/config.ini b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/config.ini
index 604f91d2aa9f031d3035531e7dca4de603157c8e..42b10fe120520b13b736646796b394c1ac6c02a4 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/config.ini
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 dir_cntrl0 funcbus funcmem l1_cntrl0 l1_cntrl1 l1_cntrl2 l1_cntrl3 l1_cntrl4 l1_cntrl5 l1_cntrl6 l1_cntrl7 l2_cntrl0 physmem ruby sys_port_proxy
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -30,6 +31,7 @@ system_port=system.sys_port_proxy.slave[0]
 [system.cpu0]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -48,6 +50,7 @@ test=system.l1_cntrl0.sequencer.slave[0]
 [system.cpu1]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -66,6 +69,7 @@ test=system.l1_cntrl1.sequencer.slave[0]
 [system.cpu2]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -84,6 +88,7 @@ test=system.l1_cntrl2.sequencer.slave[0]
 [system.cpu3]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -102,6 +107,7 @@ test=system.l1_cntrl3.sequencer.slave[0]
 [system.cpu4]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -120,6 +126,7 @@ test=system.l1_cntrl4.sequencer.slave[0]
 [system.cpu5]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -138,6 +145,7 @@ test=system.l1_cntrl5.sequencer.slave[0]
 [system.cpu6]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -156,6 +164,7 @@ test=system.l1_cntrl6.sequencer.slave[0]
 [system.cpu7]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -200,9 +209,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -211,6 +220,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -226,6 +236,7 @@ slave=system.cpu0.functional system.cpu1.functional system.cpu2.functional syste
 
 [system.funcmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=false
@@ -284,6 +295,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -345,6 +357,7 @@ tagArrayBanks=1
 [system.l1_cntrl1.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl1.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl1.L1IcacheMemory
@@ -406,6 +419,7 @@ tagArrayBanks=1
 [system.l1_cntrl2.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl2.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl2.L1IcacheMemory
@@ -467,6 +481,7 @@ tagArrayBanks=1
 [system.l1_cntrl3.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl3.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl3.L1IcacheMemory
@@ -528,6 +543,7 @@ tagArrayBanks=1
 [system.l1_cntrl4.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl4.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl4.L1IcacheMemory
@@ -589,6 +605,7 @@ tagArrayBanks=1
 [system.l1_cntrl5.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl5.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl5.L1IcacheMemory
@@ -650,6 +667,7 @@ tagArrayBanks=1
 [system.l1_cntrl6.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl6.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl6.L1IcacheMemory
@@ -711,6 +729,7 @@ tagArrayBanks=1
 [system.l1_cntrl7.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl7.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl7.L1IcacheMemory
@@ -754,6 +773,7 @@ tagArrayBanks=1
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -1039,6 +1059,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/ruby.stats b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/ruby.stats
index e89f1ba549bc5d799a38e81d783cda5e101b609d..16b970150ccf21b9ad94caf65f2814c8814fa27c 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/ruby.stats
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/ruby.stats
@@ -1,26 +1,26 @@
-Real time: Jul/10/2012 17:44:07
+Real time: Sep/01/2012 14:14:37
 
 Profiler Stats
 --------------
-Elapsed_time_in_seconds: 384
-Elapsed_time_in_minutes: 6.4
-Elapsed_time_in_hours: 0.106667
-Elapsed_time_in_days: 0.00444444
+Elapsed_time_in_seconds: 176
+Elapsed_time_in_minutes: 2.93333
+Elapsed_time_in_hours: 0.0488889
+Elapsed_time_in_days: 0.00203704
 
-Virtual_time_in_seconds: 384.6
-Virtual_time_in_minutes: 6.41
-Virtual_time_in_hours:   0.106833
-Virtual_time_in_days:    0.00445139
+Virtual_time_in_seconds: 175.42
+Virtual_time_in_minutes: 2.92367
+Virtual_time_in_hours:   0.0487278
+Virtual_time_in_days:    0.00203032
 
-Ruby_current_time: 19400856
+Ruby_current_time: 7493512
 Ruby_start_time: 0
-Ruby_cycles: 19400856
+Ruby_cycles: 7493512
 
-mbytes_resident: 59.9727
-mbytes_total: 371.66
-resident_ratio: 0.161375
+mbytes_resident: 65.4062
+mbytes_total: 400.824
+resident_ratio: 0.163218
 
-ruby_cycles_executed: [ 19400857 19400857 19400857 19400857 19400857 19400857 19400857 19400857 ]
+ruby_cycles_executed: [ 7493513 7493513 7493513 7493513 7493513 7493513 7493513 7493513 ]
 
 Busy Controller Counts:
 L2Cache-0:0  
@@ -31,14 +31,14 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 16 count: 611543 average: 15.9984 | standard deviation: 0.127356 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 611423 ]
+sequencer_requests_outstanding: [binsize: 1 max: 16 count: 620657 average: 15.9984 | standard deviation: 0.126475 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 17 620528 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 4096 max: 471736 count: 611415 average: 4056.74 | standard deviation: 10848.1 | 482227 61326 33739 15196 5426 2164 1259 902 879 774 686 670 594 495 501 448 405 337 306 341 282 251 215 201 194 156 143 114 117 112 82 83 79 67 51 42 52 28 41 40 26 25 30 22 20 22 16 14 10 11 13 11 17 11 13 8 4 14 5 8 6 3 5 5 7 6 2 4 0 7 4 4 5 3 4 3 6 1 0 1 2 0 0 2 3 1 0 0 1 0 0 1 0 0 0 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 4096 max: 429244 count: 397143 average: 4044.81 | standard deviation: 10853.8 | 313465 39785 21824 9849 3461 1435 819 560 574 508 445 442 372 328 331 292 273 221 187 211 183 160 125 135 128 109 87 75 72 68 51 60 53 37 33 28 32 15 27 25 16 16 16 16 14 15 12 8 7 6 6 7 10 7 9 6 2 8 4 4 5 3 4 4 7 3 1 4 0 6 4 4 4 2 1 1 6 1 0 1 1 0 0 1 2 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 4096 max: 471736 count: 214272 average: 4078.85 | standard deviation: 10837.5 | 168762 21541 11915 5347 1965 729 440 342 305 266 241 228 222 167 170 156 132 116 119 130 99 91 90 66 66 47 56 39 45 44 31 23 26 30 18 14 20 13 14 15 10 9 14 6 6 7 4 6 3 5 7 4 7 4 4 2 2 6 1 4 1 0 1 1 0 3 1 0 0 1 0 0 1 1 3 2 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_NULL: [binsize: 4096 max: 471736 count: 611415 average: 4056.74 | standard deviation: 10848.1 | 482227 61326 33739 15196 5426 2164 1259 902 879 774 686 670 594 495 501 448 405 337 306 341 282 251 215 201 194 156 143 114 117 112 82 83 79 67 51 42 52 28 41 40 26 25 30 22 20 22 16 14 10 11 13 11 17 11 13 8 4 14 5 8 6 3 5 5 7 6 2 4 0 7 4 4 5 3 4 3 6 1 0 1 2 0 0 2 3 1 0 0 1 0 0 1 0 0 0 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency: [binsize: 128 max: 18979 count: 620529 average: 1545.38 | standard deviation: 1553.79 | 1251 7856 100163 76282 14460 62295 38374 10797 39586 23348 9455 28279 15726 8383 20606 10995 7552 15239 8212 6568 11607 6167 5765 8648 4770 4882 6826 3823 4218 5260 3048 3485 3996 2475 2918 3204 1942 2389 2426 1748 2004 1941 1392 1599 1513 1138 1276 1120 931 1025 921 758 821 720 590 621 532 537 534 498 383 414 315 316 311 256 244 240 231 195 199 143 149 158 123 137 90 116 96 74 70 84 58 61 55 53 40 35 36 19 29 22 25 34 18 18 22 16 17 14 9 16 12 5 4 8 8 8 9 6 3 2 4 3 2 3 2 2 1 1 0 2 0 0 0 2 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD: [binsize: 128 max: 18979 count: 403016 average: 1547.1 | standard deviation: 1558.02 | 842 5129 65466 49287 9494 40223 24863 7023 25698 15109 6159 18401 10182 5438 13193 7084 4961 9888 5285 4336 7559 4039 3694 5619 3100 3145 4472 2481 2744 3452 1980 2226 2587 1585 1869 2144 1277 1568 1572 1168 1293 1283 918 1042 979 763 821 714 598 677 599 503 543 473 389 397 360 355 363 312 249 267 213 203 208 177 153 156 145 129 128 88 94 103 82 84 63 80 62 44 47 64 36 43 37 29 25 23 23 11 17 14 20 18 14 14 15 11 12 8 5 11 8 2 4 7 6 5 7 4 3 2 2 2 1 2 1 1 1 1 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST: [binsize: 128 max: 16824 count: 217513 average: 1542.19 | standard deviation: 1545.91 | 409 2727 34697 26995 4966 22072 13511 3774 13888 8239 3296 9878 5544 2945 7413 3911 2591 5351 2927 2232 4048 2128 2071 3029 1670 1737 2354 1342 1474 1808 1068 1259 1409 890 1049 1060 665 821 854 580 711 658 474 557 534 375 455 406 333 348 322 255 278 247 201 224 172 182 171 186 134 147 102 113 103 79 91 84 86 66 71 55 55 55 41 53 27 36 34 30 23 20 22 18 18 24 15 12 13 8 12 8 5 16 4 4 7 5 5 6 4 5 4 3 0 1 2 3 2 2 0 0 2 1 1 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_NULL: [binsize: 128 max: 18979 count: 620529 average: 1545.38 | standard deviation: 1553.79 | 1251 7856 100163 76282 14460 62295 38374 10797 39586 23348 9455 28279 15726 8383 20606 10995 7552 15239 8212 6568 11607 6167 5765 8648 4770 4882 6826 3823 4218 5260 3048 3485 3996 2475 2918 3204 1942 2389 2426 1748 2004 1941 1392 1599 1513 1138 1276 1120 931 1025 921 758 821 720 590 621 532 537 534 498 383 414 315 316 311 256 244 240 231 195 199 143 149 158 123 137 90 116 96 74 70 84 58 61 55 53 40 35 36 19 29 22 25 34 18 18 22 16 17 14 9 16 12 5 4 8 8 8 9 6 3 2 4 3 2 3 2 2 1 1 0 2 0 0 0 2 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -49,8 +49,8 @@ miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: N
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 imcomplete_dir_Times: 0
-miss_latency_LD_NULL: [binsize: 4096 max: 429244 count: 397143 average: 4044.81 | standard deviation: 10853.8 | 313465 39785 21824 9849 3461 1435 819 560 574 508 445 442 372 328 331 292 273 221 187 211 183 160 125 135 128 109 87 75 72 68 51 60 53 37 33 28 32 15 27 25 16 16 16 16 14 15 12 8 7 6 6 7 10 7 9 6 2 8 4 4 5 3 4 4 7 3 1 4 0 6 4 4 4 2 1 1 6 1 0 1 1 0 0 1 2 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_NULL: [binsize: 4096 max: 471736 count: 214272 average: 4078.85 | standard deviation: 10837.5 | 168762 21541 11915 5347 1965 729 440 342 305 266 241 228 222 167 170 156 132 116 119 130 99 91 90 66 66 47 56 39 45 44 31 23 26 30 18 14 20 13 14 15 10 9 14 6 6 7 4 6 3 5 7 4 7 4 4 2 2 6 1 4 1 0 1 1 0 3 1 0 0 1 0 0 1 1 3 2 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_NULL: [binsize: 128 max: 18979 count: 403016 average: 1547.1 | standard deviation: 1558.02 | 842 5129 65466 49287 9494 40223 24863 7023 25698 15109 6159 18401 10182 5438 13193 7084 4961 9888 5285 4336 7559 4039 3694 5619 3100 3145 4472 2481 2744 3452 1980 2226 2587 1585 1869 2144 1277 1568 1572 1168 1293 1283 918 1042 979 763 821 714 598 677 599 503 543 473 389 397 360 355 363 312 249 267 213 203 208 177 153 156 145 129 128 88 94 103 82 84 63 80 62 44 47 64 36 43 37 29 25 23 23 11 17 14 20 18 14 14 15 11 12 8 5 11 8 2 4 7 6 5 7 4 3 2 2 2 1 2 1 1 1 1 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST_NULL: [binsize: 128 max: 16824 count: 217513 average: 1542.19 | standard deviation: 1545.91 | 409 2727 34697 26995 4966 22072 13511 3774 13888 8239 3296 9878 5544 2945 7413 3911 2591 5351 2927 2232 4048 2128 2071 3029 1670 1737 2354 1342 1474 1808 1068 1259 1409 890 1049 1060 665 821 854 580 711 658 474 557 534 375 455 406 333 348 322 255 278 247 201 224 172 182 171 186 134 147 102 113 103 79 91 84 86 66 71 55 55 55 41 53 27 36 34 30 23 20 22 18 18 24 15 12 13 8 12 8 5 16 4 4 7 5 5 6 4 5 4 3 0 1 2 3 2 2 0 0 2 1 1 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -80,302 +80,302 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard dev
 Resource Usage
 --------------
 page_size: 4096
-user_time: 384
+user_time: 175
 system_time: 0
-page_reclaims: 16520
+page_reclaims: 9127
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 224
 
 Network Stats
 -------------
 
-total_msg_count_Request_Control: 3636039 29088312
-total_msg_count_Response_Data: 3604368 259514496
-total_msg_count_ResponseL2hit_Data: 6678 480816
-total_msg_count_ResponseLocal_Data: 24849 1789128
-total_msg_count_Response_Control: 8658 69264
-total_msg_count_Writeback_Data: 2451477 176506344
-total_msg_count_Writeback_Control: 8399094 67192752
-total_msg_count_Forwarded_Control: 24849 198792
-total_msg_count_Invalidate_Control: 69 552
-total_msg_count_Unblock_Control: 3647493 29179944
-total_msgs: 21803574 total_bytes: 564020400
+total_msg_count_Request_Control: 3679260 29434080
+total_msg_count_Response_Data: 3636333 261815976
+total_msg_count_ResponseL2hit_Data: 17784 1280448
+total_msg_count_ResponseLocal_Data: 25080 1805760
+total_msg_count_Response_Control: 8799 70392
+total_msg_count_Writeback_Data: 2483613 178820136
+total_msg_count_Writeback_Control: 8524208 68193664
+total_msg_count_Forwarded_Control: 25080 200640
+total_msg_count_Invalidate_Control: 60 480
+total_msg_count_Unblock_Control: 3701966 29615728
+total_msgs: 22102183 total_bytes: 571237304
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 30.1872
-  links_utilized_percent_switch_0_link_0: 34.22 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 26.1544 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_0_link_0_Request_Control: 611261 4890088 [ 611261 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Response_Data: 600728 43252416 [ 0 0 600728 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Writeback_Data: 604218 43503696 [ 0 0 604218 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Writeback_Control: 1207058 9656464 [ 608536 598522 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Unblock_Control: 615104 4920832 [ 0 0 615104 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Request_Control: 600752 4806016 [ 0 600752 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Response_Data: 600728 43252416 [ 0 0 600728 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_ResponseL2hit_Data: 2226 160272 [ 0 0 2226 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Response_Control: 2863 22904 [ 0 0 2863 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Data: 212941 15331752 [ 0 0 212941 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Control: 1592640 12741120 [ 608536 598523 385581 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Forwarded_Control: 8283 66264 [ 8283 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Invalidate_Control: 23 184 [ 23 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Unblock_Control: 600727 4805816 [ 0 0 600727 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_0: 79.156
+  links_utilized_percent_switch_0_link_0: 89.6643 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 68.6477 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_0_link_0_Request_Control: 620353 4962824 [ 620353 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Data: 606055 43635960 [ 0 0 606055 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Writeback_Data: 612164 44075808 [ 0 0 612164 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Writeback_Control: 1225742 9805936 [ 620153 605589 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Unblock_Control: 627946 5023568 [ 0 0 627946 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Request_Control: 606065 4848520 [ 0 606065 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Response_Data: 606054 43635888 [ 0 0 606054 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_ResponseL2hit_Data: 5928 426816 [ 0 0 5928 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Response_Control: 2913 23304 [ 0 0 2913 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Data: 215707 15530904 [ 0 0 215707 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Control: 1615650 12925200 [ 620153 605615 389882 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Forwarded_Control: 8360 66880 [ 8360 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Invalidate_Control: 20 160 [ 20 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Unblock_Control: 606041 4848328 [ 0 0 606041 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 2.17097
-  links_utilized_percent_switch_1_link_0: 1.97262 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 2.36932 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_1_link_0_Response_Data: 75227 5416344 [ 0 0 75227 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_ResponseL2hit_Data: 255 18360 [ 0 0 255 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_ResponseLocal_Data: 952 68544 [ 0 0 952 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Response_Control: 354 2832 [ 0 0 354 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Writeback_Control: 76111 608888 [ 76111 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Forwarded_Control: 1038 8304 [ 1038 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_1: 5.68681
+  links_utilized_percent_switch_1_link_0: 5.17063 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 6.203 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_1_link_0_Response_Data: 75562 5440464 [ 0 0 75562 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_ResponseL2hit_Data: 740 53280 [ 0 0 740 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_ResponseLocal_Data: 1047 75384 [ 0 0 1047 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Response_Control: 368 2944 [ 0 0 368 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Writeback_Control: 77330 618640 [ 77330 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Forwarded_Control: 1082 8656 [ 1082 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_1_link_0_Invalidate_Control: 2 16 [ 2 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Request_Control: 76437 611496 [ 76437 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_ResponseLocal_Data: 1038 74736 [ 0 0 1038 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Request_Control: 77351 618808 [ 77351 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_ResponseLocal_Data: 1082 77904 [ 0 0 1082 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_1_link_1_Response_Control: 2 16 [ 0 0 2 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Writeback_Data: 75619 5444568 [ 0 0 75619 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Writeback_Control: 76111 608888 [ 76111 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Unblock_Control: 76875 615000 [ 0 0 76875 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Data: 76324 5495328 [ 0 0 76324 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Control: 77331 618648 [ 77331 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Unblock_Control: 78307 626456 [ 0 0 78307 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 2.1575
-  links_utilized_percent_switch_2_link_0: 1.96119 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 2.35381 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_2_link_0_Response_Data: 74689 5377608 [ 0 0 74689 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_ResponseL2hit_Data: 273 19656 [ 0 0 273 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_ResponseLocal_Data: 1033 74376 [ 0 0 1033 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Response_Control: 342 2736 [ 0 0 342 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Writeback_Control: 75651 605208 [ 75651 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Forwarded_Control: 1024 8192 [ 1024 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Invalidate_Control: 2 16 [ 2 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Request_Control: 75997 607976 [ 75997 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_ResponseLocal_Data: 1024 73728 [ 0 0 1024 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Response_Control: 2 16 [ 0 0 2 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Writeback_Data: 75108 5407776 [ 0 0 75108 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Writeback_Control: 75651 605208 [ 75651 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Unblock_Control: 76480 611840 [ 0 0 76480 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_2: 5.69622
+  links_utilized_percent_switch_2_link_0: 5.18021 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 6.21223 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_2_link_0_Response_Data: 75625 5445000 [ 0 0 75625 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_ResponseL2hit_Data: 746 53712 [ 0 0 746 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_ResponseLocal_Data: 1117 80424 [ 0 0 1117 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Response_Control: 424 3392 [ 0 0 424 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Writeback_Control: 77470 619760 [ 77470 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Forwarded_Control: 1068 8544 [ 1068 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Invalidate_Control: 5 40 [ 5 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Request_Control: 77491 619928 [ 77491 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_ResponseLocal_Data: 1068 76896 [ 0 0 1068 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Response_Control: 5 40 [ 0 0 5 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Writeback_Data: 76444 5503968 [ 0 0 76444 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Writeback_Control: 77471 619768 [ 77471 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Unblock_Control: 78453 627624 [ 0 0 78453 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_3_inlinks: 2
 switch_3_outlinks: 2
-links_utilized_percent_switch_3: 2.17414
-  links_utilized_percent_switch_3_link_0: 1.9761 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_1: 2.37218 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_3_link_0_Response_Data: 75255 5418360 [ 0 0 75255 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_ResponseL2hit_Data: 285 20520 [ 0 0 285 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_ResponseLocal_Data: 1029 74088 [ 0 0 1029 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Response_Control: 359 2872 [ 0 0 359 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Writeback_Control: 76220 609760 [ 76220 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Forwarded_Control: 1058 8464 [ 1058 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Invalidate_Control: 4 32 [ 4 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Request_Control: 76573 612584 [ 76573 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_ResponseLocal_Data: 1058 76176 [ 0 0 1058 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Response_Control: 4 32 [ 0 0 4 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Writeback_Data: 75674 5448528 [ 0 0 75674 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Writeback_Control: 76220 609760 [ 76220 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Unblock_Control: 77063 616504 [ 0 0 77063 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_3: 5.72264
+  links_utilized_percent_switch_3_link_0: 5.20269 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_1: 6.24259 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_3_link_0_Response_Data: 76082 5477904 [ 0 0 76082 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_ResponseL2hit_Data: 739 53208 [ 0 0 739 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_ResponseLocal_Data: 1011 72792 [ 0 0 1011 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Response_Control: 349 2792 [ 0 0 349 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Writeback_Control: 77823 622584 [ 77823 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Forwarded_Control: 1065 8520 [ 1065 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Invalidate_Control: 3 24 [ 3 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Request_Control: 77834 622672 [ 77834 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_ResponseLocal_Data: 1065 76680 [ 0 0 1065 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Response_Control: 3 24 [ 0 0 3 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Writeback_Data: 76841 5532552 [ 0 0 76841 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Writeback_Control: 77825 622600 [ 77825 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Unblock_Control: 78762 630096 [ 0 0 78762 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_4_inlinks: 2
 switch_4_outlinks: 2
-links_utilized_percent_switch_4: 2.15519
-  links_utilized_percent_switch_4_link_0: 1.95871 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_4_link_1: 2.35166 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_4_link_0_Response_Data: 74576 5369472 [ 0 0 74576 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_ResponseL2hit_Data: 275 19800 [ 0 0 275 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_ResponseLocal_Data: 1044 75168 [ 0 0 1044 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_Response_Control: 347 2776 [ 0 0 347 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_Writeback_Control: 75587 604696 [ 75587 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_Forwarded_Control: 1023 8184 [ 1023 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_Invalidate_Control: 1 8 [ 1 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Request_Control: 75899 607192 [ 75899 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_ResponseLocal_Data: 1023 73656 [ 0 0 1023 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Response_Control: 1 8 [ 0 0 1 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Writeback_Data: 75045 5403240 [ 0 0 75045 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Writeback_Control: 75587 604696 [ 75587 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Unblock_Control: 76387 611096 [ 0 0 76387 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_4: 5.68722
+  links_utilized_percent_switch_4_link_0: 5.17342 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_4_link_1: 6.20102 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_4_link_0_Response_Data: 75598 5443056 [ 0 0 75598 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_ResponseL2hit_Data: 752 54144 [ 0 0 752 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_ResponseLocal_Data: 1051 75672 [ 0 0 1051 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Response_Control: 365 2920 [ 0 0 365 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Writeback_Control: 77372 618976 [ 77372 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Forwarded_Control: 993 7944 [ 993 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Invalidate_Control: 3 24 [ 3 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Request_Control: 77403 619224 [ 77403 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_ResponseLocal_Data: 993 71496 [ 0 0 993 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Response_Control: 3 24 [ 0 0 3 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Writeback_Data: 76363 5498136 [ 0 0 76363 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Writeback_Control: 77373 618984 [ 77373 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Unblock_Control: 78365 626920 [ 0 0 78365 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_5_inlinks: 2
 switch_5_outlinks: 2
-links_utilized_percent_switch_5: 2.17809
-  links_utilized_percent_switch_5_link_0: 1.98026 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_5_link_1: 2.37592 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_5_link_0_Response_Data: 75361 5425992 [ 0 0 75361 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_ResponseL2hit_Data: 282 20304 [ 0 0 282 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_ResponseLocal_Data: 1091 78552 [ 0 0 1091 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_Response_Control: 366 2928 [ 0 0 366 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_Writeback_Control: 76408 611264 [ 76408 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_Forwarded_Control: 997 7976 [ 997 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_5: 5.70748
+  links_utilized_percent_switch_5_link_0: 5.18942 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_5_link_1: 6.22553 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_5_link_0_Response_Data: 75875 5463000 [ 0 0 75875 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_ResponseL2hit_Data: 732 52704 [ 0 0 732 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_ResponseLocal_Data: 1026 73872 [ 0 0 1026 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_Response_Control: 360 2880 [ 0 0 360 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_Writeback_Control: 77599 620792 [ 77599 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_Forwarded_Control: 1085 8680 [ 1085 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_5_link_0_Invalidate_Control: 2 16 [ 2 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Request_Control: 76735 613880 [ 76735 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_ResponseLocal_Data: 997 71784 [ 0 0 997 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Request_Control: 77636 621088 [ 77636 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_ResponseLocal_Data: 1085 78120 [ 0 0 1085 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_5_link_1_Response_Control: 2 16 [ 0 0 2 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Writeback_Data: 75837 5460264 [ 0 0 75837 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Writeback_Control: 76408 611264 [ 76408 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Unblock_Control: 77246 617968 [ 0 0 77246 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Writeback_Data: 76603 5515416 [ 0 0 76603 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Writeback_Control: 77599 620792 [ 77599 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Unblock_Control: 78593 628744 [ 0 0 78593 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_6_inlinks: 2
 switch_6_outlinks: 2
-links_utilized_percent_switch_6: 2.17149
-  links_utilized_percent_switch_6_link_0: 1.97336 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_6_link_1: 2.36962 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_6_link_0_Response_Data: 75141 5410152 [ 0 0 75141 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_ResponseL2hit_Data: 277 19944 [ 0 0 277 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_ResponseLocal_Data: 1041 74952 [ 0 0 1041 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_Response_Control: 393 3144 [ 0 0 393 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_Writeback_Control: 76135 609080 [ 76135 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_Forwarded_Control: 1037 8296 [ 1037 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_6: 5.70137
+  links_utilized_percent_switch_6_link_0: 5.18499 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_6_link_1: 6.21775 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_6_link_0_Response_Data: 75864 5462208 [ 0 0 75864 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_ResponseL2hit_Data: 725 52200 [ 0 0 725 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_ResponseLocal_Data: 986 70992 [ 0 0 986 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_Response_Control: 324 2592 [ 0 0 324 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_Writeback_Control: 77550 620400 [ 77550 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_Forwarded_Control: 1024 8192 [ 1024 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_6_link_0_Invalidate_Control: 3 24 [ 3 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Request_Control: 76462 611696 [ 76462 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_ResponseLocal_Data: 1037 74664 [ 0 0 1037 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Request_Control: 77576 620608 [ 77576 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_ResponseLocal_Data: 1024 73728 [ 0 0 1024 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_6_link_1_Response_Control: 3 24 [ 0 0 3 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Writeback_Data: 75623 5444856 [ 0 0 75623 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Writeback_Control: 76135 609080 [ 76135 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Unblock_Control: 76913 615304 [ 0 0 76913 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Writeback_Data: 76554 5511888 [ 0 0 76554 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Writeback_Control: 77550 620400 [ 77550 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Unblock_Control: 78524 628192 [ 0 0 78524 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_7_inlinks: 2
 switch_7_outlinks: 2
-links_utilized_percent_switch_7: 2.17401
-  links_utilized_percent_switch_7_link_0: 1.97579 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_7_link_1: 2.37222 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_7_link_0_Response_Data: 75261 5418792 [ 0 0 75261 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_ResponseL2hit_Data: 277 19944 [ 0 0 277 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_ResponseLocal_Data: 1020 73440 [ 0 0 1020 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_Response_Control: 363 2904 [ 0 0 363 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_Writeback_Control: 76198 609584 [ 76198 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_Forwarded_Control: 1053 8424 [ 1053 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_Invalidate_Control: 6 48 [ 6 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Request_Control: 76562 612496 [ 76562 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_ResponseLocal_Data: 1053 75816 [ 0 0 1053 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Response_Control: 6 48 [ 0 0 6 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Writeback_Data: 75691 5449752 [ 0 0 75691 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Writeback_Control: 76198 609584 [ 76198 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Unblock_Control: 76999 615992 [ 0 0 76999 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_7: 5.70637
+  links_utilized_percent_switch_7_link_0: 5.18977 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_7_link_1: 6.22296 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_7_link_0_Response_Data: 75843 5460696 [ 0 0 75843 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_ResponseL2hit_Data: 744 53568 [ 0 0 744 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_ResponseLocal_Data: 1055 75960 [ 0 0 1055 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Response_Control: 375 3000 [ 0 0 375 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Writeback_Control: 77618 620944 [ 77618 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Forwarded_Control: 1020 8160 [ 1020 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Invalidate_Control: 1 8 [ 1 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Request_Control: 77644 621152 [ 77644 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_ResponseLocal_Data: 1020 73440 [ 0 0 1020 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Response_Control: 1 8 [ 0 0 1 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Writeback_Data: 76622 5516784 [ 0 0 76622 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Writeback_Control: 77619 620952 [ 77619 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Unblock_Control: 78595 628760 [ 0 0 78595 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_8_inlinks: 2
 switch_8_outlinks: 2
-links_utilized_percent_switch_8: 2.17389
-  links_utilized_percent_switch_8_link_0: 1.97667 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_8_link_1: 2.37111 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_8_link_0_Response_Data: 75218 5415696 [ 0 0 75218 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_ResponseL2hit_Data: 302 21744 [ 0 0 302 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_ResponseLocal_Data: 1073 77256 [ 0 0 1073 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Response_Control: 362 2896 [ 0 0 362 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Writeback_Control: 76226 609808 [ 76226 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Forwarded_Control: 1053 8424 [ 1053 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Invalidate_Control: 3 24 [ 3 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Request_Control: 76596 612768 [ 76596 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_ResponseLocal_Data: 1053 75816 [ 0 0 1053 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Response_Control: 3 24 [ 0 0 3 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Writeback_Data: 75621 5444712 [ 0 0 75621 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Writeback_Control: 76226 609808 [ 76226 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Unblock_Control: 77141 617128 [ 0 0 77141 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_8: 5.69048
+  links_utilized_percent_switch_8_link_0: 5.17496 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_8_link_1: 6.20601 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_8_link_0_Response_Data: 75604 5443488 [ 0 0 75604 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_ResponseL2hit_Data: 750 54000 [ 0 0 750 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_ResponseLocal_Data: 1067 76824 [ 0 0 1067 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Response_Control: 368 2944 [ 0 0 368 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Writeback_Control: 77391 619128 [ 77391 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Forwarded_Control: 1023 8184 [ 1023 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Invalidate_Control: 1 8 [ 1 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Request_Control: 77424 619392 [ 77424 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_ResponseLocal_Data: 1023 73656 [ 0 0 1023 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Response_Control: 1 8 [ 0 0 1 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Writeback_Data: 76413 5501736 [ 0 0 76413 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Writeback_Control: 77391 619128 [ 77391 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Unblock_Control: 78356 626848 [ 0 0 78356 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_9_inlinks: 2
 switch_9_outlinks: 2
-links_utilized_percent_switch_9: 13.0241
-  links_utilized_percent_switch_9_link_0: 10.5718 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_1: 15.4763 bw: 16000 base_latency: 1
+links_utilized_percent_switch_9: 34.0599
+  links_utilized_percent_switch_9_link_0: 27.6837 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_1: 40.4361 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_9_link_0_Request_Control: 600752 4806016 [ 0 600752 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_0_Writeback_Data: 212941 15331752 [ 0 0 212941 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_0_Writeback_Control: 984104 7872832 [ 0 598523 385581 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_0_Unblock_Control: 600727 4805816 [ 0 0 600727 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_1_Response_Data: 600728 43252416 [ 0 0 600728 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_1_Writeback_Control: 598522 4788176 [ 0 598522 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Request_Control: 606065 4848520 [ 0 606065 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Writeback_Data: 215707 15530904 [ 0 0 215707 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Writeback_Control: 995497 7963976 [ 0 605615 389882 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Unblock_Control: 606039 4848312 [ 0 0 606039 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_1_Response_Data: 606062 43636464 [ 0 0 606062 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_1_Writeback_Control: 605615 4844920 [ 0 605615 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_10_inlinks: 10
 switch_10_outlinks: 10
-links_utilized_percent_switch_10: 6.05665
-  links_utilized_percent_switch_10_link_0: 34.22 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_1: 1.97262 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_2: 1.96119 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_3: 1.9761 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_4: 1.95871 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_5: 1.98027 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_6: 1.97336 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_7: 1.97579 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_8: 1.97667 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_10_link_9: 10.5718 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_10_link_0_Request_Control: 611261 4890088 [ 611261 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_0_Response_Data: 600728 43252416 [ 0 0 600728 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_0_Writeback_Data: 604218 43503696 [ 0 0 604218 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_0_Writeback_Control: 1207058 9656464 [ 608536 598522 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_0_Unblock_Control: 615104 4920832 [ 0 0 615104 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_1_Response_Data: 75227 5416344 [ 0 0 75227 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_1_ResponseL2hit_Data: 255 18360 [ 0 0 255 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_1_ResponseLocal_Data: 952 68544 [ 0 0 952 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_1_Response_Control: 354 2832 [ 0 0 354 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_1_Writeback_Control: 76111 608888 [ 76111 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_1_Forwarded_Control: 1038 8304 [ 1038 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_10: 15.8814
+  links_utilized_percent_switch_10_link_0: 89.6643 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_1: 5.17063 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_2: 5.18021 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_3: 5.20269 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_4: 5.17342 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_5: 5.18944 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_6: 5.18499 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_7: 5.18977 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_8: 5.17496 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_10_link_9: 27.6837 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_10_link_0_Request_Control: 620353 4962824 [ 620353 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_0_Response_Data: 606056 43636032 [ 0 0 606056 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_0_Writeback_Data: 612164 44075808 [ 0 0 612164 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_0_Writeback_Control: 1225742 9805936 [ 620153 605589 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_0_Unblock_Control: 627946 5023568 [ 0 0 627946 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_1_Response_Data: 75562 5440464 [ 0 0 75562 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_1_ResponseL2hit_Data: 740 53280 [ 0 0 740 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_1_ResponseLocal_Data: 1047 75384 [ 0 0 1047 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_1_Response_Control: 368 2944 [ 0 0 368 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_1_Writeback_Control: 77330 618640 [ 77330 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_1_Forwarded_Control: 1082 8656 [ 1082 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_10_link_1_Invalidate_Control: 2 16 [ 2 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_2_Response_Data: 74689 5377608 [ 0 0 74689 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_2_ResponseL2hit_Data: 273 19656 [ 0 0 273 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_2_ResponseLocal_Data: 1033 74376 [ 0 0 1033 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_2_Response_Control: 342 2736 [ 0 0 342 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_2_Writeback_Control: 75651 605208 [ 75651 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_2_Forwarded_Control: 1024 8192 [ 1024 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_2_Invalidate_Control: 2 16 [ 2 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_3_Response_Data: 75255 5418360 [ 0 0 75255 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_3_ResponseL2hit_Data: 285 20520 [ 0 0 285 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_3_ResponseLocal_Data: 1029 74088 [ 0 0 1029 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_3_Response_Control: 359 2872 [ 0 0 359 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_3_Writeback_Control: 76220 609760 [ 76220 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_3_Forwarded_Control: 1058 8464 [ 1058 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_3_Invalidate_Control: 4 32 [ 4 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_4_Response_Data: 74576 5369472 [ 0 0 74576 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_4_ResponseL2hit_Data: 275 19800 [ 0 0 275 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_4_ResponseLocal_Data: 1044 75168 [ 0 0 1044 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_4_Response_Control: 347 2776 [ 0 0 347 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_4_Writeback_Control: 75587 604696 [ 75587 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_4_Forwarded_Control: 1023 8184 [ 1023 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_4_Invalidate_Control: 1 8 [ 1 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_5_Response_Data: 75361 5425992 [ 0 0 75361 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_5_ResponseL2hit_Data: 282 20304 [ 0 0 282 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_5_ResponseLocal_Data: 1091 78552 [ 0 0 1091 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_5_Response_Control: 366 2928 [ 0 0 366 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_5_Writeback_Control: 76408 611264 [ 76408 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_5_Forwarded_Control: 997 7976 [ 997 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_2_Response_Data: 75625 5445000 [ 0 0 75625 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_2_ResponseL2hit_Data: 746 53712 [ 0 0 746 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_2_ResponseLocal_Data: 1117 80424 [ 0 0 1117 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_2_Response_Control: 424 3392 [ 0 0 424 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_2_Writeback_Control: 77470 619760 [ 77470 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_2_Forwarded_Control: 1068 8544 [ 1068 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_2_Invalidate_Control: 5 40 [ 5 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_3_Response_Data: 76082 5477904 [ 0 0 76082 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_3_ResponseL2hit_Data: 739 53208 [ 0 0 739 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_3_ResponseLocal_Data: 1011 72792 [ 0 0 1011 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_3_Response_Control: 349 2792 [ 0 0 349 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_3_Writeback_Control: 77823 622584 [ 77823 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_3_Forwarded_Control: 1065 8520 [ 1065 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_3_Invalidate_Control: 3 24 [ 3 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_4_Response_Data: 75598 5443056 [ 0 0 75598 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_4_ResponseL2hit_Data: 752 54144 [ 0 0 752 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_4_ResponseLocal_Data: 1051 75672 [ 0 0 1051 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_4_Response_Control: 365 2920 [ 0 0 365 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_4_Writeback_Control: 77372 618976 [ 77372 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_4_Forwarded_Control: 993 7944 [ 993 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_4_Invalidate_Control: 3 24 [ 3 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_5_Response_Data: 75875 5463000 [ 0 0 75875 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_5_ResponseL2hit_Data: 732 52704 [ 0 0 732 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_5_ResponseLocal_Data: 1026 73872 [ 0 0 1026 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_5_Response_Control: 360 2880 [ 0 0 360 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_5_Writeback_Control: 77599 620792 [ 77599 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_5_Forwarded_Control: 1085 8680 [ 1085 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_10_link_5_Invalidate_Control: 2 16 [ 2 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_6_Response_Data: 75141 5410152 [ 0 0 75141 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_6_ResponseL2hit_Data: 277 19944 [ 0 0 277 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_6_ResponseLocal_Data: 1041 74952 [ 0 0 1041 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_6_Response_Control: 393 3144 [ 0 0 393 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_6_Writeback_Control: 76135 609080 [ 76135 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_6_Forwarded_Control: 1037 8296 [ 1037 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_6_Response_Data: 75864 5462208 [ 0 0 75864 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_6_ResponseL2hit_Data: 725 52200 [ 0 0 725 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_6_ResponseLocal_Data: 986 70992 [ 0 0 986 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_6_Response_Control: 324 2592 [ 0 0 324 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_6_Writeback_Control: 77550 620400 [ 77550 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_6_Forwarded_Control: 1024 8192 [ 1024 0 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_10_link_6_Invalidate_Control: 3 24 [ 3 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_7_Response_Data: 75261 5418792 [ 0 0 75261 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_7_ResponseL2hit_Data: 277 19944 [ 0 0 277 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_7_ResponseLocal_Data: 1020 73440 [ 0 0 1020 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_7_Response_Control: 363 2904 [ 0 0 363 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_7_Writeback_Control: 76198 609584 [ 76198 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_7_Forwarded_Control: 1053 8424 [ 1053 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_7_Invalidate_Control: 6 48 [ 6 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_Response_Data: 75218 5415696 [ 0 0 75218 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_ResponseL2hit_Data: 302 21744 [ 0 0 302 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_ResponseLocal_Data: 1073 77256 [ 0 0 1073 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_Response_Control: 362 2896 [ 0 0 362 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_Writeback_Control: 76226 609808 [ 76226 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_Forwarded_Control: 1053 8424 [ 1053 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_8_Invalidate_Control: 3 24 [ 3 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_9_Request_Control: 600752 4806016 [ 0 600752 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_9_Writeback_Data: 212941 15331752 [ 0 0 212941 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_9_Writeback_Control: 984104 7872832 [ 0 598523 385581 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_10_link_9_Unblock_Control: 600727 4805816 [ 0 0 600727 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_7_Response_Data: 75843 5460696 [ 0 0 75843 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_7_ResponseL2hit_Data: 744 53568 [ 0 0 744 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_7_ResponseLocal_Data: 1055 75960 [ 0 0 1055 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_7_Response_Control: 375 3000 [ 0 0 375 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_7_Writeback_Control: 77618 620944 [ 77618 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_7_Forwarded_Control: 1020 8160 [ 1020 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_7_Invalidate_Control: 1 8 [ 1 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_Response_Data: 75604 5443488 [ 0 0 75604 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_ResponseL2hit_Data: 750 54000 [ 0 0 750 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_ResponseLocal_Data: 1067 76824 [ 0 0 1067 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_Response_Control: 368 2944 [ 0 0 368 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_Writeback_Control: 77391 619128 [ 77391 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_Forwarded_Control: 1023 8184 [ 1023 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_8_Invalidate_Control: 1 8 [ 1 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_9_Request_Control: 606065 4848520 [ 0 606065 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_9_Writeback_Data: 215707 15530904 [ 0 0 215707 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_9_Writeback_Control: 995497 7963976 [ 0 605615 389882 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_10_link_9_Unblock_Control: 606039 4848312 [ 0 0 606039 0 0 0 0 0 0 0 ] base_latency: 1
 
 Cache Stats: system.l1_cntrl0.L1IcacheMemory
   system.l1_cntrl0.L1IcacheMemory_total_misses: 0
@@ -395,93 +395,93 @@ Cache Stats: system.l1_cntrl0.L1DcacheMemory
 
  --- L1Cache ---
  - Event Counts -
-Load [49797 49666 49735 49595 49550 49631 49822 49360 ] 397156
+Load [50279 50371 50348 50325 50378 50381 50577 50451 ] 403110
 Ifetch [0 0 0 0 0 0 0 0 ] 0
-Store [26955 26819 26845 27019 26906 26394 26778 26567 ] 214283
-L1_Replacement [25735353 25750063 25730434 25732397 25751220 25755516 25726727 25772763 ] 205954473
+Store [27380 27235 27318 27148 27044 27143 27279 26995 ] 217542
+L1_Replacement [9623981 9626726 9624121 9629754 9634121 9629103 9619343 9631030 ] 77018179
 Own_GETX [0 0 0 0 0 0 0 0 ] 0
-Fwd_GETX [1201 1088 1161 1248 1126 1083 1138 1105 ] 9150
-Fwd_GETS [2081 2236 2314 2134 2386 2151 2251 2299 ] 17852
+Fwd_GETX [412 391 363 348 394 387 380 384 ] 3059
+Fwd_GETS [745 679 710 731 734 737 743 663 ] 5742
 Fwd_DMA [0 0 0 0 0 0 0 0 ] 0
-Inv [2 3 6 3 2 2 4 1 ] 23
-Ack [366 393 363 362 354 342 359 347 ] 2886
-Data [885 804 773 840 755 816 783 833 ] 6489
-Exclusive_Data [75849 75655 75785 75753 75679 75179 75786 75062 ] 604748
-Writeback_Ack [410 345 330 421 326 383 381 390 ] 2986
-Writeback_Ack_Data [75940 75732 75802 75748 75734 75210 75787 75147 ] 605100
-Writeback_Nack [58 58 66 57 51 58 52 50 ] 450
-All_acks [26949 26808 26837 27015 26900 26387 26768 26559 ] 214223
-Use_Timeout [75848 75655 75785 75753 75679 75179 75786 75062 ] 604747
+Inv [2 3 1 1 2 5 3 3 ] 20
+Ack [360 324 375 368 368 424 349 365 ] 2933
+Data [700 699 709 719 696 730 696 713 ] 5662
+Exclusive_Data [76933 76876 76933 76702 76653 76758 77136 76688 ] 614679
+Writeback_Ack [621 611 637 645 610 643 600 639 ] 5006
+Writeback_Ack_Data [76943 76892 76938 76703 76672 76766 77171 76688 ] 614773
+Writeback_Nack [35 47 43 43 48 61 52 45 ] 374
+All_acks [27373 27222 27311 27124 27035 27129 27272 26983 ] 217449
+Use_Timeout [76932 76874 76931 76701 76652 76757 77134 76687 ] 614668
 
  - Transitions -
-I  Load [49785 49653 49722 49579 49537 49608 49805 49338 ] 397027
+I  Load [50263 50353 50331 50299 50315 50362 50561 50420 ] 402904
 I  Ifetch [0 0 0 0 0 0 0 0 ] 0
-I  Store [26950 26809 26840 27017 26900 26389 26768 26561 ] 214234
-I  L1_Replacement [380 380 421 419 372 399 397 356 ] 3124
+I  Store [27373 27223 27313 27125 27037 27129 27273 26983 ] 217456
+I  L1_Replacement [66 68 63 71 62 72 54 68 ] 524
 I  Inv [0 0 0 0 0 0 0 0 ] 0
 
-S  Load [0 0 1 1 0 0 0 0 ] 2
+S  Load [1 0 0 1 0 0 0 0 ] 2
 S  Ifetch [0 0 0 0 0 0 0 0 ] 0
 S  Store [0 0 0 0 0 0 0 0 ] 0
-S  L1_Replacement [884 802 770 840 754 815 782 833 ] 6480
-S  Fwd_GETS [5 5 4 2 1 2 2 2 ] 23
+S  L1_Replacement [699 697 709 719 695 728 696 713 ] 5656
+S  Fwd_GETS [0 0 0 0 0 0 0 0 ] 0
 S  Fwd_DMA [0 0 0 0 0 0 0 0 ] 0
-S  Inv [1 2 3 0 1 1 1 0 ] 9
+S  Inv [1 2 0 0 1 2 0 0 ] 6
 
 O  Load [0 0 0 0 0 0 0 0 ] 0
 O  Ifetch [0 0 0 0 0 0 0 0 ] 0
 O  Store [0 0 0 0 0 0 0 0 ] 0
-O  L1_Replacement [270 292 277 265 297 288 304 292 ] 2285
-O  Fwd_GETX [0 1 0 3 0 0 0 1 ] 5
-O  Fwd_GETS [2 3 2 3 3 0 1 2 ] 16
+O  L1_Replacement [40 29 47 42 46 56 36 40 ] 336
+O  Fwd_GETX [1 0 0 0 0 0 0 0 ] 1
+O  Fwd_GETS [0 0 0 0 0 0 0 1 ] 1
 O  Fwd_DMA [0 0 0 0 0 0 0 0 ] 0
 
-M  Load [6 8 4 7 11 15 6 11 ] 68
+M  Load [2 1 4 2 6 3 4 1 ] 23
 M  Ifetch [0 0 0 0 0 0 0 0 ] 0
-M  Store [3 4 4 2 1 2 5 3 ] 24
-M  L1_Replacement [48440 48400 48483 48283 48315 48334 48541 48060 ] 386856
-M  Fwd_GETX [185 146 183 185 165 167 168 147 ] 1346
-M  Fwd_GETS [270 293 277 268 297 288 304 293 ] 2290
+M  Store [1 4 1 3 2 4 0 0 ] 15
+M  L1_Replacement [49489 49598 49552 49504 49544 49535 49802 49635 ] 396659
+M  Fwd_GETX [26 18 18 23 23 29 20 24 ] 181
+M  Fwd_GETS [41 29 47 42 46 56 36 40 ] 337
 M  Fwd_DMA [0 0 0 0 0 0 0 0 ] 0
 
-M_W  Load [3 0 3 1 0 1 2 1 ] 11
+M_W  Load [5 9 6 4 9 9 5 9 ] 56
 M_W  Ifetch [0 0 0 0 0 0 0 0 ] 0
-M_W  Store [0 3 1 0 0 0 0 0 ] 4
-M_W  L1_Replacement [862019 865045 861347 862435 865330 863842 861927 858142 ] 6900087
+M_W  Store [3 5 2 5 2 4 4 6 ] 31
+M_W  L1_Replacement [894462 889018 893611 898273 897698 890953 899417 899197 ] 7162629
 M_W  Own_GETX [0 0 0 0 0 0 0 0 ] 0
-M_W  Fwd_GETX [553 488 543 526 522 437 519 441 ] 4029
-M_W  Fwd_GETS [1022 952 990 965 1095 988 964 1090 ] 8066
+M_W  Fwd_GETX [24 11 10 9 6 12 14 15 ] 101
+M_W  Fwd_GETS [25 14 26 20 25 28 31 26 ] 195
 M_W  Fwd_DMA [0 0 0 0 0 0 0 0 ] 0
 M_W  Inv [0 0 0 0 0 0 0 0 ] 0
-M_W  Use_Timeout [48899 48844 48947 48738 48779 48792 49018 48503 ] 390520
+M_W  Use_Timeout [49557 49649 49618 49572 49615 49624 49858 49699 ] 397192
 
-MM  Load [1 5 5 6 2 5 6 8 ] 38
+MM  Load [1 2 0 3 4 2 0 2 ] 14
 MM  Ifetch [0 0 0 0 0 0 0 0 ] 0
-MM  Store [2 3 0 0 5 2 4 2 ] 18
-MM  L1_Replacement [26757 26584 26606 26784 26695 26157 26545 26353 ] 212481
-MM  Fwd_GETX [83 81 70 82 66 79 77 90 ] 628
-MM  Fwd_GETS [111 150 166 150 140 152 151 119 ] 1139
+MM  Store [0 0 2 0 1 0 0 1 ] 4
+MM  L1_Replacement [27338 27180 27269 27084 27001 27096 27242 26943 ] 217153
+MM  Fwd_GETX [14 15 16 19 14 14 12 14 ] 118
+MM  Fwd_GETS [24 33 29 29 24 27 22 30 ] 218
 MM  Fwd_DMA [0 0 0 0 0 0 0 0 ] 0
 
-MM_W  Load [2 0 0 1 0 2 3 2 ] 10
+MM_W  Load [7 4 2 4 3 2 6 1 ] 29
 MM_W  Ifetch [0 0 0 0 0 0 0 0 ] 0
-MM_W  Store [0 0 0 0 0 1 1 1 ] 3
-MM_W  L1_Replacement [474321 476437 474914 473259 476351 470916 474836 474286 ] 3795320
+MM_W  Store [2 3 0 2 1 2 2 2 ] 14
+MM_W  L1_Replacement [504094 507882 503326 499321 498779 504839 498457 496653 ] 4013351
 MM_W  Own_GETX [0 0 0 0 0 0 0 0 ] 0
-MM_W  Fwd_GETX [277 263 253 325 258 298 260 324 ] 2258
-MM_W  Fwd_GETS [433 584 636 513 599 487 588 526 ] 4366
+MM_W  Fwd_GETX [6 9 3 7 2 8 4 6 ] 45
+MM_W  Fwd_GETS [17 12 14 20 13 8 9 7 ] 100
 MM_W  Fwd_DMA [0 0 0 0 0 0 0 0 ] 0
 MM_W  Inv [0 0 0 0 0 0 0 0 ] 0
-MM_W  Use_Timeout [26949 26811 26838 27015 26900 26387 26768 26559 ] 214227
+MM_W  Use_Timeout [27375 27225 27313 27129 27037 27133 27276 26988 ] 217476
 
 IM  Load [0 0 0 0 0 0 0 0 ] 0
 IM  Ifetch [0 0 0 0 0 0 0 0 ] 0
 IM  Store [0 0 0 0 0 0 0 0 ] 0
-IM  L1_Replacement [8548786 8600158 8554391 8485164 8597672 8451758 8490064 8620969 ] 68348962
+IM  L1_Replacement [2881506 2856621 2857427 2836942 2832999 2852554 2848576 2869997 ] 22836622
 IM  Inv [0 0 0 0 0 0 0 0 ] 0
-IM  Ack [364 390 361 361 352 342 355 342 ] 2867
+IM  Ack [355 320 372 365 361 419 348 361 ] 2901
 IM  Data [0 0 0 0 0 0 0 0 ] 0
-IM  Exclusive_Data [26949 26808 26837 27015 26900 26387 26768 26559 ] 214223
+IM  Exclusive_Data [27373 27222 27311 27124 27035 27129 27272 26983 ] 217449
 
 SM  Load [0 0 0 0 0 0 0 0 ] 0
 SM  Ifetch [0 0 0 0 0 0 0 0 ] 0
@@ -497,53 +497,53 @@ SM  Exclusive_Data [0 0 0 0 0 0 0 0 ] 0
 OM  Load [0 0 0 0 0 0 0 0 ] 0
 OM  Ifetch [0 0 0 0 0 0 0 0 ] 0
 OM  Store [0 0 0 0 0 0 0 0 ] 0
-OM  L1_Replacement [1257 1218 1142 1028 1412 1197 1328 1241 ] 9823
+OM  L1_Replacement [16457 15985 15692 15697 16186 16105 15720 15815 ] 127657
 OM  Own_GETX [0 0 0 0 0 0 0 0 ] 0
 OM  Fwd_GETX [0 0 0 0 0 0 0 0 ] 0
 OM  Fwd_GETS [0 0 0 0 0 0 0 0 ] 0
 OM  Fwd_DMA [0 0 0 0 0 0 0 0 ] 0
-OM  Ack [2 3 2 1 2 0 4 5 ] 19
-OM  All_acks [26949 26808 26837 27015 26900 26387 26768 26559 ] 214223
+OM  Ack [5 4 3 3 7 5 1 4 ] 32
+OM  All_acks [27373 27222 27311 27124 27035 27129 27272 26983 ] 217449
 
 IS  Load [0 0 0 0 0 0 0 0 ] 0
 IS  Ifetch [0 0 0 0 0 0 0 0 ] 0
 IS  Store [0 0 0 0 0 0 0 0 ] 0
-IS  L1_Replacement [15772239 15730747 15762083 15833920 15734022 15891810 15822003 15742231 ] 126289055
+IS  L1_Replacement [5249830 5279648 5276425 5302101 5311111 5287165 5279343 5271969 ] 42257592
 IS  Inv [0 0 0 0 0 0 0 0 ] 0
-IS  Data [885 804 773 840 755 816 783 833 ] 6489
-IS  Exclusive_Data [48900 48847 48948 48738 48779 48792 49018 48503 ] 390525
+IS  Data [700 699 709 719 696 730 696 713 ] 5662
+IS  Exclusive_Data [49560 49654 49622 49578 49618 49629 49864 49705 ] 397230
 
 SI  Load [0 0 0 0 0 0 0 0 ] 0
 SI  Ifetch [0 0 0 0 0 0 0 0 ] 0
 SI  Store [0 0 0 0 0 0 0 0 ] 0
 SI  L1_Replacement [0 0 0 0 0 0 0 0 ] 0
-SI  Fwd_GETS [0 2 0 2 0 2 2 1 ] 9
+SI  Fwd_GETS [1 1 0 0 0 3 3 0 ] 8
 SI  Fwd_DMA [0 0 0 0 0 0 0 0 ] 0
-SI  Inv [1 1 3 3 1 1 3 1 ] 14
-SI  Writeback_Ack [410 345 330 421 326 383 381 390 ] 2986
-SI  Writeback_Ack_Data [473 456 437 416 427 431 398 442 ] 3480
+SI  Inv [1 1 1 1 1 3 3 3 ] 14
+SI  Writeback_Ack [621 611 637 645 610 643 600 639 ] 5006
+SI  Writeback_Ack_Data [77 85 71 73 84 82 93 71 ] 636
 SI  Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
 
 OI  Load [0 0 0 0 0 0 0 0 ] 0
 OI  Ifetch [0 0 0 0 0 0 0 0 ] 0
 OI  Store [0 0 0 0 0 0 0 0 ] 0
 OI  L1_Replacement [0 0 0 0 0 0 0 0 ] 0
-OI  Fwd_GETX [1 0 2 0 1 1 1 0 ] 6
-OI  Fwd_GETS [0 0 1 0 4 1 0 3 ] 9
+OI  Fwd_GETX [0 3 1 3 1 2 1 2 ] 13
+OI  Fwd_GETS [2 2 2 3 2 0 3 2 ] 16
 OI  Fwd_DMA [0 0 0 0 0 0 0 0 ] 0
 OI  Writeback_Ack [0 0 0 0 0 0 0 0 ] 0
-OI  Writeback_Ack_Data [507 539 513 496 543 518 542 555 ] 4213
-OI  Writeback_Nack [57 57 62 54 50 57 48 49 ] 434
+OI  Writeback_Ack_Data [675 614 638 656 669 669 674 595 ] 5190
+OI  Writeback_Nack [33 46 42 42 46 56 49 42 ] 356
 
-MI  Load [0 0 0 0 0 0 0 0 ] 0
+MI  Load [0 2 5 12 41 3 1 18 ] 82
 MI  Ifetch [0 0 0 0 0 0 0 0 ] 0
-MI  Store [0 0 0 0 0 0 0 0 ] 0
+MI  Store [1 0 0 13 1 4 0 3 ] 22
 MI  L1_Replacement [0 0 0 0 0 0 0 0 ] 0
-MI  Fwd_GETX [102 109 110 127 114 101 113 102 ] 878
-MI  Fwd_GETS [238 247 238 231 247 231 239 263 ] 1934
+MI  Fwd_GETX [341 335 315 287 348 322 329 323 ] 2600
+MI  Fwd_GETS [635 588 592 617 624 615 639 557 ] 4867
 MI  Fwd_DMA [0 0 0 0 0 0 0 0 ] 0
 MI  Writeback_Ack [0 0 0 0 0 0 0 0 ] 0
-MI  Writeback_Ack_Data [74857 74628 74741 74709 74649 74159 74734 74048 ] 596525
+MI  Writeback_Ack_Data [75851 75855 75913 75684 75571 75693 76074 75697 ] 606338
 MI  Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
 
 II  Load [0 0 0 0 0 0 0 0 ] 0
@@ -552,8 +552,8 @@ II  Store [0 0 0 0 0 0 0 0 ] 0
 II  L1_Replacement [0 0 0 0 0 0 0 0 ] 0
 II  Inv [0 0 0 0 0 0 0 0 ] 0
 II  Writeback_Ack [0 0 0 0 0 0 0 0 ] 0
-II  Writeback_Ack_Data [103 109 111 127 115 102 113 102 ] 882
-II  Writeback_Nack [1 1 4 3 1 1 4 1 ] 16
+II  Writeback_Ack_Data [340 338 316 290 348 322 330 325 ] 2609
+II  Writeback_Nack [2 1 1 1 2 5 3 3 ] 18
 
 Cache Stats: system.l1_cntrl1.L1IcacheMemory
   system.l1_cntrl1.L1IcacheMemory_total_misses: 0
@@ -677,12 +677,12 @@ Cache Stats: system.l2_cntrl0.L2cacheMemory
 
  --- L2Cache ---
  - Event Counts -
-L1_GETS [581619 ] 581619
-L1_GETX [313703 ] 313703
-L1_PUTO [3513 ] 3513
-L1_PUTX [605149 ] 605149
-L1_PUTS_only [8496 ] 8496
-L1_PUTS [95 ] 95
+L1_GETS [505974 ] 505974
+L1_GETX [272402 ] 272402
+L1_PUTO [1537 ] 1537
+L1_PUTX [699984 ] 699984
+L1_PUTS_only [21786 ] 21786
+L1_PUTS [392 ] 392
 Fwd_GETX [0 ] 0
 Fwd_GETS [0 ] 0
 Fwd_DMA [0 ] 0
@@ -690,21 +690,21 @@ Own_GETX [0 ] 0
 Inv [0 ] 0
 IntAck [0 ] 0
 ExtAck [0 ] 0
-All_Acks [210583 ] 210583
-Data [212773 ] 212773
-Data_Exclusive [387955 ] 387955
-L1_WBCLEANDATA [390475 ] 390475
-L1_WBDIRTYDATA [213743 ] 213743
-Writeback_Ack [598522 ] 598522
+All_Acks [212463 ] 212463
+Data [212873 ] 212873
+Data_Exclusive [393182 ] 393182
+L1_WBCLEANDATA [394367 ] 394367
+L1_WBDIRTYDATA [217797 ] 217797
+Writeback_Ack [605589 ] 605589
 Writeback_Nack [0 ] 0
-Unblock [10357 ] 10357
-Exclusive_Unblock [604747 ] 604747
+Unblock [13277 ] 13277
+Exclusive_Unblock [614667 ] 614667
 DmaAck [0 ] 0
-L2_Replacement [602108 ] 602108
+L2_Replacement [690963 ] 690963
 
  - Transitions -
-NP  L1_GETS [390158 ] 390158
-NP  L1_GETX [210572 ] 210572
+NP  L1_GETS [393599 ] 393599
+NP  L1_GETX [212460 ] 212460
 NP  L1_PUTO [0 ] 0
 NP  L1_PUTX [0 ] 0
 NP  L1_PUTS [0 ] 0
@@ -718,19 +718,19 @@ I  L1_PUTS [0 ] 0
 I  Inv [0 ] 0
 I  L2_Replacement [0 ] 0
 
-ILS  L1_GETS [32 ] 32
-ILS  L1_GETX [15 ] 15
+ILS  L1_GETS [8 ] 8
+ILS  L1_GETX [4 ] 4
 ILS  L1_PUTO [0 ] 0
 ILS  L1_PUTX [0 ] 0
-ILS  L1_PUTS_only [3444 ] 3444
-ILS  L1_PUTS [36 ] 36
+ILS  L1_PUTS_only [624 ] 624
+ILS  L1_PUTS [12 ] 12
 ILS  Inv [0 ] 0
 ILS  L2_Replacement [0 ] 0
 
-ILX  L1_GETS [5363 ] 5363
-ILX  L1_GETX [2852 ] 2852
-ILX  L1_PUTO [2 ] 2
-ILX  L1_PUTX [597406 ] 597406
+ILX  L1_GETS [5422 ] 5422
+ILX  L1_GETX [2899 ] 2899
+ILX  L1_PUTO [0 ] 0
+ILX  L1_PUTX [608944 ] 608944
 ILX  L1_PUTS_only [0 ] 0
 ILX  L1_PUTS [14 ] 14
 ILX  Fwd_GETX [0 ] 0
@@ -752,10 +752,10 @@ ILO  Inv [0 ] 0
 ILO  Data [0 ] 0
 ILO  L2_Replacement [0 ] 0
 
-ILOX  L1_GETS [5 ] 5
-ILOX  L1_GETX [7 ] 7
-ILOX  L1_PUTO [1625 ] 1625
-ILOX  L1_PUTX [434 ] 434
+ILOX  L1_GETS [4 ] 4
+ILOX  L1_GETX [3 ] 3
+ILOX  L1_PUTO [523 ] 523
+ILOX  L1_PUTX [356 ] 356
 ILOX  L1_PUTS [0 ] 0
 ILOX  Fwd_GETX [0 ] 0
 ILOX  Fwd_GETS [0 ] 0
@@ -774,23 +774,23 @@ ILOS  Fwd_DMA [0 ] 0
 ILOS  Data [0 ] 0
 ILOS  L2_Replacement [0 ] 0
 
-ILOSX  L1_GETS [20 ] 20
-ILOSX  L1_GETX [4 ] 4
-ILOSX  L1_PUTO [1092 ] 1092
-ILOSX  L1_PUTX [1497 ] 1497
-ILOSX  L1_PUTS_only [1637 ] 1637
-ILOSX  L1_PUTS [11 ] 11
+ILOSX  L1_GETS [13 ] 13
+ILOSX  L1_GETX [11 ] 11
+ILOSX  L1_PUTO [169 ] 169
+ILOSX  L1_PUTX [4501 ] 4501
+ILOSX  L1_PUTS_only [530 ] 530
+ILOSX  L1_PUTS [2 ] 2
 ILOSX  Fwd_GETX [0 ] 0
 ILOSX  Fwd_GETS [0 ] 0
 ILOSX  Fwd_DMA [0 ] 0
 ILOSX  Data [0 ] 0
 
-S  L1_GETS [13 ] 13
-S  L1_GETX [7 ] 7
+S  L1_GETS [5 ] 5
+S  L1_GETX [2 ] 2
 S  L1_PUTX [0 ] 0
 S  L1_PUTS [0 ] 0
 S  Inv [0 ] 0
-S  L2_Replacement [3444 ] 3444
+S  L2_Replacement [628 ] 628
 
 O  L1_GETS [0 ] 0
 O  L1_GETX [0 ] 0
@@ -810,34 +810,34 @@ OLS  Fwd_GETS [0 ] 0
 OLS  Fwd_DMA [0 ] 0
 OLS  L2_Replacement [0 ] 0
 
-OLSX  L1_GETS [5 ] 5
-OLSX  L1_GETX [4 ] 4
+OLSX  L1_GETS [18 ] 18
+OLSX  L1_GETX [5 ] 5
 OLSX  L1_PUTO [0 ] 0
-OLSX  L1_PUTX [0 ] 0
-OLSX  L1_PUTS_only [1307 ] 1307
-OLSX  L1_PUTS [10 ] 10
+OLSX  L1_PUTX [1 ] 1
+OLSX  L1_PUTS_only [4438 ] 4438
+OLSX  L1_PUTS [25 ] 25
 OLSX  Fwd_GETX [0 ] 0
 OLSX  Fwd_GETS [0 ] 0
 OLSX  Fwd_DMA [0 ] 0
-OLSX  L2_Replacement [1277 ] 1277
+OLSX  L2_Replacement [224 ] 224
 
 SLS  L1_GETS [0 ] 0
 SLS  L1_GETX [0 ] 0
 SLS  L1_PUTX [0 ] 0
-SLS  L1_PUTS_only [21 ] 21
+SLS  L1_PUTS_only [11 ] 11
 SLS  L1_PUTS [0 ] 0
 SLS  Inv [0 ] 0
-SLS  L2_Replacement [28 ] 28
+SLS  L2_Replacement [6 ] 6
 
-M  L1_GETS [1431 ] 1431
-M  L1_GETX [773 ] 773
+M  L1_GETS [3831 ] 3831
+M  L1_GETX [2069 ] 2069
 M  L1_PUTO [0 ] 0
-M  L1_PUTX [0 ] 0
+M  L1_PUTX [3 ] 3
 M  L1_PUTS [0 ] 0
 M  Fwd_GETX [0 ] 0
 M  Fwd_GETS [0 ] 0
 M  Fwd_DMA [0 ] 0
-M  L2_Replacement [597246 ] 597246
+M  L2_Replacement [605391 ] 605391
 
 IFGX  L1_GETS [0 ] 0
 IFGX  L1_GETX [0 ] 0
@@ -936,19 +936,19 @@ ILOW  L1_WBDIRTYDATA [0 ] 0
 ILOW  Unblock [0 ] 0
 ILOW  L2_Replacement [0 ] 0
 
-ILOXW  L1_GETS [4 ] 4
-ILOXW  L1_GETX [13 ] 13
-ILOXW  L1_PUTO [306 ] 306
-ILOXW  L1_PUTX [953 ] 953
+ILOXW  L1_GETS [53 ] 53
+ILOXW  L1_GETX [29 ] 29
+ILOXW  L1_PUTO [832 ] 832
+ILOXW  L1_PUTX [5127 ] 5127
 ILOXW  L1_PUTS_only [0 ] 0
 ILOXW  L1_PUTS [0 ] 0
 ILOXW  Fwd_GETX [0 ] 0
 ILOXW  Fwd_GETS [0 ] 0
 ILOXW  Fwd_DMA [0 ] 0
 ILOXW  Inv [0 ] 0
-ILOXW  L1_WBCLEANDATA [1440 ] 1440
-ILOXW  L1_WBDIRTYDATA [185 ] 185
-ILOXW  Unblock [1637 ] 1637
+ILOXW  L1_WBCLEANDATA [380 ] 380
+ILOXW  L1_WBDIRTYDATA [143 ] 143
+ILOXW  Unblock [530 ] 530
 ILOXW  L2_Replacement [0 ] 0
 
 ILOSW  L1_GETS [0 ] 0
@@ -966,19 +966,19 @@ ILOSW  L1_WBDIRTYDATA [0 ] 0
 ILOSW  Unblock [0 ] 0
 ILOSW  L2_Replacement [0 ] 0
 
-ILOSXW  L1_GETS [4 ] 4
-ILOSXW  L1_GETX [9 ] 9
+ILOSXW  L1_GETS [138 ] 138
+ILOSXW  L1_GETX [49 ] 49
 ILOSXW  L1_PUTO [0 ] 0
-ILOSXW  L1_PUTX [6 ] 6
-ILOSXW  L1_PUTS_only [931 ] 931
-ILOSXW  L1_PUTS [7 ] 7
+ILOSXW  L1_PUTX [47 ] 47
+ILOSXW  L1_PUTS_only [14733 ] 14733
+ILOSXW  L1_PUTS [40 ] 40
 ILOSXW  Fwd_GETX [0 ] 0
 ILOSXW  Fwd_GETS [0 ] 0
 ILOSXW  Fwd_DMA [0 ] 0
 ILOSXW  Inv [0 ] 0
-ILOSXW  L1_WBCLEANDATA [2033 ] 2033
-ILOSXW  L1_WBDIRTYDATA [555 ] 555
-ILOSXW  Unblock [12 ] 12
+ILOSXW  L1_WBCLEANDATA [3108 ] 3108
+ILOSXW  L1_WBDIRTYDATA [1559 ] 1559
+ILOSXW  Unblock [5 ] 5
 ILOSXW  L2_Replacement [0 ] 0
 
 SLSW  L1_GETS [0 ] 0
@@ -1012,17 +1012,17 @@ ILSW  L1_GETX [0 ] 0
 ILSW  L1_PUTO [0 ] 0
 ILSW  L1_PUTX [0 ] 0
 ILSW  L1_PUTS_only [0 ] 0
-ILSW  L1_PUTS [11 ] 11
+ILSW  L1_PUTS [53 ] 53
 ILSW  Fwd_GETX [0 ] 0
 ILSW  Fwd_GETS [0 ] 0
 ILSW  Fwd_DMA [0 ] 0
 ILSW  Inv [0 ] 0
-ILSW  L1_WBCLEANDATA [36 ] 36
+ILSW  L1_WBCLEANDATA [12 ] 12
 ILSW  Unblock [0 ] 0
 ILSW  L2_Replacement [0 ] 0
 
-IW  L1_GETS [8 ] 8
-IW  L1_GETX [0 ] 0
+IW  L1_GETS [22 ] 22
+IW  L1_GETX [25 ] 25
 IW  L1_PUTO [0 ] 0
 IW  L1_PUTX [0 ] 0
 IW  L1_PUTS_only [0 ] 0
@@ -1031,7 +1031,7 @@ IW  Fwd_GETX [0 ] 0
 IW  Fwd_GETS [0 ] 0
 IW  Fwd_DMA [0 ] 0
 IW  Inv [0 ] 0
-IW  L1_WBCLEANDATA [3444 ] 3444
+IW  L1_WBCLEANDATA [624 ] 624
 IW  L2_Replacement [0 ] 0
 
 OW  L1_GETS [0 ] 0
@@ -1057,11 +1057,11 @@ SW  Fwd_GETX [0 ] 0
 SW  Fwd_GETS [0 ] 0
 SW  Fwd_DMA [0 ] 0
 SW  Inv [0 ] 0
-SW  Unblock [21 ] 21
-SW  L2_Replacement [1 ] 1
+SW  Unblock [11 ] 11
+SW  L2_Replacement [133 ] 133
 
-OXW  L1_GETS [2 ] 2
-OXW  L1_GETX [6 ] 6
+OXW  L1_GETS [117 ] 117
+OXW  L1_GETX [45 ] 45
 OXW  L1_PUTO [0 ] 0
 OXW  L1_PUTX [0 ] 0
 OXW  L1_PUTS_only [0 ] 0
@@ -1070,49 +1070,49 @@ OXW  Fwd_GETX [0 ] 0
 OXW  Fwd_GETS [0 ] 0
 OXW  Fwd_DMA [0 ] 0
 OXW  Inv [0 ] 0
-OXW  Unblock [1307 ] 1307
-OXW  L2_Replacement [99 ] 99
+OXW  Unblock [4438 ] 4438
+OXW  L2_Replacement [32689 ] 32689
 
 OLSXW  L1_GETS [0 ] 0
 OLSXW  L1_GETX [0 ] 0
 OLSXW  L1_PUTO [0 ] 0
 OLSXW  L1_PUTX [0 ] 0
 OLSXW  L1_PUTS_only [0 ] 0
-OLSXW  L1_PUTS [0 ] 0
+OLSXW  L1_PUTS [95 ] 95
 OLSXW  Fwd_GETX [0 ] 0
 OLSXW  Fwd_GETS [0 ] 0
 OLSXW  Fwd_DMA [0 ] 0
 OLSXW  Inv [0 ] 0
-OLSXW  Unblock [10 ] 10
-OLSXW  L2_Replacement [0 ] 0
+OLSXW  Unblock [25 ] 25
+OLSXW  L2_Replacement [129 ] 129
 
-ILXW  L1_GETS [97 ] 97
-ILXW  L1_GETX [62 ] 62
+ILXW  L1_GETS [23832 ] 23832
+ILXW  L1_GETX [12720 ] 12720
 ILXW  L1_PUTO [0 ] 0
-ILXW  L1_PUTX [0 ] 0
+ILXW  L1_PUTX [5328 ] 5328
 ILXW  L1_PUTS_only [0 ] 0
-ILXW  L1_PUTS [0 ] 0
+ILXW  L1_PUTS [6 ] 6
 ILXW  Fwd_GETX [0 ] 0
 ILXW  Fwd_GETS [0 ] 0
 ILXW  Fwd_DMA [0 ] 0
 ILXW  Inv [0 ] 0
 ILXW  Data [0 ] 0
-ILXW  L1_WBCLEANDATA [383522 ] 383522
-ILXW  L1_WBDIRTYDATA [213003 ] 213003
-ILXW  Unblock [881 ] 881
+ILXW  L1_WBCLEANDATA [390243 ] 390243
+ILXW  L1_WBDIRTYDATA [216095 ] 216095
+ILXW  Unblock [2606 ] 2606
 ILXW  L2_Replacement [0 ] 0
 
 IFLS  L1_GETS [0 ] 0
 IFLS  L1_GETX [0 ] 0
 IFLS  L1_PUTO [0 ] 0
 IFLS  L1_PUTX [0 ] 0
-IFLS  L1_PUTS_only [27 ] 27
+IFLS  L1_PUTS_only [103 ] 103
 IFLS  L1_PUTS [0 ] 0
 IFLS  Fwd_GETX [0 ] 0
 IFLS  Fwd_GETS [0 ] 0
 IFLS  Fwd_DMA [0 ] 0
 IFLS  Inv [0 ] 0
-IFLS  Unblock [32 ] 32
+IFLS  Unblock [8 ] 8
 IFLS  L2_Replacement [0 ] 0
 
 IFLO  L1_GETS [0 ] 0
@@ -1130,78 +1130,78 @@ IFLO  L2_Replacement [0 ] 0
 
 IFLOX  L1_GETS [0 ] 0
 IFLOX  L1_GETX [0 ] 0
-IFLOX  L1_PUTO [2 ] 2
-IFLOX  L1_PUTX [3 ] 3
-IFLOX  L1_PUTS_only [7 ] 7
+IFLOX  L1_PUTO [0 ] 0
+IFLOX  L1_PUTX [15 ] 15
+IFLOX  L1_PUTS_only [54 ] 54
 IFLOX  L1_PUTS [0 ] 0
 IFLOX  Fwd_GETX [0 ] 0
 IFLOX  Fwd_GETS [0 ] 0
 IFLOX  Fwd_DMA [0 ] 0
 IFLOX  Inv [0 ] 0
-IFLOX  Unblock [5 ] 5
-IFLOX  Exclusive_Unblock [4 ] 4
+IFLOX  Unblock [4 ] 4
+IFLOX  Exclusive_Unblock [5 ] 5
 IFLOX  L2_Replacement [0 ] 0
 
-IFLOXX  L1_GETS [166 ] 166
-IFLOXX  L1_GETX [118 ] 118
-IFLOXX  L1_PUTO [481 ] 481
-IFLOXX  L1_PUTX [4826 ] 4826
+IFLOXX  L1_GETS [442 ] 442
+IFLOXX  L1_GETX [254 ] 254
+IFLOXX  L1_PUTO [13 ] 13
+IFLOXX  L1_PUTX [74766 ] 74766
 IFLOXX  L1_PUTS_only [0 ] 0
-IFLOXX  L1_PUTS [3 ] 3
+IFLOXX  L1_PUTS [81 ] 81
 IFLOXX  Fwd_GETX [0 ] 0
 IFLOXX  Fwd_GETS [0 ] 0
 IFLOXX  Fwd_DMA [0 ] 0
 IFLOXX  Inv [0 ] 0
-IFLOXX  Unblock [4224 ] 4224
-IFLOXX  Exclusive_Unblock [3998 ] 3998
+IFLOXX  Unblock [5204 ] 5204
+IFLOXX  Exclusive_Unblock [3120 ] 3120
 IFLOXX  L2_Replacement [0 ] 0
 
 IFLOSX  L1_GETS [0 ] 0
 IFLOSX  L1_GETX [0 ] 0
-IFLOSX  L1_PUTO [5 ] 5
-IFLOSX  L1_PUTX [15 ] 15
-IFLOSX  L1_PUTS_only [6 ] 6
+IFLOSX  L1_PUTO [0 ] 0
+IFLOSX  L1_PUTX [153 ] 153
+IFLOSX  L1_PUTS_only [73 ] 73
 IFLOSX  L1_PUTS [0 ] 0
 IFLOSX  Fwd_GETX [0 ] 0
 IFLOSX  Fwd_GETS [0 ] 0
 IFLOSX  Fwd_DMA [0 ] 0
 IFLOSX  Inv [0 ] 0
-IFLOSX  Unblock [20 ] 20
+IFLOSX  Unblock [13 ] 13
 IFLOSX  Exclusive_Unblock [0 ] 0
 IFLOSX  L2_Replacement [0 ] 0
 
 IFLXO  L1_GETS [0 ] 0
 IFLXO  L1_GETX [0 ] 0
 IFLXO  L1_PUTO [0 ] 0
-IFLXO  L1_PUTX [9 ] 9
-IFLXO  L1_PUTS_only [3 ] 3
+IFLXO  L1_PUTX [122 ] 122
+IFLXO  L1_PUTS_only [24 ] 24
 IFLXO  L1_PUTS [0 ] 0
 IFLXO  Fwd_GETX [0 ] 0
 IFLXO  Fwd_GETS [0 ] 0
 IFLXO  Fwd_DMA [0 ] 0
 IFLXO  Inv [0 ] 0
-IFLXO  Exclusive_Unblock [4 ] 4
+IFLXO  Exclusive_Unblock [11 ] 11
 IFLXO  L2_Replacement [0 ] 0
 
-IGS  L1_GETS [119216 ] 119216
-IGS  L1_GETX [64381 ] 64381
+IGS  L1_GETS [49466 ] 49466
+IGS  L1_GETX [26282 ] 26282
 IGS  L1_PUTO [0 ] 0
-IGS  L1_PUTX [0 ] 0
+IGS  L1_PUTX [400 ] 400
 IGS  L1_PUTS_only [0 ] 0
-IGS  L1_PUTS [0 ] 0
+IGS  L1_PUTS [4 ] 4
 IGS  Fwd_GETX [0 ] 0
 IGS  Fwd_GETS [0 ] 0
 IGS  Fwd_DMA [0 ] 0
 IGS  Own_GETX [0 ] 0
 IGS  Inv [0 ] 0
-IGS  Data [2190 ] 2190
-IGS  Data_Exclusive [387955 ] 387955
-IGS  Unblock [2190 ] 2190
-IGS  Exclusive_Unblock [387954 ] 387954
+IGS  Data [410 ] 410
+IGS  Data_Exclusive [393182 ] 393182
+IGS  Unblock [410 ] 410
+IGS  Exclusive_Unblock [393173 ] 393173
 IGS  L2_Replacement [0 ] 0
 
-IGM  L1_GETS [62835 ] 62835
-IGM  L1_GETX [33663 ] 33663
+IGM  L1_GETS [21007 ] 21007
+IGM  L1_GETX [11459 ] 11459
 IGM  L1_PUTO [0 ] 0
 IGM  L1_PUTX [0 ] 0
 IGM  L1_PUTS_only [0 ] 0
@@ -1212,7 +1212,7 @@ IGM  Fwd_DMA [0 ] 0
 IGM  Own_GETX [0 ] 0
 IGM  Inv [0 ] 0
 IGM  ExtAck [0 ] 0
-IGM  Data [210568 ] 210568
+IGM  Data [212459 ] 212459
 IGM  Data_Exclusive [0 ] 0
 IGM  L2_Replacement [0 ] 0
 
@@ -1220,20 +1220,20 @@ IGMLS  L1_GETS [0 ] 0
 IGMLS  L1_GETX [0 ] 0
 IGMLS  L1_PUTO [0 ] 0
 IGMLS  L1_PUTX [0 ] 0
-IGMLS  L1_PUTS_only [1022 ] 1022
+IGMLS  L1_PUTS_only [60 ] 60
 IGMLS  L1_PUTS [0 ] 0
 IGMLS  Inv [0 ] 0
 IGMLS  IntAck [0 ] 0
 IGMLS  ExtAck [0 ] 0
 IGMLS  All_Acks [0 ] 0
-IGMLS  Data [15 ] 15
+IGMLS  Data [4 ] 4
 IGMLS  Data_Exclusive [0 ] 0
 IGMLS  L2_Replacement [0 ] 0
 
-IGMO  L1_GETS [2045 ] 2045
-IGMO  L1_GETX [1079 ] 1079
+IGMO  L1_GETS [5289 ] 5289
+IGMO  L1_GETX [2901 ] 2901
 IGMO  L1_PUTO [0 ] 0
-IGMO  L1_PUTX [0 ] 0
+IGMO  L1_PUTX [190 ] 190
 IGMO  L1_PUTS_only [27 ] 27
 IGMO  L1_PUTS [0 ] 0
 IGMO  Fwd_GETX [0 ] 0
@@ -1241,8 +1241,8 @@ IGMO  Fwd_GETS [0 ] 0
 IGMO  Fwd_DMA [0 ] 0
 IGMO  Own_GETX [0 ] 0
 IGMO  ExtAck [0 ] 0
-IGMO  All_Acks [210583 ] 210583
-IGMO  Exclusive_Unblock [210583 ] 210583
+IGMO  All_Acks [212463 ] 212463
+IGMO  Exclusive_Unblock [212458 ] 212458
 IGMO  L2_Replacement [0 ] 0
 
 IGMIO  L1_GETS [0 ] 0
@@ -1312,17 +1312,17 @@ II  L1_PUTS [0 ] 0
 II  IntAck [0 ] 0
 II  All_Acks [0 ] 0
 
-MM  L1_GETS [2 ] 2
-MM  L1_GETX [0 ] 0
+MM  L1_GETS [57 ] 57
+MM  L1_GETX [35 ] 35
 MM  L1_PUTO [0 ] 0
-MM  L1_PUTX [0 ] 0
+MM  L1_PUTX [14 ] 14
 MM  L1_PUTS_only [0 ] 0
 MM  L1_PUTS [0 ] 0
 MM  Fwd_GETX [0 ] 0
 MM  Fwd_GETS [0 ] 0
 MM  Fwd_DMA [0 ] 0
 MM  Inv [0 ] 0
-MM  Exclusive_Unblock [773 ] 773
+MM  Exclusive_Unblock [2069 ] 2069
 MM  L2_Replacement [0 ] 0
 
 SS  L1_GETS [0 ] 0
@@ -1335,13 +1335,13 @@ SS  Fwd_GETX [0 ] 0
 SS  Fwd_GETS [0 ] 0
 SS  Fwd_DMA [0 ] 0
 SS  Inv [0 ] 0
-SS  Unblock [13 ] 13
-SS  L2_Replacement [0 ] 0
+SS  Unblock [5 ] 5
+SS  L2_Replacement [117 ] 117
 
-OO  L1_GETS [1 ] 1
-OO  L1_GETX [1 ] 1
+OO  L1_GETS [82 ] 82
+OO  L1_GETX [23 ] 23
 OO  L1_PUTO [0 ] 0
-OO  L1_PUTX [0 ] 0
+OO  L1_PUTX [17 ] 17
 OO  L1_PUTS_only [0 ] 0
 OO  L1_PUTS [0 ] 0
 OO  Fwd_GETX [0 ] 0
@@ -1349,8 +1349,8 @@ OO  Fwd_GETS [0 ] 0
 OO  Fwd_DMA [0 ] 0
 OO  Inv [0 ] 0
 OO  Unblock [0 ] 0
-OO  Exclusive_Unblock [1431 ] 1431
-OO  L2_Replacement [13 ] 13
+OO  Exclusive_Unblock [3831 ] 3831
+OO  L2_Replacement [51513 ] 51513
 
 OLSS  L1_GETS [0 ] 0
 OLSS  L1_GETX [0 ] 0
@@ -1369,14 +1369,14 @@ OLSXS  L1_GETS [0 ] 0
 OLSXS  L1_GETX [0 ] 0
 OLSXS  L1_PUTO [0 ] 0
 OLSXS  L1_PUTX [0 ] 0
-OLSXS  L1_PUTS_only [0 ] 0
+OLSXS  L1_PUTS_only [76 ] 76
 OLSXS  L1_PUTS [0 ] 0
 OLSXS  Fwd_GETX [0 ] 0
 OLSXS  Fwd_GETS [0 ] 0
 OLSXS  Fwd_DMA [0 ] 0
 OLSXS  Inv [0 ] 0
-OLSXS  Unblock [5 ] 5
-OLSXS  L2_Replacement [0 ] 0
+OLSXS  Unblock [18 ] 18
+OLSXS  L2_Replacement [133 ] 133
 
 SLSS  L1_GETS [0 ] 0
 SLSS  L1_GETX [0 ] 0
@@ -1404,8 +1404,8 @@ OI  Writeback_Ack [0 ] 0
 OI  Writeback_Nack [0 ] 0
 OI  L2_Replacement [0 ] 0
 
-MI  L1_GETS [212 ] 212
-MI  L1_GETX [137 ] 137
+MI  L1_GETS [2569 ] 2569
+MI  L1_GETX [1127 ] 1127
 MI  L1_PUTO [0 ] 0
 MI  L1_PUTX [0 ] 0
 MI  L1_PUTS_only [0 ] 0
@@ -1413,7 +1413,7 @@ MI  L1_PUTS [0 ] 0
 MI  Fwd_GETX [0 ] 0
 MI  Fwd_GETS [0 ] 0
 MI  Fwd_DMA [0 ] 0
-MI  Writeback_Ack [597245 ] 597245
+MI  Writeback_Ack [605365 ] 605365
 MI  L2_Replacement [0 ] 0
 
 MII  L1_GETS [0 ] 0
@@ -1430,12 +1430,12 @@ OLSI  L1_GETS [0 ] 0
 OLSI  L1_GETX [0 ] 0
 OLSI  L1_PUTO [0 ] 0
 OLSI  L1_PUTX [0 ] 0
-OLSI  L1_PUTS_only [64 ] 64
-OLSI  L1_PUTS [3 ] 3
+OLSI  L1_PUTS_only [1033 ] 1033
+OLSI  L1_PUTS [60 ] 60
 OLSI  Fwd_GETX [0 ] 0
 OLSI  Fwd_GETS [0 ] 0
 OLSI  Fwd_DMA [0 ] 0
-OLSI  Writeback_Ack [1277 ] 1277
+OLSI  Writeback_Ack [224 ] 224
 OLSI  L2_Replacement [0 ] 0
 
 ILSI  L1_GETS [0 ] 0
@@ -1520,60 +1520,60 @@ ILOXD  DmaAck [0 ] 0
 ILOXD  L2_Replacement [0 ] 0
 
 Memory controller: system.dir_cntrl0.memBuffer:
-  memory_total_requests: 813693
-  memory_reads: 600734
-  memory_writes: 212933
-  memory_refreshes: 40419
-  memory_total_request_delays: 49780084
-  memory_delays_per_request: 61.178
-  memory_delays_in_input_queue: 345220
-  memory_delays_behind_head_of_bank_queue: 20547755
-  memory_delays_stalled_at_head_of_bank_queue: 28887109
-  memory_stalls_for_bank_busy: 4445044
+  memory_total_requests: 821772
+  memory_reads: 606065
+  memory_writes: 215707
+  memory_refreshes: 52039
+  memory_total_request_delays: 22424142
+  memory_delays_per_request: 27.2875
+  memory_delays_in_input_queue: 6964841
+  memory_delays_behind_head_of_bank_queue: 3660974
+  memory_delays_stalled_at_head_of_bank_queue: 11798327
+  memory_stalls_for_bank_busy: 2081487
   memory_stalls_for_random_busy: 0
-  memory_stalls_for_anti_starvation: 6975038
-  memory_stalls_for_arbitration: 5947339
-  memory_stalls_for_bus: 8079080
+  memory_stalls_for_anti_starvation: 1350390
+  memory_stalls_for_arbitration: 2933922
+  memory_stalls_for_bus: 3903395
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 2057549
-  memory_stalls_for_read_read_turnaround: 1383059
-  accesses_per_bank: 25590  25284  25425  25632  25643  25601  25766  25487  25702  25434  25459  25612  25246  25282  25451  25306  25312  25409  25456  25347  25503  25348  25473  25274  25313  24958  25440  24937  25294  25533  25671  25505  
+  memory_stalls_for_read_write_turnaround: 209449
+  memory_stalls_for_read_read_turnaround: 1319684
+  accesses_per_bank: 25864  25491  25592  25881  25881  25791  25975  25705  25887  25731  25699  25862  25496  25585  25671  25539  25640  25704  25722  25677  25725  25588  25755  25618  25553  25240  25653  25233  25561  25783  25986  25684  
 
  --- Directory ---
  - Event Counts -
-GETX [210594 ] 210594
-GETS [390158 ] 390158
-PUTX [597246 ] 597246
+GETX [212467 ] 212467
+GETS [393608 ] 393608
+PUTX [605391 ] 605391
 PUTO [0 ] 0
-PUTO_SHARERS [1277 ] 1277
+PUTO_SHARERS [224 ] 224
 Unblock [0 ] 0
-Last_Unblock [2190 ] 2190
-Exclusive_Unblock [598537 ] 598537
-Clean_Writeback [385581 ] 385581
-Dirty_Writeback [212941 ] 212941
-Memory_Data [600728 ] 600728
-Memory_Ack [212933 ] 212933
+Last_Unblock [410 ] 410
+Exclusive_Unblock [605629 ] 605629
+Clean_Writeback [389882 ] 389882
+Dirty_Writeback [215707 ] 215707
+Memory_Data [606062 ] 606062
+Memory_Ack [215706 ] 215706
 DMA_READ [0 ] 0
 DMA_WRITE [0 ] 0
 DMA_ACK [0 ] 0
 Data [0 ] 0
 
  - Transitions -
-I  GETX [209329 ] 209329
-I  GETS [387968 ] 387968
+I  GETX [212244 ] 212244
+I  GETS [393189 ] 393189
 I  PUTX [0 ] 0
 I  PUTO [0 ] 0
 I  Memory_Data [0 ] 0
-I  Memory_Ack [209560 ] 209560
+I  Memory_Ack [213990 ] 213990
 I  DMA_READ [0 ] 0
 I  DMA_WRITE [0 ] 0
 
-S  GETX [1265 ] 1265
-S  GETS [2190 ] 2190
+S  GETX [222 ] 222
+S  GETS [410 ] 410
 S  PUTX [0 ] 0
 S  PUTO [0 ] 0
 S  Memory_Data [0 ] 0
-S  Memory_Ack [234 ] 234
+S  Memory_Ack [67 ] 67
 S  DMA_READ [0 ] 0
 S  DMA_WRITE [0 ] 0
 
@@ -1589,9 +1589,9 @@ O  DMA_WRITE [0 ] 0
 
 M  GETX [0 ] 0
 M  GETS [0 ] 0
-M  PUTX [597246 ] 597246
+M  PUTX [605391 ] 605391
 M  PUTO [0 ] 0
-M  PUTO_SHARERS [1277 ] 1277
+M  PUTO_SHARERS [224 ] 224
 M  Memory_Data [0 ] 0
 M  Memory_Ack [0 ] 0
 M  DMA_READ [0 ] 0
@@ -1603,9 +1603,9 @@ IS  PUTX [0 ] 0
 IS  PUTO [0 ] 0
 IS  PUTO_SHARERS [0 ] 0
 IS  Unblock [0 ] 0
-IS  Exclusive_Unblock [387954 ] 387954
-IS  Memory_Data [387955 ] 387955
-IS  Memory_Ack [2021 ] 2021
+IS  Exclusive_Unblock [393172 ] 393172
+IS  Memory_Data [393187 ] 393187
+IS  Memory_Ack [1076 ] 1076
 IS  DMA_READ [0 ] 0
 IS  DMA_WRITE [0 ] 0
 
@@ -1615,9 +1615,9 @@ SS  PUTX [0 ] 0
 SS  PUTO [0 ] 0
 SS  PUTO_SHARERS [0 ] 0
 SS  Unblock [0 ] 0
-SS  Last_Unblock [2190 ] 2190
-SS  Memory_Data [2190 ] 2190
-SS  Memory_Ack [2 ] 2
+SS  Last_Unblock [410 ] 410
+SS  Memory_Data [410 ] 410
+SS  Memory_Ack [0 ] 0
 SS  DMA_READ [0 ] 0
 SS  DMA_WRITE [0 ] 0
 
@@ -1650,21 +1650,21 @@ MM  GETS [0 ] 0
 MM  PUTX [0 ] 0
 MM  PUTO [0 ] 0
 MM  PUTO_SHARERS [0 ] 0
-MM  Exclusive_Unblock [210583 ] 210583
-MM  Memory_Data [210583 ] 210583
-MM  Memory_Ack [1116 ] 1116
+MM  Exclusive_Unblock [212457 ] 212457
+MM  Memory_Data [212465 ] 212465
+MM  Memory_Ack [573 ] 573
 MM  DMA_READ [0 ] 0
 MM  DMA_WRITE [0 ] 0
 
 
-MI  GETX [0 ] 0
-MI  GETS [0 ] 0
+MI  GETX [1 ] 1
+MI  GETS [9 ] 9
 MI  PUTX [0 ] 0
 MI  PUTO [0 ] 0
 MI  PUTO_SHARERS [0 ] 0
 MI  Unblock [0 ] 0
-MI  Clean_Writeback [384541 ] 384541
-MI  Dirty_Writeback [212704 ] 212704
+MI  Clean_Writeback [389726 ] 389726
+MI  Dirty_Writeback [215639 ] 215639
 MI  Memory_Data [0 ] 0
 MI  Memory_Ack [0 ] 0
 MI  DMA_READ [0 ] 0
@@ -1676,8 +1676,8 @@ MIS  PUTX [0 ] 0
 MIS  PUTO [0 ] 0
 MIS  PUTO_SHARERS [0 ] 0
 MIS  Unblock [0 ] 0
-MIS  Clean_Writeback [1040 ] 1040
-MIS  Dirty_Writeback [237 ] 237
+MIS  Clean_Writeback [156 ] 156
+MIS  Dirty_Writeback [68 ] 68
 MIS  Memory_Data [0 ] 0
 MIS  Memory_Ack [0 ] 0
 MIS  DMA_READ [0 ] 0

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr
index 5229c9187908078be279882aa980d1e2b77d3080..3b19f4e09783bebf60b0ff57eb0d3181722ef5fd 100755 (executable)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr
@@ -1,74 +1,74 @@
-system.cpu1: completed 10000 read, 5302 write accesses @1928146
-system.cpu4: completed 10000 read, 5365 write accesses @1942166
-system.cpu7: completed 10000 read, 5319 write accesses @1965207
-system.cpu3: completed 10000 read, 5359 write accesses @1968836
-system.cpu0: completed 10000 read, 5498 write accesses @1974677
-system.cpu2: completed 10000 read, 5513 write accesses @1977476
-system.cpu6: completed 10000 read, 5448 write accesses @1980956
-system.cpu5: completed 10000 read, 5483 write accesses @1995684
-system.cpu4: completed 20000 read, 10717 write accesses @3830467
-system.cpu1: completed 20000 read, 10577 write accesses @3871337
-system.cpu7: completed 20000 read, 10556 write accesses @3902287
-system.cpu5: completed 20000 read, 10901 write accesses @3923395
-system.cpu0: completed 20000 read, 10861 write accesses @3926315
-system.cpu2: completed 20000 read, 10674 write accesses @3934695
-system.cpu6: completed 20000 read, 10925 write accesses @3939046
-system.cpu3: completed 20000 read, 10752 write accesses @3981115
-system.cpu4: completed 30000 read, 16128 write accesses @5754566
-system.cpu7: completed 30000 read, 16027 write accesses @5841539
-system.cpu5: completed 30000 read, 16312 write accesses @5857206
-system.cpu2: completed 30000 read, 16104 write accesses @5869696
-system.cpu1: completed 30000 read, 16084 write accesses @5872577
-system.cpu0: completed 30000 read, 16133 write accesses @5895696
-system.cpu6: completed 30000 read, 16259 write accesses @5909016
-system.cpu3: completed 30000 read, 16253 write accesses @5970997
-system.cpu4: completed 40000 read, 21443 write accesses @7732298
-system.cpu7: completed 40000 read, 21518 write accesses @7817106
-system.cpu0: completed 40000 read, 21561 write accesses @7817675
-system.cpu2: completed 40000 read, 21432 write accesses @7822846
-system.cpu1: completed 40000 read, 21383 write accesses @7845525
-system.cpu5: completed 40000 read, 21816 write accesses @7858096
-system.cpu6: completed 40000 read, 21672 write accesses @7885486
-system.cpu3: completed 40000 read, 21581 write accesses @7941597
-system.cpu4: completed 50000 read, 26787 write accesses @9651285
-system.cpu7: completed 50000 read, 26989 write accesses @9793686
-system.cpu0: completed 50000 read, 26994 write accesses @9797807
-system.cpu2: completed 50000 read, 26921 write accesses @9830875
-system.cpu5: completed 50000 read, 27153 write accesses @9839316
-system.cpu6: completed 50000 read, 27189 write accesses @9858608
-system.cpu1: completed 50000 read, 26834 write accesses @9863587
-system.cpu3: completed 50000 read, 27039 write accesses @9921406
-system.cpu4: completed 60000 read, 32175 write accesses @11605575
-system.cpu2: completed 60000 read, 32358 write accesses @11729986
-system.cpu0: completed 60000 read, 32424 write accesses @11735436
-system.cpu7: completed 60000 read, 32432 write accesses @11778007
-system.cpu6: completed 60000 read, 32473 write accesses @11788255
-system.cpu5: completed 60000 read, 32623 write accesses @11789575
-system.cpu1: completed 60000 read, 32116 write accesses @11821356
-system.cpu3: completed 60000 read, 32229 write accesses @11884826
-system.cpu4: completed 70000 read, 37533 write accesses @13546365
-system.cpu0: completed 70000 read, 37907 write accesses @13701646
-system.cpu2: completed 70000 read, 37745 write accesses @13708257
-system.cpu6: completed 70000 read, 37768 write accesses @13710576
-system.cpu7: completed 70000 read, 37843 write accesses @13719776
-system.cpu5: completed 70000 read, 37934 write accesses @13770505
-system.cpu1: completed 70000 read, 37322 write accesses @13773596
-system.cpu3: completed 70000 read, 37575 write accesses @13859246
-system.cpu4: completed 80000 read, 42663 write accesses @15468226
-system.cpu6: completed 80000 read, 43059 write accesses @15617186
-system.cpu7: completed 80000 read, 43185 write accesses @15635279
-system.cpu0: completed 80000 read, 43129 write accesses @15668486
-system.cpu2: completed 80000 read, 43262 write accesses @15680656
-system.cpu1: completed 80000 read, 42658 write accesses @15703946
-system.cpu5: completed 80000 read, 43215 write accesses @15712586
-system.cpu3: completed 80000 read, 42991 write accesses @15858096
-system.cpu4: completed 90000 read, 48047 write accesses @17468576
-system.cpu2: completed 90000 read, 48557 write accesses @17581105
-system.cpu7: completed 90000 read, 48648 write accesses @17584296
-system.cpu6: completed 90000 read, 48515 write accesses @17584397
-system.cpu1: completed 90000 read, 48024 write accesses @17672186
-system.cpu0: completed 90000 read, 48750 write accesses @17683641
-system.cpu5: completed 90000 read, 48534 write accesses @17695277
-system.cpu3: completed 90000 read, 48496 write accesses @17843215
-system.cpu4: completed 100000 read, 53558 write accesses @19400856
+system.cpu4: completed 10000 read, 5361 write accesses @736700
+system.cpu2: completed 10000 read, 5258 write accesses @741379
+system.cpu3: completed 10000 read, 5403 write accesses @747863
+system.cpu1: completed 10000 read, 5292 write accesses @751357
+system.cpu6: completed 10000 read, 5451 write accesses @754502
+system.cpu7: completed 10000 read, 5438 write accesses @755068
+system.cpu5: completed 10000 read, 5557 write accesses @759525
+system.cpu0: completed 10000 read, 5442 write accesses @772965
+system.cpu4: completed 20000 read, 10700 write accesses @1474707
+system.cpu7: completed 20000 read, 10673 write accesses @1490391
+system.cpu2: completed 20000 read, 10490 write accesses @1492637
+system.cpu3: completed 20000 read, 10828 write accesses @1496240
+system.cpu1: completed 20000 read, 10531 write accesses @1496747
+system.cpu6: completed 20000 read, 10827 write accesses @1502187
+system.cpu5: completed 20000 read, 10968 write accesses @1509184
+system.cpu0: completed 20000 read, 10821 write accesses @1515170
+system.cpu4: completed 30000 read, 16140 write accesses @2234178
+system.cpu2: completed 30000 read, 15837 write accesses @2240133
+system.cpu1: completed 30000 read, 15925 write accesses @2244203
+system.cpu6: completed 30000 read, 16178 write accesses @2245026
+system.cpu0: completed 30000 read, 16116 write accesses @2252500
+system.cpu7: completed 30000 read, 16150 write accesses @2252680
+system.cpu5: completed 30000 read, 16546 write accesses @2254097
+system.cpu3: completed 30000 read, 16154 write accesses @2258292
+system.cpu2: completed 40000 read, 21131 write accesses @2982888
+system.cpu4: completed 40000 read, 21564 write accesses @2988433
+system.cpu6: completed 40000 read, 21517 write accesses @2995571
+system.cpu7: completed 40000 read, 21451 write accesses @3002984
+system.cpu0: completed 40000 read, 21558 write accesses @3005254
+system.cpu1: completed 40000 read, 21476 write accesses @3010475
+system.cpu3: completed 40000 read, 21590 write accesses @3015598
+system.cpu5: completed 40000 read, 21951 write accesses @3024338
+system.cpu2: completed 50000 read, 26563 write accesses @3740176
+system.cpu4: completed 50000 read, 27047 write accesses @3743329
+system.cpu7: completed 50000 read, 26749 write accesses @3757917
+system.cpu6: completed 50000 read, 26964 write accesses @3758280
+system.cpu0: completed 50000 read, 27012 write accesses @3762857
+system.cpu5: completed 50000 read, 27348 write accesses @3768681
+system.cpu1: completed 50000 read, 26902 write accesses @3773494
+system.cpu3: completed 50000 read, 27102 write accesses @3774586
+system.cpu2: completed 60000 read, 32068 write accesses @4487250
+system.cpu4: completed 60000 read, 32524 write accesses @4492613
+system.cpu7: completed 60000 read, 32123 write accesses @4501802
+system.cpu5: completed 60000 read, 32618 write accesses @4505087
+system.cpu6: completed 60000 read, 32304 write accesses @4507148
+system.cpu1: completed 60000 read, 32342 write accesses @4512477
+system.cpu0: completed 60000 read, 32196 write accesses @4513791
+system.cpu3: completed 60000 read, 32477 write accesses @4527938
+system.cpu4: completed 70000 read, 38050 write accesses @5246087
+system.cpu2: completed 70000 read, 37438 write accesses @5246857
+system.cpu6: completed 70000 read, 37522 write accesses @5247624
+system.cpu1: completed 70000 read, 37552 write accesses @5255630
+system.cpu7: completed 70000 read, 37454 write accesses @5256746
+system.cpu5: completed 70000 read, 37853 write accesses @5262449
+system.cpu3: completed 70000 read, 37751 write accesses @5263226
+system.cpu0: completed 70000 read, 37564 write accesses @5268794
+system.cpu6: completed 80000 read, 42984 write accesses @5994771
+system.cpu4: completed 80000 read, 43493 write accesses @5995916
+system.cpu5: completed 80000 read, 42965 write accesses @6000829
+system.cpu2: completed 80000 read, 42825 write accesses @6004649
+system.cpu0: completed 80000 read, 42741 write accesses @6006103
+system.cpu1: completed 80000 read, 42738 write accesses @6009758
+system.cpu7: completed 80000 read, 42872 write accesses @6009923
+system.cpu3: completed 80000 read, 43090 write accesses @6011644
+system.cpu6: completed 90000 read, 48315 write accesses @6743220
+system.cpu4: completed 90000 read, 48816 write accesses @6743546
+system.cpu1: completed 90000 read, 48145 write accesses @6749147
+system.cpu2: completed 90000 read, 48237 write accesses @6753252
+system.cpu5: completed 90000 read, 48465 write accesses @6756537
+system.cpu3: completed 90000 read, 48531 write accesses @6772036
+system.cpu0: completed 90000 read, 48152 write accesses @6774043
+system.cpu7: completed 90000 read, 48393 write accesses @6775135
+system.cpu4: completed 100000 read, 54127 write accesses @7493512
 hack: be nice to actually delete the event here

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout
index 3c127ff6885377e2ce720c9ac44fd1ef23f48d0c..992652d48d636379af5989bcfca912044f846396 100755 (executable)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout
@@ -1,10 +1,12 @@
+Redirecting stdout to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 28 2012 11:32:56
-gem5 started Jul 28 2012 11:35:54
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 14:10:16
+gem5 started Sep  1 2012 14:11:41
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 19400856 because maximum number of loads reached
+Exiting @ tick 7493512 because maximum number of loads reached

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt
index b3d07c64aa174c04cff263fb52e11646ce98430f..2a42b94115f3c1bda610f119dfc5715feaa6ab4d 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt
@@ -1,12 +1,12 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.019401                       # Number of seconds simulated
-sim_ticks                                    19400856                       # Number of ticks simulated
-final_tick                                   19400856                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.007494                       # Number of seconds simulated
+sim_ticks                                     7493512                       # Number of ticks simulated
+final_tick                                    7493512                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_tick_rate                                  84896                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 378952                       # Number of bytes of host memory used
-host_seconds                                   228.52                       # Real time elapsed on the host
+host_tick_rate                                  42711                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 410448                       # Number of bytes of host memory used
+host_seconds                                   175.45                       # Real time elapsed on the host
 system.l1_cntrl4.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl4.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl4.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads
@@ -109,29 +109,29 @@ system.l2_cntrl0.L2cacheMemory.num_tag_array_reads            0
 system.l2_cntrl0.L2cacheMemory.num_tag_array_writes            0                       # number of tag array writes
 system.l2_cntrl0.L2cacheMemory.num_tag_array_stalls            0                       # number of stalls caused by tag array
 system.l2_cntrl0.L2cacheMemory.num_data_array_stalls            0                       # number of stalls caused by data array
-system.cpu0.num_reads                           98844                       # number of read accesses completed
-system.cpu0.num_writes                          53478                       # number of write accesses completed
+system.cpu0.num_reads                           99629                       # number of read accesses completed
+system.cpu0.num_writes                          53203                       # number of write accesses completed
 system.cpu0.num_copies                              0                       # number of copy accesses completed
-system.cpu1.num_reads                           98643                       # number of read accesses completed
-system.cpu1.num_writes                          52679                       # number of write accesses completed
+system.cpu1.num_reads                           99934                       # number of read accesses completed
+system.cpu1.num_writes                          53556                       # number of write accesses completed
 system.cpu1.num_copies                              0                       # number of copy accesses completed
-system.cpu2.num_reads                           99369                       # number of read accesses completed
-system.cpu2.num_writes                          53574                       # number of write accesses completed
+system.cpu2.num_reads                           99904                       # number of read accesses completed
+system.cpu2.num_writes                          53683                       # number of write accesses completed
 system.cpu2.num_copies                              0                       # number of copy accesses completed
-system.cpu3.num_reads                           97889                       # number of read accesses completed
-system.cpu3.num_writes                          52711                       # number of write accesses completed
+system.cpu3.num_reads                           99658                       # number of read accesses completed
+system.cpu3.num_writes                          53732                       # number of write accesses completed
 system.cpu3.num_copies                              0                       # number of copy accesses completed
 system.cpu4.num_reads                          100000                       # number of read accesses completed
-system.cpu4.num_writes                          53558                       # number of write accesses completed
+system.cpu4.num_writes                          54127                       # number of write accesses completed
 system.cpu4.num_copies                              0                       # number of copy accesses completed
-system.cpu5.num_reads                           98762                       # number of read accesses completed
-system.cpu5.num_writes                          53328                       # number of write accesses completed
+system.cpu5.num_reads                           99924                       # number of read accesses completed
+system.cpu5.num_writes                          53749                       # number of write accesses completed
 system.cpu5.num_copies                              0                       # number of copy accesses completed
-system.cpu6.num_reads                           99308                       # number of read accesses completed
-system.cpu6.num_writes                          53445                       # number of write accesses completed
+system.cpu6.num_reads                           99831                       # number of read accesses completed
+system.cpu6.num_writes                          53726                       # number of write accesses completed
 system.cpu6.num_copies                              0                       # number of copy accesses completed
-system.cpu7.num_reads                           99141                       # number of read accesses completed
-system.cpu7.num_writes                          53490                       # number of write accesses completed
+system.cpu7.num_reads                           99585                       # number of read accesses completed
+system.cpu7.num_writes                          53460                       # number of write accesses completed
 system.cpu7.num_copies                              0                       # number of copy accesses completed
 
 ---------- End Simulation Statistics   ----------

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini
index c353a8a4d6be0bb3236f3b735b4a735b0e278195..d06198c0ef5024c52a1fe1921e1ef32545f072a9 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 dir_cntrl0 funcbus funcmem l1_cntrl0 l1_cntrl1 l1_cntrl2 l1_cntrl3 l1_cntrl4 l1_cntrl5 l1_cntrl6 l1_cntrl7 physmem ruby sys_port_proxy
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -30,6 +31,7 @@ system_port=system.sys_port_proxy.slave[0]
 [system.cpu0]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -48,6 +50,7 @@ test=system.l1_cntrl0.sequencer.slave[0]
 [system.cpu1]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -66,6 +69,7 @@ test=system.l1_cntrl1.sequencer.slave[0]
 [system.cpu2]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -84,6 +88,7 @@ test=system.l1_cntrl2.sequencer.slave[0]
 [system.cpu3]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -102,6 +107,7 @@ test=system.l1_cntrl3.sequencer.slave[0]
 [system.cpu4]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -120,6 +126,7 @@ test=system.l1_cntrl4.sequencer.slave[0]
 [system.cpu5]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -138,6 +145,7 @@ test=system.l1_cntrl5.sequencer.slave[0]
 [system.cpu6]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -156,6 +164,7 @@ test=system.l1_cntrl6.sequencer.slave[0]
 [system.cpu7]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -203,9 +212,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -214,6 +223,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -243,6 +253,7 @@ slave=system.cpu0.functional system.cpu1.functional system.cpu2.functional syste
 
 [system.funcmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=false
@@ -318,6 +329,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -396,6 +408,7 @@ tagArrayBanks=1
 [system.l1_cntrl1.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl1.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl1.L1IcacheMemory
@@ -474,6 +487,7 @@ tagArrayBanks=1
 [system.l1_cntrl2.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl2.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl2.L1IcacheMemory
@@ -552,6 +566,7 @@ tagArrayBanks=1
 [system.l1_cntrl3.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl3.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl3.L1IcacheMemory
@@ -630,6 +645,7 @@ tagArrayBanks=1
 [system.l1_cntrl4.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl4.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl4.L1IcacheMemory
@@ -708,6 +724,7 @@ tagArrayBanks=1
 [system.l1_cntrl5.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl5.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl5.L1IcacheMemory
@@ -786,6 +803,7 @@ tagArrayBanks=1
 [system.l1_cntrl6.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl6.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl6.L1IcacheMemory
@@ -864,6 +882,7 @@ tagArrayBanks=1
 [system.l1_cntrl7.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl7.L1DcacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl7.L1IcacheMemory
@@ -879,6 +898,7 @@ slave=system.cpu7.test
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -1141,6 +1161,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats
index ae53e1f0bee18fb71a4a6290c5f7f59ef85cf15b..0cd59876251e141089ff41a34fba8056bb29ffdd 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats
@@ -1,26 +1,26 @@
-Real time: Jul/10/2012 17:54:10
+Real time: Sep/01/2012 13:56:48
 
 Profiler Stats
 --------------
-Elapsed_time_in_seconds: 159
-Elapsed_time_in_minutes: 2.65
-Elapsed_time_in_hours: 0.0441667
-Elapsed_time_in_days: 0.00184028
+Elapsed_time_in_seconds: 121
+Elapsed_time_in_minutes: 2.01667
+Elapsed_time_in_hours: 0.0336111
+Elapsed_time_in_days: 0.00140046
 
-Virtual_time_in_seconds: 158.89
-Virtual_time_in_minutes: 2.64817
-Virtual_time_in_hours:   0.0441361
-Virtual_time_in_days:    0.001839
+Virtual_time_in_seconds: 120.93
+Virtual_time_in_minutes: 2.0155
+Virtual_time_in_hours:   0.0335917
+Virtual_time_in_days:    0.00139965
 
-Ruby_current_time: 19129199
+Ruby_current_time: 5747338
 Ruby_start_time: 0
-Ruby_cycles: 19129199
+Ruby_cycles: 5747338
 
-mbytes_resident: 59.2852
-mbytes_total: 371.031
-resident_ratio: 0.159795
+mbytes_resident: 62.8672
+mbytes_total: 400.102
+resident_ratio: 0.157177
 
-ruby_cycles_executed: [ 19129200 19129200 19129200 19129200 19129200 19129200 19129200 19129200 ]
+ruby_cycles_executed: [ 5747339 5747339 5747339 5747339 5747339 5747339 5747339 5747339 ]
 
 Busy Controller Counts:
 L1Cache-0:0  L1Cache-1:0  L1Cache-2:0  L1Cache-3:0  L1Cache-4:0  L1Cache-5:0  L1Cache-6:0  L1Cache-7:0  
@@ -30,35 +30,35 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 16 count: 615043 average: 15.9984 | standard deviation: 0.126994 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 614923 ]
+sequencer_requests_outstanding: [binsize: 1 max: 16 count: 612864 average: 15.9984 | standard deviation: 0.127219 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 612744 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 128 max: 18900 count: 614915 average: 3981.3 | standard deviation: 2986.1 | 1991 6993 12404 16523 15657 18812 21262 22001 19358 16982 17990 17284 14291 13245 11746 11099 9546 9067 8838 7383 7263 6912 6937 6275 5713 6163 6114 5737 5691 5559 5692 5576 5725 5862 5374 5738 5858 6099 5905 5641 6259 6426 6341 6488 6342 6973 6779 6697 7287 6506 7005 7198 7360 7091 6321 6932 7190 6637 6481 6112 6504 5878 5770 5732 5000 4795 4742 4494 4004 3591 3643 3328 2997 2812 2462 2352 2122 1895 1861 1524 1359 1274 1220 1060 817 870 732 663 569 534 478 366 343 306 232 229 203 170 178 115 119 105 100 72 79 51 44 47 39 35 32 34 33 21 15 16 20 20 9 12 6 9 5 7 4 4 1 4 2 1 3 2 1 2 0 1 0 2 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 128 max: 18900 count: 399418 average: 3983.57 | standard deviation: 2986.25 | 1313 4603 7965 10808 10031 12189 13838 14378 12608 10911 11638 11250 9324 8501 7610 7277 6187 5882 5740 4827 4748 4488 4491 4070 3663 3968 4016 3706 3673 3625 3712 3578 3714 3819 3472 3789 3825 3950 3845 3623 4115 4212 4111 4207 4134 4490 4388 4343 4720 4241 4523 4573 4812 4572 4072 4553 4743 4386 4208 3968 4277 3830 3738 3706 3282 3173 3061 2927 2608 2329 2413 2138 1923 1817 1568 1493 1385 1260 1208 974 885 824 832 702 542 580 475 435 347 344 315 245 224 210 158 148 141 101 105 70 74 65 66 47 44 37 29 30 29 21 19 24 19 9 8 9 15 9 4 8 2 5 5 5 3 2 0 2 0 1 0 1 1 1 0 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 128 max: 17580 count: 215497 average: 3977.07 | standard deviation: 2985.81 | 678 2390 4439 5715 5626 6623 7424 7623 6750 6071 6352 6034 4967 4744 4136 3822 3359 3185 3098 2556 2515 2424 2446 2205 2050 2195 2098 2031 2018 1934 1980 1998 2011 2043 1902 1949 2033 2149 2060 2018 2144 2214 2230 2281 2208 2483 2391 2354 2567 2265 2482 2625 2548 2519 2249 2379 2447 2251 2273 2144 2227 2048 2032 2026 1718 1622 1681 1567 1396 1262 1230 1190 1074 995 894 859 737 635 653 550 474 450 388 358 275 290 257 228 222 190 163 121 119 96 74 81 62 69 73 45 45 40 34 25 35 14 15 17 10 14 13 10 14 12 7 7 5 11 5 4 4 4 0 2 1 2 1 2 2 0 3 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_L1Cache: [binsize: 1 max: 2 count: 146 average:     2 | standard deviation: 0 | 0 0 146 ]
-miss_latency_L2Cache: [binsize: 32 max: 4896 count: 577 average: 518.646 | standard deviation: 644.572 | 150 22 11 14 10 15 13 14 10 13 10 17 17 13 15 17 16 10 13 10 13 11 12 5 5 6 6 5 4 3 6 7 2 2 6 5 5 5 4 1 3 4 1 1 2 3 2 4 1 0 3 1 0 0 1 0 1 0 2 1 1 1 1 0 0 2 0 0 2 1 1 0 0 0 1 0 0 1 0 2 0 1 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_Directory: [binsize: 128 max: 18900 count: 594143 average: 4002.99 | standard deviation: 2984.35 | 0 6267 11714 15661 14872 18114 20672 21402 18868 16538 17610 16906 13985 12986 11489 10864 9318 8883 8638 7173 7052 6713 6742 6100 5537 5991 5933 5545 5525 5393 5499 5387 5550 5688 5190 5545 5661 5895 5694 5419 6034 6209 6144 6254 6105 6751 6523 6475 7026 6279 6782 6966 7142 6877 6082 6718 6968 6449 6284 5911 6346 5717 5615 5584 4865 4675 4629 4394 3896 3524 3551 3265 2936 2762 2403 2300 2065 1854 1818 1488 1332 1245 1200 1048 799 855 724 650 554 524 471 364 339 302 225 223 200 169 177 113 119 103 99 69 79 50 41 47 38 34 32 34 33 21 15 14 19 20 8 12 6 9 5 7 4 4 1 4 2 1 3 2 1 2 0 1 0 2 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_L1Cache_wCC: [binsize: 128 max: 15203 count: 20049 average: 3467.17 | standard deviation: 2965.96 | 1648 674 640 800 736 657 568 579 475 429 371 367 301 258 253 232 226 180 199 207 210 198 193 175 175 171 180 191 166 166 191 189 175 174 184 193 197 204 210 222 225 217 197 234 237 222 256 222 261 227 223 232 218 214 239 214 222 188 197 201 158 161 155 148 135 120 113 100 108 67 92 63 61 50 59 52 57 41 43 36 27 29 20 12 18 15 8 13 15 10 7 2 4 4 7 6 3 1 1 2 0 2 1 3 0 1 3 0 1 1 0 0 0 0 0 2 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_wCC_issue_to_initial_request: [binsize: 128 max: 15171 count: 20013 average: 3285.71 | standard deviation: 2948.63 | 2368 814 723 904 678 636 545 508 401 319 300 294 220 208 194 216 192 185 203 167 197 190 187 182 167 169 182 172 171 168 196 182 164 194 192 184 217 204 234 191 223 227 235 230 200 257 261 248 243 231 196 254 209 213 205 223 218 185 190 174 158 152 139 145 113 95 103 86 83 69 66 65 53 42 51 47 40 41 27 24 23 19 16 14 13 11 9 12 7 6 6 6 3 4 3 3 4 1 1 0 0 1 2 2 0 1 2 1 0 0 0 1 0 0 0 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_wCC_initial_forward_request: [binsize: 32 max: 3522 count: 20013 average: 154.025 | standard deviation: 321.512 | 14313 336 276 277 227 222 194 207 257 178 202 197 189 281 212 180 162 181 147 117 101 97 73 124 81 77 57 76 98 76 71 60 58 58 43 40 36 20 37 32 27 27 28 34 21 15 15 14 13 12 11 15 10 7 8 6 8 3 3 6 5 4 6 2 6 2 1 5 2 1 1 4 2 2 1 2 3 3 0 1 1 0 0 1 0 0 0 1 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 36 count: 20013 average: 24.6151 | standard deviation: 1.14519 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14654 147 4602 55 197 210 122 9 4 7 2 3 1 ]
-miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 14 count: 20013 average: 1.75611 | standard deviation: 1.57695 | 4592 5185 5189 3122 599 522 649 37 57 27 22 9 1 1 1 ]
-imcomplete_wCC_Times: 36
-miss_latency_dir_issue_to_initial_request: [binsize: 128 max: 17751 count: 594143 average: 3281.6 | standard deviation: 2948.63 | 70459 23636 22470 26815 21073 17834 15569 15256 11489 8692 8858 8535 6953 6461 6209 6394 5831 5705 5951 5300 5371 5506 5686 5410 4771 5356 5585 5329 5323 5170 5762 5501 5637 6026 5516 5826 6170 6573 6296 5868 6645 6887 6688 6652 6642 7117 6992 6896 7344 6456 6743 6766 6983 6503 5557 6088 6033 5549 5152 4707 4962 4414 4059 4047 3285 3235 2984 2762 2505 2115 2147 1973 1607 1490 1369 1271 1134 976 879 727 688 601 569 497 395 377 340 255 258 192 194 157 159 120 94 91 79 69 63 47 50 48 37 30 23 24 21 21 19 18 15 12 10 8 8 10 8 2 1 3 2 2 3 0 2 1 0 2 2 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_dir_initial_forward_request: [binsize: 32 max: 3413 count: 594143 average: 11.5407 | standard deviation: 54.8335 | 590975 126 129 122 130 112 152 110 106 86 80 96 57 71 55 74 120 108 112 87 106 121 81 59 55 45 41 49 33 43 36 46 35 44 44 34 51 26 15 21 11 18 15 2 17 9 14 12 14 7 7 14 11 10 7 6 8 7 5 2 3 4 2 3 3 2 5 5 4 1 1 2 1 1 1 2 1 0 1 3 1 0 0 1 1 0 1 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_dir_forward_to_first_response: [binsize: 1 max: 39 count: 594143 average: 24.8323 | standard deviation: 1.2805 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 381121 5028 183309 1629 7600 8210 5800 607 392 287 60 63 33 3 0 1 ]
-miss_latency_dir_first_response_to_completion: [binsize: 32 max: 4786 count: 594143 average: 685.013 | standard deviation: 462.654 | 0 0 0 14569 19552 16984 18956 21831 25498 21270 20601 20164 22271 24246 19384 17880 16629 16644 17418 13914 13519 13446 14462 15723 13379 13279 13011 13909 14567 10666 9436 8186 7949 7755 5930 5689 5412 5522 5680 4515 4518 4289 4761 4798 3591 3222 2904 2669 2658 2080 1990 1847 1910 1906 1483 1470 1347 1505 1527 1157 1030 856 893 875 669 615 565 586 613 480 455 402 445 430 335 328 258 251 242 186 180 182 159 182 128 110 102 127 92 92 76 67 59 62 43 54 39 42 44 40 33 22 27 23 26 18 18 11 7 7 9 10 6 6 7 3 1 4 8 2 3 3 5 2 0 0 1 2 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency: [binsize: 32 max: 5247 count: 612736 average: 1200.43 | standard deviation: 897.753 | 282 3145 8418 12081 13312 12877 15699 17671 17489 17880 16553 14660 15865 15185 12484 11889 11249 9697 9502 8356 7211 7587 7118 6059 5890 5701 5297 5572 5174 4606 4864 5141 4378 4820 4644 4486 4862 4750 4369 4793 4847 4353 4790 4617 4479 5013 4880 4480 4858 5377 4807 5191 5296 5178 5620 5684 5179 5970 6235 5389 5903 5837 5750 6222 6055 5471 5960 6002 5404 5648 5564 5253 5438 5123 4630 4978 4858 4210 4359 4067 3842 3853 3397 2967 3040 3101 2429 2500 2356 2111 2087 1852 1581 1543 1546 1203 1271 1119 1032 946 864 717 757 667 555 483 474 395 400 317 309 314 224 217 188 171 143 146 116 99 92 84 63 82 42 64 42 39 32 32 29 19 25 23 26 17 6 13 14 12 7 7 4 3 5 4 2 2 6 1 1 2 1 4 1 1 1 2 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD: [binsize: 32 max: 5181 count: 398016 average: 1200.52 | standard deviation: 897.915 | 195 2039 5427 7772 8559 8297 10210 11611 11403 11656 10753 9510 10329 9903 8017 7771 7354 6268 6128 5474 4660 4962 4597 3957 3769 3759 3480 3668 3362 2976 3152 3344 2851 3119 3033 2929 3159 3115 2863 3116 3134 2832 3113 2900 2918 3250 3208 2932 3093 3541 3132 3336 3424 3400 3590 3760 3345 3921 4032 3435 3795 3790 3795 4111 3942 3482 3812 3907 3470 3625 3609 3400 3505 3350 3001 3212 3124 2698 2893 2670 2497 2525 2190 1960 1931 2053 1609 1623 1589 1360 1362 1203 998 980 1024 795 841 695 690 608 553 469 499 434 363 295 302 236 257 221 203 205 158 135 132 114 86 97 78 66 66 59 47 51 29 44 30 28 21 22 21 12 16 16 18 8 2 9 7 7 4 2 2 3 4 3 1 0 1 1 1 1 1 3 1 1 0 2 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST: [binsize: 32 max: 5247 count: 214720 average: 1200.28 | standard deviation: 897.454 | 87 1106 2991 4309 4753 4580 5489 6060 6086 6224 5800 5150 5536 5282 4467 4118 3895 3429 3374 2882 2551 2625 2521 2102 2121 1942 1817 1904 1812 1630 1712 1797 1527 1701 1611 1557 1703 1635 1506 1677 1713 1521 1677 1717 1561 1763 1672 1548 1765 1836 1675 1855 1872 1778 2030 1924 1834 2049 2203 1954 2108 2047 1955 2111 2113 1989 2148 2095 1934 2023 1955 1853 1933 1773 1629 1766 1734 1512 1466 1397 1345 1328 1207 1007 1109 1048 820 877 767 751 725 649 583 563 522 408 430 424 342 338 311 248 258 233 192 188 172 159 143 96 106 109 66 82 56 57 57 49 38 33 26 25 16 31 13 20 12 11 11 10 8 7 9 7 8 9 4 4 7 5 3 5 2 0 1 1 1 2 5 0 0 1 0 1 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_L1Cache: [binsize: 1 max: 2 count: 127 average:     2 | standard deviation: 0 | 0 0 127 ]
+miss_latency_L2Cache: [binsize: 8 max: 1479 count: 548 average: 160.54 | standard deviation: 182.654 | 0 123 13 19 16 8 9 19 9 16 7 8 7 11 11 14 6 5 16 15 10 17 13 15 9 5 3 10 10 6 7 2 4 3 7 4 6 11 3 7 1 1 3 3 1 0 4 1 3 0 2 1 1 1 4 1 4 3 0 1 1 2 3 1 1 1 0 1 0 4 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_Directory: [binsize: 32 max: 5247 count: 592233 average: 1206.06 | standard deviation: 897.258 | 0 1530 7779 11438 12663 12155 15071 17152 17006 17363 16106 14306 15569 14890 12190 11597 11031 9508 9267 8135 7013 7404 6950 5853 5745 5548 5152 5417 4995 4471 4724 4997 4255 4651 4515 4316 4706 4576 4212 4634 4706 4200 4634 4473 4318 4859 4719 4317 4704 5205 4631 5001 5137 5002 5422 5488 4992 5743 6052 5184 5726 5651 5592 6035 5879 5295 5791 5825 5210 5487 5420 5089 5293 4979 4503 4854 4727 4078 4250 3965 3741 3766 3305 2881 2979 3018 2354 2444 2286 2068 2038 1804 1534 1510 1510 1173 1240 1100 1015 923 847 704 748 658 549 475 466 387 392 312 300 306 218 212 185 170 140 144 114 96 89 82 61 82 41 63 41 35 32 31 29 18 25 23 26 16 6 13 14 12 7 7 3 3 5 4 2 2 6 1 1 2 1 4 1 1 1 2 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_L1Cache_wCC: [binsize: 32 max: 4563 count: 19828 average: 1068.68 | standard deviation: 895.348 | 0 1563 599 600 607 667 601 494 465 490 439 348 290 288 286 285 215 184 234 220 198 183 167 204 144 153 143 155 179 134 140 144 123 167 128 170 156 174 157 158 141 153 156 144 161 154 160 163 154 172 176 190 159 176 198 196 187 227 183 205 177 186 158 187 176 176 169 177 194 161 144 164 145 144 127 124 131 132 109 102 101 87 92 86 61 83 75 56 70 43 49 48 47 33 36 30 31 19 17 23 17 13 9 9 6 8 8 8 8 5 9 8 6 5 3 1 3 2 2 3 3 2 2 0 1 1 1 4 0 1 0 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_wCC_issue_to_initial_request: [binsize: 32 max: 4528 count: 19420 average: 987.434 | standard deviation: 888.941 | 2163 647 674 653 701 578 458 422 470 395 253 231 234 252 194 182 144 193 195 142 169 172 151 133 132 131 163 164 120 153 125 135 166 141 159 150 172 144 157 151 143 148 162 158 156 170 147 158 160 179 192 164 182 206 191 204 210 189 180 173 182 140 174 187 164 170 168 173 180 132 156 138 138 118 116 118 111 93 93 97 76 84 66 64 77 53 49 55 33 44 32 34 27 25 28 18 21 9 17 14 11 8 10 6 5 6 7 6 2 7 7 2 3 2 1 4 1 6 2 1 0 1 0 0 1 2 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_wCC_initial_forward_request: [binsize: 8 max: 936 count: 19420 average: 54.8861 | standard deviation: 97.0355 | 0 13582 459 147 146 199 175 200 206 151 201 186 146 193 180 134 181 215 137 182 178 125 149 119 80 110 108 59 90 95 66 74 70 57 69 97 67 76 71 51 46 49 37 29 30 16 24 25 16 25 19 19 16 15 16 17 25 17 12 4 8 8 11 2 6 9 2 8 7 3 7 7 5 3 7 3 1 0 2 2 3 0 4 1 3 2 1 2 4 3 1 0 1 0 0 0 1 0 0 0 1 0 1 0 2 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 42 count: 19420 average: 25.99 | standard deviation: 2.25509 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7947 1317 3874 1481 2161 1246 554 392 201 97 48 43 30 16 8 2 1 1 1 ]
+miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 17 count: 19420 average: 1.88208 | standard deviation: 1.88333 | 4513 4905 4990 2707 612 569 566 138 217 59 58 47 11 9 13 4 0 2 ]
+imcomplete_wCC_Times: 408
+miss_latency_dir_issue_to_initial_request: [binsize: 32 max: 4891 count: 592233 average: 987.318 | standard deviation: 887.301 | 65817 19189 19432 19942 21301 19131 15185 12634 13918 11686 8195 7704 7460 6430 6088 5603 4998 5538 5218 4392 4711 4869 4514 4544 4509 4240 4627 4646 4028 4391 4474 4290 4546 4506 4143 4616 4738 4076 4513 4559 4582 4778 4781 4361 5241 5327 4768 5343 5467 5344 5708 5703 5207 5981 6074 5529 6008 5899 5704 5907 5830 5347 5825 5595 5001 5249 5278 4914 4951 4658 4218 4422 4206 3482 3642 3364 3132 2964 2812 2437 2440 2374 1911 1915 1804 1652 1497 1303 1189 1185 1096 912 872 820 691 678 599 511 471 456 363 330 293 281 267 252 178 163 171 120 125 96 85 84 69 60 63 41 39 41 25 32 36 26 18 16 26 15 17 10 11 6 9 6 6 5 3 2 3 4 0 6 0 1 4 1 2 0 1 1 1 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_dir_initial_forward_request: [binsize: 4 max: 770 count: 592233 average: 10.3682 | standard deviation: 16.3806 | 0 0 511555 57481 13102 3602 2037 784 430 181 68 91 47 46 87 43 38 64 35 41 63 34 31 50 43 25 49 27 29 52 21 33 52 25 21 58 26 39 65 29 35 68 37 57 79 40 35 56 30 31 50 25 25 62 29 28 35 24 27 43 12 33 40 28 20 18 21 21 29 11 15 28 22 22 31 14 18 37 13 21 29 7 14 20 9 13 14 13 6 13 9 7 12 4 8 13 4 9 17 7 4 7 6 6 8 8 6 11 3 5 14 4 3 10 3 4 10 7 8 10 4 1 4 4 3 6 1 1 1 3 2 3 0 5 4 1 0 1 2 2 4 1 2 1 1 1 6 4 1 1 0 1 4 0 0 1 1 3 0 0 1 3 1 0 0 0 0 0 0 0 1 1 2 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 2 1 ]
+miss_latency_dir_forward_to_first_response: [binsize: 1 max: 47 count: 592233 average: 26.1316 | standard deviation: 2.23073 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 216897 30944 143220 42998 77618 37781 14675 13788 6518 3286 2007 1212 508 425 174 84 52 25 8 9 2 0 0 2 ]
+miss_latency_dir_first_response_to_completion: [binsize: 8 max: 1428 count: 592233 average: 182.245 | standard deviation: 133.806 | 0 66 7772 29752 20627 19395 22229 19459 17771 19230 16337 14774 17199 15173 14685 15887 13921 12967 14150 12652 11608 12905 12160 11302 13182 12461 12007 13592 13111 12161 12971 11216 9479 9261 7560 6244 6554 5636 5125 5566 4922 4490 4859 4274 4049 4375 3992 3681 3901 3445 2838 3002 2387 2165 2203 1794 1561 1791 1520 1408 1494 1378 1247 1332 1174 1039 1195 982 879 871 764 604 660 553 434 489 466 432 421 380 380 362 330 287 286 266 216 214 182 158 163 133 134 123 101 91 105 86 92 83 69 61 76 48 45 51 41 33 30 25 22 39 32 19 19 17 9 21 18 8 14 17 7 13 9 12 6 5 10 3 9 10 6 5 3 4 4 1 2 3 1 2 1 0 1 2 0 2 0 0 0 1 0 0 1 1 0 1 0 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 ]
 imcomplete_dir_Times: 0
-miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 97 average:     2 | standard deviation: 0 | 0 0 97 ]
-miss_latency_LD_L2Cache: [binsize: 32 max: 3932 count: 386 average: 537.611 | standard deviation: 654.97 | 100 16 5 9 6 7 9 10 8 8 7 14 11 9 8 11 11 8 10 6 6 9 6 4 2 3 2 5 3 3 5 2 2 1 5 4 2 4 3 1 3 3 0 1 2 3 2 1 0 0 2 1 0 0 1 0 1 0 1 1 1 1 1 0 0 1 0 0 2 1 1 0 0 0 1 0 0 0 0 2 0 1 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD_Directory: [binsize: 128 max: 18900 count: 385845 average: 4005.31 | standard deviation: 2984.21 | 0 4148 7498 10241 9525 11737 13456 13972 12273 10628 11381 11011 9118 8333 7448 7123 6040 5760 5611 4696 4619 4353 4368 3962 3550 3855 3912 3575 3574 3519 3588 3453 3595 3704 3359 3663 3696 3813 3727 3478 3965 4069 3984 4058 3982 4336 4217 4188 4535 4090 4370 4427 4662 4421 3918 4414 4607 4255 4078 3839 4176 3728 3651 3612 3183 3090 2996 2869 2536 2282 2341 2093 1885 1787 1528 1464 1349 1233 1185 952 866 804 818 694 529 570 470 429 337 335 309 244 221 208 153 144 138 100 104 68 74 63 66 44 44 36 27 30 28 21 19 24 19 9 8 8 14 9 3 8 2 5 5 5 3 2 0 2 0 1 0 1 1 1 0 1 0 1 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD_L1Cache_wCC: [binsize: 128 max: 15203 count: 13090 average: 3473.87 | standard deviation: 2975.32 | 1086 423 430 528 471 427 370 393 323 273 250 231 203 167 159 151 146 118 128 129 128 134 121 108 113 112 104 130 99 106 122 125 119 115 113 126 129 137 118 145 150 143 127 149 152 154 171 155 185 151 153 146 150 151 154 139 136 131 130 129 101 102 87 94 99 83 65 58 72 47 72 45 38 30 40 29 36 27 23 22 19 20 14 8 13 10 5 6 10 9 6 1 3 2 5 4 3 1 1 2 0 2 0 3 0 1 2 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_L1Cache: [binsize: 1 max: 2 count: 49 average:     2 | standard deviation: 0 | 0 0 49 ]
-miss_latency_ST_L2Cache: [binsize: 32 max: 4896 count: 191 average: 480.319 | standard deviation: 622.956 | 50 6 6 5 4 8 4 4 2 5 3 3 6 4 7 6 5 2 3 4 7 2 6 1 3 3 4 0 1 0 1 5 0 1 1 1 3 1 1 0 0 1 1 0 0 0 0 3 1 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_Directory: [binsize: 128 max: 17580 count: 208298 average: 3998.67 | standard deviation: 2984.61 | 0 2119 4216 5420 5347 6377 7216 7430 6595 5910 6229 5895 4867 4653 4041 3741 3278 3123 3027 2477 2433 2360 2374 2138 1987 2136 2021 1970 1951 1874 1911 1934 1955 1984 1831 1882 1965 2082 1967 1941 2069 2140 2160 2196 2123 2415 2306 2287 2491 2189 2412 2539 2480 2456 2164 2304 2361 2194 2206 2072 2170 1989 1964 1972 1682 1585 1633 1525 1360 1242 1210 1172 1051 975 875 836 716 621 633 536 466 441 382 354 270 285 254 221 217 189 162 120 118 94 72 79 62 69 73 45 45 40 33 25 35 14 14 17 10 13 13 10 14 12 7 6 5 11 5 4 4 4 0 2 1 2 1 2 2 0 3 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_L1Cache_wCC: [binsize: 128 max: 14806 count: 6959 average: 3454.58 | standard deviation: 2948.43 | 562 251 210 272 265 230 198 186 152 156 121 136 98 91 94 81 80 62 71 78 82 64 72 67 62 59 76 61 67 60 69 64 56 59 71 67 68 67 92 77 75 74 70 85 85 68 85 67 76 76 70 86 68 63 85 75 86 57 67 72 57 59 68 54 36 37 48 42 36 20 20 18 23 20 19 23 21 14 20 14 8 9 6 4 5 5 3 7 5 1 1 1 1 2 2 2 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 91 average:     2 | standard deviation: 0 | 0 0 91 ]
+miss_latency_LD_L2Cache: [binsize: 8 max: 1248 count: 352 average: 161.239 | standard deviation: 178.299 | 0 83 9 12 10 4 6 11 5 9 4 6 2 8 6 7 6 5 7 9 8 8 12 9 4 2 3 9 7 5 4 0 2 1 6 4 2 7 1 6 1 1 1 2 0 0 4 1 2 0 2 1 0 1 3 0 2 1 0 1 1 2 2 1 0 1 0 0 0 2 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_LD_Directory: [binsize: 32 max: 5181 count: 384716 average: 1206.09 | standard deviation: 897.485 | 0 991 5024 7375 8161 7819 9801 11271 11091 11317 10467 9288 10131 9720 7829 7579 7213 6144 5971 5326 4526 4844 4485 3829 3677 3666 3373 3559 3244 2891 3061 3250 2772 2999 2953 2823 3061 2996 2756 3012 3046 2737 3010 2811 2811 3150 3095 2811 2999 3430 3012 3222 3322 3281 3455 3638 3216 3779 3912 3306 3687 3660 3695 3984 3816 3369 3698 3789 3351 3523 3523 3299 3407 3265 2919 3133 3040 2611 2819 2603 2434 2478 2126 1912 1902 1998 1557 1582 1538 1328 1329 1171 966 960 998 779 819 684 678 597 545 458 493 429 361 290 296 232 254 217 196 199 153 133 130 114 85 95 77 63 63 57 45 51 28 43 29 25 21 22 21 11 16 16 18 7 2 9 7 7 4 2 2 3 4 3 1 0 1 1 1 1 1 3 1 1 0 2 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_L1Cache_wCC: [binsize: 32 max: 4349 count: 12857 average: 1070.69 | standard deviation: 893.771 | 0 1017 379 374 371 441 391 324 299 323 281 217 193 179 184 186 140 121 156 147 134 118 111 127 91 93 105 109 118 84 91 94 79 120 79 106 98 119 107 103 88 95 103 89 107 100 113 121 94 111 120 114 102 119 135 122 129 142 120 129 108 130 100 127 126 113 114 118 119 102 86 101 98 85 82 79 84 87 74 67 63 47 64 48 29 55 52 41 51 32 33 32 32 20 26 16 22 11 12 11 8 11 6 5 2 5 6 4 3 4 7 6 5 2 2 0 1 2 1 3 3 2 2 0 1 1 1 3 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST_L1Cache: [binsize: 1 max: 2 count: 36 average:     2 | standard deviation: 0 | 0 0 36 ]
+miss_latency_ST_L2Cache: [binsize: 8 max: 1479 count: 196 average: 159.286 | standard deviation: 190.685 | 0 40 4 7 6 4 3 8 4 7 3 2 5 3 5 7 0 0 9 6 2 9 1 6 5 3 0 1 3 1 3 2 2 2 1 0 4 4 2 1 0 0 2 1 1 0 0 0 1 0 0 0 1 0 1 1 2 2 0 0 0 0 1 0 1 0 0 1 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_ST_Directory: [binsize: 32 max: 5247 count: 207517 average: 1206.02 | standard deviation: 896.84 | 0 539 2755 4063 4502 4336 5270 5881 5915 6046 5639 5018 5438 5170 4361 4018 3818 3364 3296 2809 2487 2560 2465 2024 2068 1882 1779 1858 1751 1580 1663 1747 1483 1652 1562 1493 1645 1580 1456 1622 1660 1463 1624 1662 1507 1709 1624 1506 1705 1775 1619 1779 1815 1721 1967 1850 1776 1964 2140 1878 2039 1991 1897 2051 2063 1926 2093 2036 1859 1964 1897 1790 1886 1714 1584 1721 1687 1467 1431 1362 1307 1288 1179 969 1077 1020 797 862 748 740 709 633 568 550 512 394 421 416 337 326 302 246 255 229 188 185 170 155 138 95 104 107 65 79 55 56 55 49 37 33 26 25 16 31 13 20 12 10 11 9 8 7 9 7 8 9 4 4 7 5 3 5 1 0 1 1 1 2 5 0 0 1 0 1 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST_L1Cache_wCC: [binsize: 32 max: 4563 count: 6971 average: 1064.97 | standard deviation: 898.304 | 0 546 220 226 236 226 210 170 166 167 158 131 97 109 102 99 75 63 78 73 64 65 56 77 53 60 38 46 61 50 49 50 44 47 49 64 58 55 50 55 53 58 53 55 54 54 47 42 60 61 56 76 57 57 63 74 58 85 63 76 69 56 58 60 50 63 55 59 75 59 58 63 47 59 45 45 47 45 35 35 38 40 28 38 32 28 23 15 19 11 16 16 15 13 10 14 9 8 5 12 9 2 3 4 4 3 2 4 5 1 2 2 1 3 1 1 2 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -88,242 +88,242 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard dev
 Resource Usage
 --------------
 page_size: 4096
-user_time: 158
+user_time: 120
 system_time: 0
-page_reclaims: 16310
+page_reclaims: 9010
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 240
 
 Network Stats
 -------------
 
-total_msg_count_Request_Control: 1842744 14741952
-total_msg_count_Response_Data: 1842572 132665184
-total_msg_count_Response_Control: 12837681 102701448
-total_msg_count_Writeback_Data: 638442 45967824
-total_msg_count_Writeback_Control: 4571118 36568944
-total_msg_count_Broadcast_Control: 9212655 73701240
-total_msg_count_Unblock_Control: 1842609 14740872
-total_msgs: 32787821 total_bytes: 421087464
+total_msg_count_Request_Control: 1837479 14699832
+total_msg_count_Response_Data: 1836177 132204744
+total_msg_count_Response_Control: 12786852 102294816
+total_msg_count_Writeback_Data: 636269 45811368
+total_msg_count_Writeback_Control: 4557561 36460488
+total_msg_count_Broadcast_Control: 9175149 73401192
+total_msg_count_Unblock_Control: 1836832 14694656
+total_msgs: 32666319 total_bytes: 419567096
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 3.80272
-  links_utilized_percent_switch_0_link_0: 4.8098 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 2.79565 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_0_link_0_Request_Control: 3 24 [ 0 0 0 3 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Response_Data: 77060 5548320 [ 0 0 0 0 77060 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Response_Control: 536853 4294824 [ 0 0 0 0 536853 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Writeback_Control: 72638 581104 [ 0 0 0 72638 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Broadcast_Control: 537121 4296968 [ 0 0 0 537121 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Request_Control: 77062 616496 [ 0 0 77062 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Response_Data: 2513 180936 [ 0 0 0 0 2513 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Response_Control: 534611 4276888 [ 0 0 0 0 534611 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Data: 26618 1916496 [ 0 0 0 0 0 26618 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Control: 118656 949248 [ 0 0 72638 0 0 46018 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Unblock_Control: 77061 616488 [ 0 0 0 0 0 77061 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_0: 12.5722
+  links_utilized_percent_switch_0_link_0: 15.8935 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 9.25087 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_0_link_0_Request_Control: 35 280 [ 0 0 0 35 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Data: 76393 5500296 [ 0 0 0 0 76393 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Control: 531958 4255664 [ 0 0 0 0 531958 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Writeback_Control: 72037 576296 [ 0 0 0 72037 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Broadcast_Control: 535334 4282672 [ 0 0 0 535334 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Request_Control: 76397 611176 [ 0 0 76397 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Response_Data: 2477 178344 [ 0 0 0 0 2477 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Response_Control: 532890 4263120 [ 0 0 0 0 532890 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Data: 26414 1901808 [ 0 0 0 0 0 26414 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Control: 117622 940976 [ 0 0 72037 0 0 45585 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Unblock_Control: 76429 611432 [ 0 0 0 0 0 76429 0 0 0 0 ] base_latency: 1
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 3.7784
-  links_utilized_percent_switch_1_link_0: 4.77704 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 2.77977 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_1_link_0_Request_Control: 4 32 [ 0 0 0 4 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Response_Data: 76262 5490864 [ 0 0 0 0 76262 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Response_Control: 531458 4251664 [ 0 0 0 0 531458 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Writeback_Control: 71882 575056 [ 0 0 0 71882 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Broadcast_Control: 537917 4303336 [ 0 0 0 537917 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Request_Control: 76266 610128 [ 0 0 76266 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Response_Data: 2510 180720 [ 0 0 0 0 2510 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Response_Control: 535411 4283288 [ 0 0 0 0 535411 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Writeback_Data: 26150 1882800 [ 0 0 0 0 0 26150 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Writeback_Control: 117611 940888 [ 0 0 71882 0 0 45729 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Unblock_Control: 76266 610128 [ 0 0 0 0 0 76266 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_1: 12.568
+  links_utilized_percent_switch_1_link_0: 15.8915 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 9.24449 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_1_link_0_Request_Control: 52 416 [ 0 0 0 52 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Response_Data: 76373 5498856 [ 0 0 0 0 76373 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Response_Control: 531841 4254728 [ 0 0 0 0 531841 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Writeback_Control: 72068 576544 [ 0 0 0 72068 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Broadcast_Control: 535355 4282840 [ 0 0 0 535355 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Request_Control: 76376 611008 [ 0 0 76376 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Response_Data: 2436 175392 [ 0 0 0 0 2436 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Response_Control: 532967 4263736 [ 0 0 0 0 532967 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Data: 26356 1897632 [ 0 0 0 0 0 26356 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Control: 117749 941992 [ 0 0 72068 0 0 45681 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Unblock_Control: 76404 611232 [ 0 0 0 0 0 76404 0 0 0 0 ] base_latency: 1
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 3.7996
-  links_utilized_percent_switch_2_link_0: 4.8032 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 2.796 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_2_link_0_Request_Control: 5 40 [ 0 0 0 5 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Response_Data: 76897 5536584 [ 0 0 0 0 76897 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Response_Control: 535696 4285568 [ 0 0 0 0 535696 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Writeback_Control: 72576 580608 [ 0 0 0 72576 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Broadcast_Control: 537278 4298224 [ 0 0 0 537278 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Request_Control: 76901 615208 [ 0 0 76901 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Response_Data: 2501 180072 [ 0 0 0 0 2501 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Response_Control: 534782 4278256 [ 0 0 0 0 534782 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Writeback_Data: 26683 1921176 [ 0 0 0 0 0 26683 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Writeback_Control: 118468 947744 [ 0 0 72576 0 0 45892 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Unblock_Control: 76898 615184 [ 0 0 0 0 0 76898 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_2: 12.5919
+  links_utilized_percent_switch_2_link_0: 15.9195 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 9.26437 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_2_link_0_Request_Control: 64 512 [ 0 0 0 64 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Response_Data: 76578 5513616 [ 0 0 0 0 76578 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Response_Control: 533340 4266720 [ 0 0 0 0 533340 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Writeback_Control: 72141 577128 [ 0 0 0 72141 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Broadcast_Control: 535143 4281144 [ 0 0 0 535143 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Request_Control: 76582 612656 [ 0 0 76582 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Response_Data: 2491 179352 [ 0 0 0 0 2491 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Response_Control: 532712 4261696 [ 0 0 0 0 532712 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Writeback_Data: 26542 1911024 [ 0 0 0 0 0 26542 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Writeback_Control: 117716 941728 [ 0 0 72141 0 0 45575 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Unblock_Control: 76602 612816 [ 0 0 0 0 0 76602 0 0 0 0 ] base_latency: 1
 
 switch_3_inlinks: 2
 switch_3_outlinks: 2
-links_utilized_percent_switch_3: 3.80001
-  links_utilized_percent_switch_3_link_0: 4.80241 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_1: 2.7976 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_3_link_0_Request_Control: 2 16 [ 0 0 0 2 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Response_Data: 76881 5535432 [ 0 0 0 0 76881 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Response_Control: 535602 4284816 [ 0 0 0 0 535602 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Writeback_Control: 72495 579960 [ 0 0 0 72495 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Broadcast_Control: 537298 4298384 [ 0 0 0 537298 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Request_Control: 76883 615064 [ 0 0 76883 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Response_Data: 2442 175824 [ 0 0 0 0 2442 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Response_Control: 534858 4278864 [ 0 0 0 0 534858 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Writeback_Data: 26841 1932552 [ 0 0 0 0 0 26841 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Writeback_Control: 118149 945192 [ 0 0 72495 0 0 45654 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Unblock_Control: 76881 615048 [ 0 0 0 0 0 76881 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_3: 12.573
+  links_utilized_percent_switch_3_link_0: 15.8996 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_1: 9.24651 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_3_link_0_Request_Control: 51 408 [ 0 0 0 51 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Response_Data: 76442 5503824 [ 0 0 0 0 76442 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Response_Control: 532240 4257920 [ 0 0 0 0 532240 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Writeback_Control: 72049 576392 [ 0 0 0 72049 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Broadcast_Control: 535287 4282296 [ 0 0 0 535287 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Request_Control: 76443 611544 [ 0 0 76443 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Response_Data: 2405 173160 [ 0 0 0 0 2405 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Response_Control: 532929 4263432 [ 0 0 0 0 532929 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Writeback_Data: 26413 1901736 [ 0 0 0 0 0 26413 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Writeback_Control: 117652 941216 [ 0 0 72049 0 0 45603 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Unblock_Control: 76474 611792 [ 0 0 0 0 0 76474 0 0 0 0 ] base_latency: 1
 
 switch_4_inlinks: 2
 switch_4_outlinks: 2
-links_utilized_percent_switch_4: 3.79333
-  links_utilized_percent_switch_4_link_0: 4.7963 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_4_link_1: 2.79036 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_4_link_0_Request_Control: 4 32 [ 0 0 0 4 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_Response_Data: 76730 5524560 [ 0 0 0 0 76730 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_Response_Control: 534710 4277680 [ 0 0 0 0 534710 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_Writeback_Control: 72256 578048 [ 0 0 0 72256 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_Broadcast_Control: 537447 4299576 [ 0 0 0 537447 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Request_Control: 76733 613864 [ 0 0 76733 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Response_Data: 2540 182880 [ 0 0 0 0 2540 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Response_Control: 534911 4279288 [ 0 0 0 0 534911 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Writeback_Data: 26475 1906200 [ 0 0 0 0 0 26475 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Writeback_Control: 118034 944272 [ 0 0 72256 0 0 45778 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Unblock_Control: 76733 613864 [ 0 0 0 0 0 76733 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_4: 12.5812
+  links_utilized_percent_switch_4_link_0: 15.8978 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_4_link_1: 9.26465 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_4_link_0_Request_Control: 45 360 [ 0 0 0 45 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Response_Data: 76416 5501952 [ 0 0 0 0 76416 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Response_Control: 532263 4258104 [ 0 0 0 0 532263 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Writeback_Control: 72051 576408 [ 0 0 0 72051 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Broadcast_Control: 535299 4282392 [ 0 0 0 535299 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Request_Control: 76419 611352 [ 0 0 76419 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Response_Data: 2481 178632 [ 0 0 0 0 2481 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Response_Control: 532859 4262872 [ 0 0 0 0 532859 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Writeback_Data: 26602 1915344 [ 0 0 0 0 0 26602 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Writeback_Control: 117475 939800 [ 0 0 72051 0 0 45424 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Unblock_Control: 76442 611536 [ 0 0 0 0 0 76442 0 0 0 0 ] base_latency: 1
 
 switch_5_inlinks: 2
 switch_5_outlinks: 2
-links_utilized_percent_switch_5: 3.79978
-  links_utilized_percent_switch_5_link_0: 4.80536 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_5_link_1: 2.79419 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_5_link_0_Request_Control: 4 32 [ 0 0 0 4 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_Response_Data: 76949 5540328 [ 0 0 0 0 76949 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_Response_Control: 536186 4289488 [ 0 0 0 0 536186 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_Writeback_Control: 72495 579960 [ 0 0 0 72495 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_Broadcast_Control: 537229 4297832 [ 0 0 0 537229 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Request_Control: 76952 615616 [ 0 0 76952 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Response_Data: 2529 182088 [ 0 0 0 0 2529 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Response_Control: 534704 4277632 [ 0 0 0 0 534704 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Writeback_Data: 26582 1913904 [ 0 0 0 0 0 26582 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Writeback_Control: 118406 947248 [ 0 0 72495 0 0 45911 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Unblock_Control: 76951 615608 [ 0 0 0 0 0 76951 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_5: 12.5868
+  links_utilized_percent_switch_5_link_0: 15.9069 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_5_link_1: 9.26682 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_5_link_0_Request_Control: 56 448 [ 0 0 0 56 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_Response_Data: 76494 5507568 [ 0 0 0 0 76494 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_Response_Control: 532599 4260792 [ 0 0 0 0 532599 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_Writeback_Control: 72112 576896 [ 0 0 0 72112 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_Broadcast_Control: 535231 4281848 [ 0 0 0 535231 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Request_Control: 76498 611984 [ 0 0 76498 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Response_Data: 2537 182664 [ 0 0 0 0 2537 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Response_Control: 532746 4261968 [ 0 0 0 0 532746 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Writeback_Data: 26550 1911600 [ 0 0 0 0 0 26550 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Writeback_Control: 117645 941160 [ 0 0 72112 0 0 45533 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Unblock_Control: 76522 612176 [ 0 0 0 0 0 76522 0 0 0 0 ] base_latency: 1
 
 switch_6_inlinks: 2
 switch_6_outlinks: 2
-links_utilized_percent_switch_6: 3.80784
-  links_utilized_percent_switch_6_link_0: 4.81587 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_6_link_1: 2.79982 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_6_link_0_Request_Control: 6 48 [ 0 0 0 6 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_Response_Data: 77215 5559480 [ 0 0 0 0 77215 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_Response_Control: 537866 4302928 [ 0 0 0 0 537866 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_Writeback_Control: 72700 581600 [ 0 0 0 72700 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_Broadcast_Control: 536967 4295736 [ 0 0 0 536967 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Request_Control: 77217 617736 [ 0 0 77217 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Response_Data: 2515 181080 [ 0 0 0 0 2515 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Response_Control: 534458 4275664 [ 0 0 0 0 534458 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Writeback_Data: 26780 1928160 [ 0 0 0 0 0 26780 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Writeback_Control: 118620 948960 [ 0 0 72700 0 0 45920 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Unblock_Control: 77215 617720 [ 0 0 0 0 0 77215 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_6: 12.5735
+  links_utilized_percent_switch_6_link_0: 15.8851 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_6_link_1: 9.26202 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_6_link_0_Request_Control: 51 408 [ 0 0 0 51 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_Response_Data: 76327 5495544 [ 0 0 0 0 76327 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_Response_Control: 531538 4252304 [ 0 0 0 0 531538 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_Writeback_Control: 72005 576040 [ 0 0 0 72005 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_Broadcast_Control: 535400 4283200 [ 0 0 0 535400 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Request_Control: 76333 610664 [ 0 0 76333 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Response_Data: 2495 179640 [ 0 0 0 0 2495 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Response_Control: 532954 4263632 [ 0 0 0 0 532954 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Writeback_Data: 26570 1913040 [ 0 0 0 0 0 26570 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Writeback_Control: 117421 939368 [ 0 0 72005 0 0 45416 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Unblock_Control: 76346 610768 [ 0 0 0 0 0 76346 0 0 0 0 ] base_latency: 1
 
 switch_7_inlinks: 2
 switch_7_outlinks: 2
-links_utilized_percent_switch_7: 3.782
-  links_utilized_percent_switch_7_link_0: 4.77391 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_7_link_1: 2.79009 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_7_link_0_Request_Control: 7 56 [ 0 0 0 7 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_Response_Data: 76197 5486184 [ 0 0 0 0 76197 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_Response_Control: 530856 4246848 [ 0 0 0 0 530856 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_Writeback_Control: 71802 574416 [ 0 0 0 71802 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_Broadcast_Control: 537982 4303856 [ 0 0 0 537982 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Request_Control: 76199 609592 [ 0 0 76199 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Response_Data: 2497 179784 [ 0 0 0 0 2497 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Response_Control: 535492 4283936 [ 0 0 0 0 535492 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Writeback_Data: 26685 1921320 [ 0 0 0 0 0 26685 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Writeback_Control: 116918 935344 [ 0 0 71802 0 0 45116 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Unblock_Control: 76198 609584 [ 0 0 0 0 0 76198 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_7: 12.6348
+  links_utilized_percent_switch_7_link_0: 15.9835 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_7_link_1: 9.28599 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_7_link_0_Request_Control: 54 432 [ 0 0 0 54 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Response_Data: 77035 5546520 [ 0 0 0 0 77035 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Response_Control: 536498 4291984 [ 0 0 0 0 536498 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Writeback_Control: 72704 581632 [ 0 0 0 72704 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Broadcast_Control: 534687 4277496 [ 0 0 0 534687 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Request_Control: 77037 616296 [ 0 0 77037 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Response_Data: 2504 180288 [ 0 0 0 0 2504 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Response_Control: 532236 4257888 [ 0 0 0 0 532236 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Writeback_Data: 26643 1918296 [ 0 0 0 0 0 26643 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Writeback_Control: 118740 949920 [ 0 0 72704 0 0 46036 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Unblock_Control: 77059 616472 [ 0 0 0 0 0 77059 0 0 0 0 ] base_latency: 1
 
 switch_8_inlinks: 2
 switch_8_outlinks: 2
-links_utilized_percent_switch_8: 13.891
-  links_utilized_percent_switch_8_link_0: 10.6868 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_8_link_1: 17.0952 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_8_link_0_Request_Control: 614213 4913704 [ 0 0 614213 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Writeback_Data: 212814 15322608 [ 0 0 0 0 0 212814 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Writeback_Control: 944862 7558896 [ 0 0 578844 0 0 366018 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Unblock_Control: 614203 4913624 [ 0 0 0 0 0 614203 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Request_Control: 35 280 [ 0 0 0 35 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Response_Data: 594143 42778296 [ 0 0 0 0 594143 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Writeback_Control: 578844 4630752 [ 0 0 0 578844 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Broadcast_Control: 614177 4913416 [ 0 0 0 614177 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_8: 46.0845
+  links_utilized_percent_switch_8_link_0: 35.4528 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_8_link_1: 56.7163 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_8_link_0_Request_Control: 612085 4896680 [ 0 0 612085 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Writeback_Data: 212089 15270408 [ 0 0 0 0 0 212089 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Writeback_Control: 942020 7536160 [ 0 0 577167 0 0 364853 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Unblock_Control: 612277 4898216 [ 0 0 0 0 0 612277 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Request_Control: 408 3264 [ 0 0 0 408 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Response_Data: 592234 42640848 [ 0 0 0 0 592234 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Writeback_Control: 577167 4617336 [ 0 0 0 577167 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Broadcast_Control: 611677 4893416 [ 0 0 0 611677 0 0 0 0 0 0 ] base_latency: 1
 
 switch_9_inlinks: 9
 switch_9_outlinks: 9
-links_utilized_percent_switch_9: 5.4523
-  links_utilized_percent_switch_9_link_0: 4.80981 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_1: 4.77704 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_2: 4.8032 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_3: 4.80241 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_4: 4.7963 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_5: 4.80536 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_6: 4.81587 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_7: 4.77391 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_8: 10.6868 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_9_link_0_Request_Control: 3 24 [ 0 0 0 3 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_0_Response_Data: 77060 5548320 [ 0 0 0 0 77060 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_0_Response_Control: 536853 4294824 [ 0 0 0 0 536853 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_0_Writeback_Control: 72638 581104 [ 0 0 0 72638 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_0_Broadcast_Control: 537121 4296968 [ 0 0 0 537121 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_1_Request_Control: 4 32 [ 0 0 0 4 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_1_Response_Data: 76262 5490864 [ 0 0 0 0 76262 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_1_Response_Control: 531458 4251664 [ 0 0 0 0 531458 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_1_Writeback_Control: 71882 575056 [ 0 0 0 71882 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_1_Broadcast_Control: 537917 4303336 [ 0 0 0 537917 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_2_Request_Control: 5 40 [ 0 0 0 5 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_2_Response_Data: 76897 5536584 [ 0 0 0 0 76897 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_2_Response_Control: 535696 4285568 [ 0 0 0 0 535696 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_2_Writeback_Control: 72576 580608 [ 0 0 0 72576 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_2_Broadcast_Control: 537278 4298224 [ 0 0 0 537278 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_3_Request_Control: 2 16 [ 0 0 0 2 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_3_Response_Data: 76881 5535432 [ 0 0 0 0 76881 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_3_Response_Control: 535602 4284816 [ 0 0 0 0 535602 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_3_Writeback_Control: 72495 579960 [ 0 0 0 72495 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_3_Broadcast_Control: 537298 4298384 [ 0 0 0 537298 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_4_Request_Control: 4 32 [ 0 0 0 4 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_4_Response_Data: 76730 5524560 [ 0 0 0 0 76730 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_4_Response_Control: 534710 4277680 [ 0 0 0 0 534710 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_4_Writeback_Control: 72256 578048 [ 0 0 0 72256 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_4_Broadcast_Control: 537447 4299576 [ 0 0 0 537447 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_5_Request_Control: 4 32 [ 0 0 0 4 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_5_Response_Data: 76949 5540328 [ 0 0 0 0 76949 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_5_Response_Control: 536186 4289488 [ 0 0 0 0 536186 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_5_Writeback_Control: 72495 579960 [ 0 0 0 72495 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_5_Broadcast_Control: 537229 4297832 [ 0 0 0 537229 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_6_Request_Control: 6 48 [ 0 0 0 6 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_6_Response_Data: 77215 5559480 [ 0 0 0 0 77215 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_6_Response_Control: 537866 4302928 [ 0 0 0 0 537866 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_6_Writeback_Control: 72700 581600 [ 0 0 0 72700 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_6_Broadcast_Control: 536967 4295736 [ 0 0 0 536967 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_7_Request_Control: 7 56 [ 0 0 0 7 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_7_Response_Data: 76197 5486184 [ 0 0 0 0 76197 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_7_Response_Control: 530856 4246848 [ 0 0 0 0 530856 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_7_Writeback_Control: 71802 574416 [ 0 0 0 71802 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_7_Broadcast_Control: 537982 4303856 [ 0 0 0 537982 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_8_Request_Control: 614213 4913704 [ 0 0 614213 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_8_Writeback_Data: 212814 15322608 [ 0 0 0 0 0 212814 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_8_Writeback_Control: 944862 7558896 [ 0 0 578844 0 0 366018 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_8_Unblock_Control: 614203 4913624 [ 0 0 0 0 0 614203 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_9: 18.0811
+  links_utilized_percent_switch_9_link_0: 15.8935 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_1: 15.8915 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_2: 15.9195 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_3: 15.8996 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_4: 15.8978 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_5: 15.9069 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_6: 15.8851 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_7: 15.9836 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_8: 35.4528 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_9_link_0_Request_Control: 35 280 [ 0 0 0 35 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Response_Data: 76393 5500296 [ 0 0 0 0 76393 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Response_Control: 531958 4255664 [ 0 0 0 0 531958 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Writeback_Control: 72037 576296 [ 0 0 0 72037 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Broadcast_Control: 535334 4282672 [ 0 0 0 535334 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_1_Request_Control: 52 416 [ 0 0 0 52 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_1_Response_Data: 76373 5498856 [ 0 0 0 0 76373 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_1_Response_Control: 531841 4254728 [ 0 0 0 0 531841 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_1_Writeback_Control: 72068 576544 [ 0 0 0 72068 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_1_Broadcast_Control: 535355 4282840 [ 0 0 0 535355 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_2_Request_Control: 64 512 [ 0 0 0 64 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_2_Response_Data: 76578 5513616 [ 0 0 0 0 76578 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_2_Response_Control: 533340 4266720 [ 0 0 0 0 533340 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_2_Writeback_Control: 72141 577128 [ 0 0 0 72141 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_2_Broadcast_Control: 535143 4281144 [ 0 0 0 535143 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_3_Request_Control: 51 408 [ 0 0 0 51 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_3_Response_Data: 76442 5503824 [ 0 0 0 0 76442 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_3_Response_Control: 532240 4257920 [ 0 0 0 0 532240 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_3_Writeback_Control: 72049 576392 [ 0 0 0 72049 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_3_Broadcast_Control: 535287 4282296 [ 0 0 0 535287 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_4_Request_Control: 45 360 [ 0 0 0 45 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_4_Response_Data: 76416 5501952 [ 0 0 0 0 76416 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_4_Response_Control: 532263 4258104 [ 0 0 0 0 532263 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_4_Writeback_Control: 72051 576408 [ 0 0 0 72051 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_4_Broadcast_Control: 535299 4282392 [ 0 0 0 535299 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_5_Request_Control: 56 448 [ 0 0 0 56 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_5_Response_Data: 76494 5507568 [ 0 0 0 0 76494 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_5_Response_Control: 532603 4260824 [ 0 0 0 0 532603 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_5_Writeback_Control: 72112 576896 [ 0 0 0 72112 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_5_Broadcast_Control: 535231 4281848 [ 0 0 0 535231 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_6_Request_Control: 51 408 [ 0 0 0 51 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_6_Response_Data: 76328 5495616 [ 0 0 0 0 76328 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_6_Response_Control: 531538 4252304 [ 0 0 0 0 531538 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_6_Writeback_Control: 72005 576040 [ 0 0 0 72005 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_6_Broadcast_Control: 535400 4283200 [ 0 0 0 535400 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_7_Request_Control: 54 432 [ 0 0 0 54 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_7_Response_Data: 77035 5546520 [ 0 0 0 0 77035 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_7_Response_Control: 536499 4291992 [ 0 0 0 0 536499 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_7_Writeback_Control: 72704 581632 [ 0 0 0 72704 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_7_Broadcast_Control: 534687 4277496 [ 0 0 0 534687 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_8_Request_Control: 612085 4896680 [ 0 0 612085 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_8_Writeback_Data: 212090 15270480 [ 0 0 0 0 0 212090 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_8_Writeback_Control: 942020 7536160 [ 0 0 577167 0 0 364853 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_8_Unblock_Control: 612277 4898216 [ 0 0 0 0 0 612277 0 0 0 0 ] base_latency: 1
 
 Cache Stats: system.l1_cntrl0.L1IcacheMemory
   system.l1_cntrl0.L1IcacheMemory_total_misses: 0
@@ -334,188 +334,188 @@ Cache Stats: system.l1_cntrl0.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl0.L1DcacheMemory
-  system.l1_cntrl0.L1DcacheMemory_total_misses: 77130
-  system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 77130
+  system.l1_cntrl0.L1DcacheMemory_total_misses: 76458
+  system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 76458
   system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl0.L1DcacheMemory_request_type_LD:   65.0538%
-  system.l1_cntrl0.L1DcacheMemory_request_type_ST:   34.9462%
+  system.l1_cntrl0.L1DcacheMemory_request_type_LD:   64.9965%
+  system.l1_cntrl0.L1DcacheMemory_request_type_ST:   35.0035%
 
-  system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor:   77130    100%
+  system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor:   76458    100%
 
 Cache Stats: system.l1_cntrl0.L2cacheMemory
-  system.l1_cntrl0.L2cacheMemory_total_misses: 77130
-  system.l1_cntrl0.L2cacheMemory_total_demand_misses: 77130
+  system.l1_cntrl0.L2cacheMemory_total_misses: 76458
+  system.l1_cntrl0.L2cacheMemory_total_demand_misses: 76458
   system.l1_cntrl0.L2cacheMemory_total_prefetches: 0
   system.l1_cntrl0.L2cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl0.L2cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl0.L2cacheMemory_request_type_LD:   65.0538%
-  system.l1_cntrl0.L2cacheMemory_request_type_ST:   34.9462%
+  system.l1_cntrl0.L2cacheMemory_request_type_LD:   64.9965%
+  system.l1_cntrl0.L2cacheMemory_request_type_ST:   35.0035%
 
-  system.l1_cntrl0.L2cacheMemory_access_mode_type_Supervisor:   77130    100%
+  system.l1_cntrl0.L2cacheMemory_access_mode_type_Supervisor:   76458    100%
 
  --- L1Cache ---
  - Event Counts -
-Load [49960 50097 50251 49306 50224 49889 50058 49872 ] 399657
+Load [49581 49746 49565 50170 49738 49804 49853 49825 ] 398282
 Ifetch [0 0 0 0 0 0 0 0 ] 0
-Store [26893 26978 27110 27052 26969 26517 26946 27164 ] 215629
-L2_Replacement [76719 76942 77202 76188 77047 76251 76888 76870 ] 614107
-L1_to_L2 [836726 839447 842010 836009 838835 834429 841329 840056 ] 6708841
-Trigger_L2_to_L1D [63 67 79 89 68 80 62 90 ] 598
+Store [26977 26862 26906 27016 26776 26709 26867 26746 ] 214859
+L2_Replacement [76406 76484 76318 77020 76385 76365 76568 76429 ] 611975
+L1_to_L2 [830481 839728 833985 838773 833522 835214 835808 839524 ] 6687035
+Trigger_L2_to_L1D [72 67 68 77 61 73 81 74 ] 573
 Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
-Complete_L2_to_L1 [63 67 79 89 68 80 62 90 ] 598
-Other_GETX [188409 188326 188206 188273 188332 188797 188348 188164 ] 1506855
-Other_GETS [349038 348903 348761 349709 348789 349120 348930 349134 ] 2792384
-Merged_GETS [4 4 6 7 3 4 5 2 ] 35
+Complete_L2_to_L1 [72 67 68 77 61 73 81 74 ] 573
+Other_GETX [187558 187679 187637 187547 187756 187844 187664 187793 ] 1501478
+Other_GETS [347741 347552 347763 347140 347578 347511 347479 347494 ] 2780258
+Merged_GETS [45 56 51 54 35 52 64 51 ] 408
 Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 Invalidate [0 0 0 0 0 0 0 0 ] 0
-Ack [534644 536131 537807 530800 536790 531405 535642 535541 ] 4278760
-Shared_Ack [66 55 59 56 63 53 54 61 ] 467
-Data [2935 2984 2978 2948 2936 2963 2884 2931 ] 23559
-Shared_Data [1031 1085 1122 1041 1068 998 1047 1069 ] 8461
-Exclusive_Data [72764 72880 73115 72208 73056 72301 72966 72881 ] 582171
-Writeback_Ack [72256 72495 72700 71802 72638 71882 72576 72495 ] 578844
+Ack [532196 532539 531481 536430 531897 531773 533288 532189 ] 4261793
+Shared_Ack [67 60 57 68 61 68 52 51 ] 484
+Data [2984 2981 2941 2905 2971 2905 3077 2981 ] 23745
+Shared_Data [1055 1081 1041 1041 1051 1083 1030 1103 ] 8485
+Exclusive_Data [72377 72432 72345 73089 72371 72385 72471 72358 ] 579828
+Writeback_Ack [72051 72112 72004 72704 72037 72068 72141 72049 ] 577166
 Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
-All_acks [1093 1136 1173 1091 1122 1044 1097 1120 ] 8876
-All_acks_no_sharers [75637 75813 76042 75106 75938 75219 75800 75761 ] 605316
+All_acks [1109 1135 1090 1097 1106 1149 1076 1147 ] 8909
+All_acks_no_sharers [75308 75359 75239 75937 75287 75224 75502 75295 ] 603151
 Flush_line [0 0 0 0 0 0 0 0 ] 0
 Block_Ack [0 0 0 0 0 0 0 0 ] 0
 
  - Transitions -
-I  Load [49877 50013 50158 49207 50127 49797 49982 49781 ] 398942
+I  Load [49480 49679 49472 50084 49654 49723 49748 49737 ] 397577
 I  Ifetch [0 0 0 0 0 0 0 0 ] 0
-I  Store [26853 26938 27055 26990 26931 26464 26916 27099 ] 215246
-I  L2_Replacement [1507 1492 1482 1481 1477 1477 1457 1439 ] 11812
-I  L1_to_L2 [349 350 324 338 297 333 341 292 ] 2624
-I  Trigger_L2_to_L1D [1 0 1 0 3 2 2 1 ] 10
+I  Store [26936 26816 26856 26946 26741 26652 26830 26703 ] 214480
+I  L2_Replacement [1453 1427 1415 1414 1414 1398 1444 1403 ] 11368
+I  L1_to_L2 [261 273 272 283 269 270 273 278 ] 2179
+I  Trigger_L2_to_L1D [1 1 1 5 2 0 2 2 ] 14
 I  Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
-I  Other_GETX [187532 187410 187293 187372 187420 187856 187432 187303 ] 1499618
-I  Other_GETS [347295 347206 347055 348026 347085 347452 347243 347456 ] 2778818
+I  Other_GETX [186606 186745 186735 186635 186843 186911 186691 186854 ] 1494020
+I  Other_GETS [346094 345824 346024 345427 345870 345895 345835 345909 ] 2766878
 I  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 I  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 I  Invalidate [0 0 0 0 0 0 0 0 ] 0
 I  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-S  Load [1 2 1 0 3 0 0 0 ] 7
+S  Load [0 1 1 1 0 0 1 1 ] 5
 S  Ifetch [0 0 0 0 0 0 0 0 ] 0
-S  Store [1 0 2 1 0 0 0 0 ] 4
-S  L2_Replacement [2956 2955 3020 2905 2932 2892 2855 2936 ] 23451
-S  L1_to_L2 [2978 2979 3046 2934 2956 2916 2881 2969 ] 23659
-S  Trigger_L2_to_L1D [4 2 3 2 3 2 1 5 ] 22
+S  Store [0 0 1 2 0 0 0 0 ] 3
+S  L2_Replacement [2902 2945 2898 2902 2934 2899 2983 2977 ] 23440
+S  L1_to_L2 [2927 2972 2928 2924 2964 2921 3012 3005 ] 23653
+S  Trigger_L2_to_L1D [2 4 3 1 3 3 2 2 ] 20
 S  Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
-S  Other_GETX [26 33 32 33 28 27 39 34 ] 252
-S  Other_GETS [53 51 65 57 65 63 61 52 ] 467
+S  Other_GETX [30 29 38 25 34 30 39 37 ] 262
+S  Other_GETS [54 56 83 62 61 53 59 56 ] 484
 S  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 S  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 S  Invalidate [0 0 0 0 0 0 0 0 ] 0
 S  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-O  Load [0 0 0 0 0 0 0 0 ] 0
+O  Load [0 0 0 0 0 0 0 1 ] 1
 O  Ifetch [0 0 0 0 0 0 0 0 ] 0
 O  Store [0 0 0 0 0 0 0 0 ] 0
-O  L2_Replacement [1023 1045 1039 1022 1042 1034 1063 1013 ] 8281
-O  L1_to_L2 [239 208 209 230 230 241 206 221 ] 1784
-O  Trigger_L2_to_L1D [1 1 2 2 1 2 0 0 ] 9
+O  L2_Replacement [971 1036 1030 1010 978 973 982 937 ] 7917
+O  L1_to_L2 [210 202 215 195 184 174 189 180 ] 1549
+O  Trigger_L2_to_L1D [1 0 4 0 1 2 0 0 ] 8
 O  Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
-O  Other_GETX [11 8 9 9 7 4 3 9 ] 60
-O  Other_GETS [14 13 11 10 5 13 9 10 ] 85
-O  Merged_GETS [2 0 3 2 2 2 2 1 ] 14
+O  Other_GETX [10 4 3 8 7 1 5 7 ] 45
+O  Other_GETS [6 12 14 10 9 10 12 8 ] 81
+O  Merged_GETS [2 4 0 2 2 1 4 3 ] 18
 O  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 O  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 O  Invalidate [0 0 0 0 0 0 0 0 ] 0
 O  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-M  Load [8 7 5 11 13 9 6 5 ] 64
+M  Load [6 3 12 7 7 7 6 3 ] 51
 M  Ifetch [0 0 0 0 0 0 0 0 ] 0
-M  Store [5 3 6 2 4 5 3 4 ] 32
-M  L2_Replacement [45292 45401 45474 44677 45551 45247 45472 45230 ] 362344
-M  L1_to_L2 [46556 46716 46794 45948 46839 46538 46795 46516 ] 372702
-M  Trigger_L2_to_L1D [37 46 39 56 37 44 44 51 ] 354
+M  Store [4 3 2 4 1 3 2 3 ] 22
+M  L2_Replacement [45001 45123 44967 45609 45188 45244 45184 45252 ] 361568
+M  L1_to_L2 [46252 46425 46234 46881 46433 46549 46465 46457 ] 371696
+M  Trigger_L2_to_L1D [34 32 39 42 40 50 41 38 ] 316
 M  Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
-M  Other_GETX [546 544 560 530 548 567 532 530 ] 4357
-M  Other_GETS [1032 1049 1045 1028 1048 1037 1063 1021 ] 8323
-M  Merged_GETS [0 3 2 2 1 2 2 1 ] 13
+M  Other_GETX [560 537 525 518 509 561 566 519 ] 4295
+M  Other_GETS [939 990 986 966 953 923 927 896 ] 7580
+M  Merged_GETS [27 31 32 33 18 35 33 33 ] 242
 M  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 M  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 M  Invalidate [0 0 0 0 0 0 0 0 ] 0
 M  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-MM  Load [4 4 2 0 8 4 1 3 ] 26
+MM  Load [10 1 5 5 4 5 1 3 ] 34
 MM  Ifetch [0 0 0 0 0 0 0 0 ] 0
-MM  Store [1 0 5 4 1 1 4 1 ] 17
-MM  L2_Replacement [25941 26049 26187 26103 26045 25601 26041 26252 ] 208219
-MM  L1_to_L2 [26666 26761 26914 26832 26800 26309 26733 26968 ] 213983
-MM  Trigger_L2_to_L1D [20 18 34 29 24 30 15 33 ] 203
+MM  Store [0 3 2 1 2 4 1 1 ] 14
+MM  L2_Replacement [26079 25953 26008 26085 25871 25851 25975 25860 ] 207682
+MM  L1_to_L2 [26834 26685 26743 26820 26602 26530 26716 26590 ] 213520
+MM  Trigger_L2_to_L1D [34 30 21 29 15 18 36 32 ] 215
 MM  Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
-MM  Other_GETX [291 327 310 327 322 332 338 282 ] 2529
-MM  Other_GETS [636 580 573 582 575 549 548 586 ] 4629
-MM  Merged_GETS [2 1 1 3 0 0 1 0 ] 8
+MM  Other_GETX [304 297 296 303 301 282 315 312 ] 2410
+MM  Other_GETS [550 562 554 565 565 524 521 531 ] 4372
+MM  Merged_GETS [16 20 17 19 15 16 27 15 ] 145
 MM  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 MM  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 MM  Invalidate [0 0 0 0 0 0 0 0 ] 0
 MM  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-IR  Load [0 0 0 0 2 1 2 1 ] 6
+IR  Load [0 1 1 4 2 0 1 2 ] 11
 IR  Ifetch [0 0 0 0 0 0 0 0 ] 0
-IR  Store [1 0 1 0 1 1 0 0 ] 4
-IR  L1_to_L2 [0 0 0 0 3 5 19 0 ] 27
+IR  Store [1 0 0 1 0 0 1 0 ] 3
+IR  L1_to_L2 [4 0 0 4 0 0 3 1 ] 12
 IR  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-SR  Load [3 1 2 1 2 0 0 3 ] 12
+SR  Load [1 2 2 1 3 2 0 1 ] 12
 SR  Ifetch [0 0 0 0 0 0 0 0 ] 0
-SR  Store [1 1 1 1 1 2 1 2 ] 10
-SR  L1_to_L2 [13 0 21 13 0 11 0 0 ] 58
+SR  Store [1 2 1 0 0 1 2 1 ] 8
+SR  L1_to_L2 [4 4 0 1 9 0 12 17 ] 47
 SR  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-OR  Load [1 1 2 2 1 1 0 0 ] 8
+OR  Load [0 0 2 0 1 2 0 0 ] 5
 OR  Ifetch [0 0 0 0 0 0 0 0 ] 0
-OR  Store [0 0 0 0 0 1 0 0 ] 1
-OR  L1_to_L2 [0 0 15 0 0 0 0 0 ] 15
+OR  Store [1 0 2 0 0 0 0 0 ] 3
+OR  L1_to_L2 [3 0 3 0 0 0 0 0 ] 6
 OR  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-MR  Load [24 28 28 34 27 32 31 31 ] 235
+MR  Load [24 17 24 21 24 29 36 23 ] 198
 MR  Ifetch [0 0 0 0 0 0 0 0 ] 0
-MR  Store [13 18 11 22 10 12 13 20 ] 119
-MR  L1_to_L2 [75 65 70 103 69 85 38 78 ] 583
+MR  Store [10 15 15 21 16 21 5 15 ] 118
+MR  L1_to_L2 [62 40 78 110 59 85 67 53 ] 554
 MR  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-MMR  Load [15 15 23 18 15 17 11 17 ] 131
+MMR  Load [24 19 13 14 9 11 24 23 ] 137
 MMR  Ifetch [0 0 0 0 0 0 0 0 ] 0
-MMR  Store [5 3 11 11 9 13 4 16 ] 72
-MMR  L1_to_L2 [7 33 106 71 11 46 26 72 ] 372
+MMR  Store [10 11 8 15 6 7 12 9 ] 78
+MMR  L1_to_L2 [65 63 13 52 29 25 61 55 ] 363
 MMR  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
 IM  Load [0 0 0 0 0 0 0 0 ] 0
 IM  Ifetch [0 0 0 0 0 0 0 0 ] 0
 IM  Store [0 0 0 0 0 0 0 0 ] 0
 IM  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-IM  L1_to_L2 [266014 266954 266850 265662 266025 261151 267188 267580 ] 2127424
-IM  Other_GETX [0 1 0 0 3 3 1 3 ] 11
-IM  Other_GETS [1 1 2 0 3 1 3 4 ] 15
+IM  L1_to_L2 [262856 266399 264252 266850 263777 263302 262648 267784 ] 2117868
+IM  Other_GETX [9 15 13 10 4 7 9 6 ] 73
+IM  Other_GETS [18 17 24 23 23 21 26 19 ] 171
 IM  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 IM  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 IM  Invalidate [0 0 0 0 0 0 0 0 ] 0
-IM  Ack [184642 185262 185836 185503 184898 182051 184879 186155 ] 1479226
-IM  Data [980 1079 1042 1047 1041 1037 1034 1026 ] 8286
-IM  Exclusive_Data [25873 25859 26013 25943 25890 25427 25880 26071 ] 206956
+IM  Ack [185148 184284 184534 185252 183509 183194 184398 183334 ] 1473653
+IM  Data [1105 1084 1042 1013 1054 1056 1081 1068 ] 8503
+IM  Exclusive_Data [25831 25731 25813 25934 25683 25595 25749 25635 ] 205971
 IM  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
 SM  Load [0 0 0 0 0 0 0 0 ] 0
 SM  Ifetch [0 0 0 0 0 0 0 0 ] 0
 SM  Store [0 0 0 0 0 0 0 0 ] 0
 SM  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-SM  L1_to_L2 [19 0 0 21 57 38 12 0 ] 147
+SM  L1_to_L2 [0 2 8 5 0 0 43 10 ] 68
 SM  Other_GETX [0 0 0 0 0 0 0 0 ] 0
 SM  Other_GETS [0 0 0 0 0 0 0 0 ] 0
 SM  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 SM  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 SM  Invalidate [0 0 0 0 0 0 0 0 ] 0
-SM  Ack [14 7 14 14 7 14 7 14 ] 91
-SM  Data [2 1 3 2 1 2 1 2 ] 14
+SM  Ack [7 14 14 10 0 1 14 7 ] 67
+SM  Data [1 2 2 2 0 1 2 1 ] 11
 SM  Exclusive_Data [0 0 0 0 0 0 0 0 ] 0
 SM  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
@@ -523,99 +523,99 @@ OM  Load [0 0 0 0 0 0 0 0 ] 0
 OM  Ifetch [0 0 0 0 0 0 0 0 ] 0
 OM  Store [0 0 0 0 0 0 0 0 ] 0
 OM  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-OM  L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
+OM  L1_to_L2 [0 0 1 0 0 0 0 0 ] 1
 OM  Other_GETX [0 0 0 0 0 0 0 0 ] 0
 OM  Other_GETS [0 0 0 0 0 0 0 0 ] 0
 OM  Merged_GETS [0 0 0 0 0 0 0 0 ] 0
 OM  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 OM  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 OM  Invalidate [0 0 0 0 0 0 0 0 ] 0
-OM  Ack [0 0 0 0 0 7 0 0 ] 7
+OM  Ack [7 0 14 0 0 0 0 0 ] 21
 OM  All_acks [0 0 0 0 0 0 0 0 ] 0
-OM  All_acks_no_sharers [0 0 0 0 0 1 0 0 ] 1
+OM  All_acks_no_sharers [1 0 2 0 0 0 0 0 ] 3
 OM  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
 ISM  Load [0 0 0 0 0 0 0 0 ] 0
 ISM  Ifetch [0 0 0 0 0 0 0 0 ] 0
 ISM  Store [0 0 0 0 0 0 0 0 ] 0
 ISM  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-ISM  L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
-ISM  Ack [22 37 35 20 24 15 35 28 ] 216
-ISM  All_acks_no_sharers [982 1080 1045 1049 1042 1039 1035 1028 ] 8300
+ISM  L1_to_L2 [0 0 0 0 9 0 11 0 ] 20
+ISM  Ack [142 75 85 118 105 63 101 92 ] 781
+ISM  All_acks_no_sharers [1106 1086 1044 1015 1054 1057 1083 1069 ] 8514
 ISM  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
 M_W  Load [0 0 0 0 0 0 0 0 ] 0
 M_W  Ifetch [0 0 0 0 0 0 0 0 ] 0
 M_W  Store [0 0 0 0 0 0 0 0 ] 0
 M_W  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-M_W  L1_to_L2 [461 361 651 660 482 490 479 531 ] 4115
-M_W  Ack [1518 1555 1755 1715 1738 1699 1935 1901 ] 13816
-M_W  All_acks_no_sharers [46891 47021 47102 46265 47166 46874 47086 46810 ] 375215
+M_W  L1_to_L2 [480 569 456 535 595 415 562 468 ] 4080
+M_W  Ack [1559 1775 1726 1563 1542 1584 1592 1645 ] 12986
+M_W  All_acks_no_sharers [46546 46701 46532 47155 46688 46790 46722 46723 ] 373857
 M_W  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
 MM_W  Load [0 0 0 0 0 0 0 0 ] 0
 MM_W  Ifetch [0 0 0 0 0 0 0 0 ] 0
 MM_W  Store [0 0 0 0 0 0 0 0 ] 0
 MM_W  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-MM_W  L1_to_L2 [686 568 622 740 617 785 679 746 ] 5443
-MM_W  Ack [2474 2435 2636 2518 2705 2372 2595 2622 ] 20357
-MM_W  All_acks_no_sharers [25873 25859 26013 25943 25890 25427 25880 26071 ] 206956
+MM_W  L1_to_L2 [744 911 918 569 890 918 922 734 ] 6606
+MM_W  Ack [2419 2459 2528 2399 2664 2435 2455 2609 ] 19968
+MM_W  All_acks_no_sharers [25831 25731 25813 25934 25683 25595 25749 25635 ] 205971
 MM_W  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
 IS  Load [0 0 0 0 0 0 0 0 ] 0
 IS  Ifetch [0 0 0 0 0 0 0 0 ] 0
 IS  Store [0 0 0 0 0 0 0 0 ] 0
 IS  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-IS  L1_to_L2 [491681 493311 495276 491402 493448 494573 495016 492834 ] 3947541
-IS  Other_GETX [0 1 2 1 2 5 2 3 ] 16
-IS  Other_GETS [4 1 9 3 5 4 1 3 ] 30
+IS  L1_to_L2 [488506 494237 490869 492304 490411 493050 493427 492592 ] 3935396
+IS  Other_GETX [14 24 10 23 22 21 15 25 ] 154
+IS  Other_GETS [38 40 29 32 35 33 42 27 ] 276
 IS  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 IS  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 IS  Invalidate [0 0 0 0 0 0 0 0 ] 0
-IS  Ack [342945 343676 344139 337911 344178 342290 343041 341535 ] 2739715
-IS  Shared_Ack [65 54 54 52 58 49 50 56 ] 438
-IS  Data [1953 1904 1933 1899 1894 1924 1849 1903 ] 15259
-IS  Shared_Data [1031 1085 1122 1041 1068 998 1047 1069 ] 8461
-IS  Exclusive_Data [46891 47021 47102 46265 47166 46874 47086 46810 ] 375215
+IS  Ack [339917 340869 339565 344213 341222 341342 341738 341391 ] 2730257
+IS  Shared_Ack [61 55 54 65 59 67 51 48 ] 460
+IS  Data [1878 1895 1897 1890 1917 1848 1994 1912 ] 15231
+IS  Shared_Data [1055 1081 1041 1041 1051 1083 1030 1103 ] 8485
+IS  Exclusive_Data [46546 46701 46532 47155 46688 46790 46722 46723 ] 373857
 IS  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
 SS  Load [0 0 0 0 0 0 0 0 ] 0
 SS  Ifetch [0 0 0 0 0 0 0 0 ] 0
 SS  Store [0 0 0 0 0 0 0 0 ] 0
 SS  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-SS  L1_to_L2 [745 939 852 749 800 595 748 851 ] 6279
-SS  Ack [3029 3159 3392 3119 3240 2957 3150 3286 ] 25332
-SS  Shared_Ack [1 1 5 4 5 4 4 5 ] 29
-SS  All_acks [1093 1136 1173 1091 1122 1044 1097 1120 ] 8876
-SS  All_acks_no_sharers [1891 1853 1882 1849 1840 1878 1799 1852 ] 14844
+SS  L1_to_L2 [1006 759 822 941 1103 760 1126 1027 ] 7544
+SS  Ack [2997 3063 3015 2875 2855 3154 2990 3111 ] 24060
+SS  Shared_Ack [6 5 3 3 2 1 1 3 ] 24
+SS  All_acks [1109 1135 1090 1097 1106 1149 1076 1147 ] 8909
+SS  All_acks_no_sharers [1824 1841 1848 1833 1862 1782 1948 1868 ] 14806
 SS  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-OI  Load [0 0 0 1 1 0 0 0 ] 2
+OI  Load [1 0 1 0 0 0 0 1 ] 3
 OI  Ifetch [0 0 0 0 0 0 0 0 ] 0
-OI  Store [0 0 0 0 0 0 0 0 ] 0
+OI  Store [0 0 0 0 0 1 0 0 ] 1
 OI  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
 OI  L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
-OI  Other_GETX [0 0 0 0 0 0 0 0 ] 0
-OI  Other_GETS [0 0 0 0 0 0 0 0 ] 0
+OI  Other_GETX [0 0 0 1 1 1 0 0 ] 3
+OI  Other_GETS [0 0 2 1 0 1 0 1 ] 5
 OI  Merged_GETS [0 0 0 0 0 0 0 0 ] 0
 OI  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 OI  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 OI  Invalidate [0 0 0 0 0 0 0 0 ] 0
-OI  Writeback_Ack [1026 1047 1040 1025 1045 1035 1065 1015 ] 8298
+OI  Writeback_Ack [1013 1088 1079 1063 1039 1023 1039 984 ] 8328
 OI  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-MI  Load [8 7 5 6 9 5 4 8 ] 52
+MI  Load [6 4 17 12 17 12 10 6 ] 84
 MI  Ifetch [0 0 0 0 0 0 0 0 ] 0
-MI  Store [5 8 4 6 3 5 2 4 ] 37
+MI  Store [4 1 5 5 2 4 6 5 ] 32
 MI  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
 MI  L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
-MI  Other_GETX [3 2 0 1 2 3 1 0 ] 12
-MI  Other_GETS [3 2 1 3 3 1 2 2 ] 17
-MI  Merged_GETS [0 0 0 0 0 0 0 0 ] 0
+MI  Other_GETX [25 28 17 24 35 30 24 33 ] 216
+MI  Other_GETS [42 51 47 54 62 51 57 47 ] 411
+MI  Merged_GETS [0 1 2 0 0 0 0 0 ] 3
 MI  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 MI  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 MI  Invalidate [0 0 0 0 0 0 0 0 ] 0
-MI  Writeback_Ack [71227 71446 71660 70776 71591 70844 71510 71480 ] 570534
+MI  Writeback_Ack [71013 70996 70908 71616 70962 71014 71078 71032 ] 568619
 MI  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
 II  Load [0 0 0 0 0 0 0 0 ] 0
@@ -628,44 +628,44 @@ II  Other_GETS [0 0 0 0 0 0 0 0 ] 0
 II  Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
 II  NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
 II  Invalidate [0 0 0 0 0 0 0 0 ] 0
-II  Writeback_Ack [3 2 0 1 2 3 1 0 ] 12
+II  Writeback_Ack [25 28 17 25 36 31 24 33 ] 219
 II  Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
 II  Flush_line [0 0 0 0 0 0 0 0 ] 0
 
-IT  Load [0 0 0 0 1 1 2 1 ] 5
+IT  Load [0 0 1 2 0 0 1 2 ] 6
 IT  Ifetch [0 0 0 0 0 0 0 0 ] 0
-IT  Store [1 0 1 0 0 1 0 0 ] 3
+IT  Store [1 0 0 0 0 0 0 0 ] 1
 IT  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-IT  L1_to_L2 [0 0 0 0 3 5 19 0 ] 27
-IT  Complete_L2_to_L1 [1 0 1 0 3 2 2 1 ] 10
+IT  L1_to_L2 [4 4 0 4 0 0 3 1 ] 16
+IT  Complete_L2_to_L1 [1 1 1 5 2 0 2 2 ] 14
 
-ST  Load [1 0 2 1 0 0 0 0 ] 4
+ST  Load [1 1 0 1 1 0 0 1 ] 5
 ST  Ifetch [0 0 0 0 0 0 0 0 ] 0
-ST  Store [1 0 1 1 0 1 0 0 ] 4
+ST  Store [1 0 0 0 0 0 1 1 ] 3
 ST  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-ST  L1_to_L2 [13 0 21 13 22 21 6 17 ] 113
-ST  Complete_L2_to_L1 [4 2 3 2 3 2 1 5 ] 22
+ST  L1_to_L2 [4 9 3 1 9 12 21 17 ] 76
+ST  Complete_L2_to_L1 [2 4 3 1 3 3 2 2 ] 20
 
-OT  Load [1 1 2 0 0 0 0 0 ] 4
+OT  Load [0 0 1 0 0 0 0 0 ] 1
 OT  Ifetch [0 0 0 0 0 0 0 0 ] 0
-OT  Store [0 0 0 0 0 0 0 0 ] 0
+OT  Store [1 0 1 0 0 0 0 0 ] 2
 OT  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-OT  L1_to_L2 [0 0 15 9 3 0 0 0 ] 27
-OT  Complete_L2_to_L1 [1 1 2 2 1 2 0 0 ] 9
+OT  L1_to_L2 [3 0 4 0 0 2 0 0 ] 9
+OT  Complete_L2_to_L1 [1 0 4 0 1 2 0 0 ] 8
 
-MT  Load [12 13 10 13 9 15 15 15 ] 102
+MT  Load [15 8 9 12 12 10 14 11 ] 91
 MT  Ifetch [0 0 0 0 0 0 0 0 ] 0
-MT  Store [6 7 7 10 6 7 2 10 ] 55
+MT  Store [3 7 10 14 5 12 3 5 ] 59
 MT  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-MT  L1_to_L2 [172 140 96 193 118 125 106 184 ] 1134
-MT  Complete_L2_to_L1 [37 46 39 56 37 44 44 51 ] 354
+MT  L1_to_L2 [142 84 115 158 118 139 129 113 ] 998
+MT  Complete_L2_to_L1 [34 32 39 42 40 50 41 38 ] 316
 
-MMT  Load [5 5 11 12 6 7 4 7 ] 57
+MMT  Load [13 10 4 6 4 3 11 10 ] 61
 MMT  Ifetch [0 0 0 0 0 0 0 0 ] 0
-MMT  Store [0 0 5 4 3 4 1 8 ] 25
+MMT  Store [4 4 3 7 3 4 4 3 ] 32
 MMT  L2_Replacement [0 0 0 0 0 0 0 0 ] 0
-MMT  L1_to_L2 [52 62 128 91 55 162 37 197 ] 784
-MMT  Complete_L2_to_L1 [20 18 34 29 24 30 15 33 ] 203
+MMT  L1_to_L2 [114 90 51 136 61 62 118 142 ] 774
+MMT  Complete_L2_to_L1 [34 30 21 29 15 18 36 32 ] 215
 
 MI_F  Load [0 0 0 0 0 0 0 0 ] 0
 MI_F  Ifetch [0 0 0 0 0 0 0 0 ] 0
@@ -763,28 +763,28 @@ Cache Stats: system.l1_cntrl1.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl1.L1DcacheMemory
-  system.l1_cntrl1.L1DcacheMemory_total_misses: 76346
-  system.l1_cntrl1.L1DcacheMemory_total_demand_misses: 76346
+  system.l1_cntrl1.L1DcacheMemory_total_misses: 76449
+  system.l1_cntrl1.L1DcacheMemory_total_demand_misses: 76449
   system.l1_cntrl1.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl1.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl1.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl1.L1DcacheMemory_request_type_LD:   65.2935%
-  system.l1_cntrl1.L1DcacheMemory_request_type_ST:   34.7065%
+  system.l1_cntrl1.L1DcacheMemory_request_type_LD:   65.0983%
+  system.l1_cntrl1.L1DcacheMemory_request_type_ST:   34.9017%
 
-  system.l1_cntrl1.L1DcacheMemory_access_mode_type_Supervisor:   76346    100%
+  system.l1_cntrl1.L1DcacheMemory_access_mode_type_Supervisor:   76449    100%
 
 Cache Stats: system.l1_cntrl1.L2cacheMemory
-  system.l1_cntrl1.L2cacheMemory_total_misses: 76346
-  system.l1_cntrl1.L2cacheMemory_total_demand_misses: 76346
+  system.l1_cntrl1.L2cacheMemory_total_misses: 76449
+  system.l1_cntrl1.L2cacheMemory_total_demand_misses: 76449
   system.l1_cntrl1.L2cacheMemory_total_prefetches: 0
   system.l1_cntrl1.L2cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl1.L2cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl1.L2cacheMemory_request_type_LD:   65.2935%
-  system.l1_cntrl1.L2cacheMemory_request_type_ST:   34.7065%
+  system.l1_cntrl1.L2cacheMemory_request_type_LD:   65.0983%
+  system.l1_cntrl1.L2cacheMemory_request_type_ST:   34.9017%
 
-  system.l1_cntrl1.L2cacheMemory_access_mode_type_Supervisor:   76346    100%
+  system.l1_cntrl1.L2cacheMemory_access_mode_type_Supervisor:   76449    100%
 
 Cache Stats: system.l1_cntrl2.L1IcacheMemory
   system.l1_cntrl2.L1IcacheMemory_total_misses: 0
@@ -795,28 +795,28 @@ Cache Stats: system.l1_cntrl2.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl2.L1DcacheMemory
-  system.l1_cntrl2.L1DcacheMemory_total_misses: 76963
-  system.l1_cntrl2.L1DcacheMemory_total_demand_misses: 76963
+  system.l1_cntrl2.L1DcacheMemory_total_misses: 76663
+  system.l1_cntrl2.L1DcacheMemory_total_demand_misses: 76663
   system.l1_cntrl2.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl2.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl2.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl2.L1DcacheMemory_request_type_LD:   65.0027%
-  system.l1_cntrl2.L1DcacheMemory_request_type_ST:   34.9973%
+  system.l1_cntrl2.L1DcacheMemory_request_type_LD:   64.9727%
+  system.l1_cntrl2.L1DcacheMemory_request_type_ST:   35.0273%
 
-  system.l1_cntrl2.L1DcacheMemory_access_mode_type_Supervisor:   76963    100%
+  system.l1_cntrl2.L1DcacheMemory_access_mode_type_Supervisor:   76663    100%
 
 Cache Stats: system.l1_cntrl2.L2cacheMemory
-  system.l1_cntrl2.L2cacheMemory_total_misses: 76963
-  system.l1_cntrl2.L2cacheMemory_total_demand_misses: 76963
+  system.l1_cntrl2.L2cacheMemory_total_misses: 76663
+  system.l1_cntrl2.L2cacheMemory_total_demand_misses: 76663
   system.l1_cntrl2.L2cacheMemory_total_prefetches: 0
   system.l1_cntrl2.L2cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl2.L2cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl2.L2cacheMemory_request_type_LD:   65.0027%
-  system.l1_cntrl2.L2cacheMemory_request_type_ST:   34.9973%
+  system.l1_cntrl2.L2cacheMemory_request_type_LD:   64.9727%
+  system.l1_cntrl2.L2cacheMemory_request_type_ST:   35.0273%
 
-  system.l1_cntrl2.L2cacheMemory_access_mode_type_Supervisor:   76963    100%
+  system.l1_cntrl2.L2cacheMemory_access_mode_type_Supervisor:   76663    100%
 
 Cache Stats: system.l1_cntrl3.L1IcacheMemory
   system.l1_cntrl3.L1IcacheMemory_total_misses: 0
@@ -827,28 +827,28 @@ Cache Stats: system.l1_cntrl3.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl3.L1DcacheMemory
-  system.l1_cntrl3.L1DcacheMemory_total_misses: 76973
-  system.l1_cntrl3.L1DcacheMemory_total_demand_misses: 76973
+  system.l1_cntrl3.L1DcacheMemory_total_misses: 76517
+  system.l1_cntrl3.L1DcacheMemory_total_demand_misses: 76517
   system.l1_cntrl3.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl3.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl3.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl3.L1DcacheMemory_request_type_LD:   64.7422%
-  system.l1_cntrl3.L1DcacheMemory_request_type_ST:   35.2578%
+  system.l1_cntrl3.L1DcacheMemory_request_type_LD:   65.0679%
+  system.l1_cntrl3.L1DcacheMemory_request_type_ST:   34.9321%
 
-  system.l1_cntrl3.L1DcacheMemory_access_mode_type_Supervisor:   76973    100%
+  system.l1_cntrl3.L1DcacheMemory_access_mode_type_Supervisor:   76517    100%
 
 Cache Stats: system.l1_cntrl3.L2cacheMemory
-  system.l1_cntrl3.L2cacheMemory_total_misses: 76973
-  system.l1_cntrl3.L2cacheMemory_total_demand_misses: 76973
+  system.l1_cntrl3.L2cacheMemory_total_misses: 76517
+  system.l1_cntrl3.L2cacheMemory_total_demand_misses: 76517
   system.l1_cntrl3.L2cacheMemory_total_prefetches: 0
   system.l1_cntrl3.L2cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl3.L2cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl3.L2cacheMemory_request_type_LD:   64.7422%
-  system.l1_cntrl3.L2cacheMemory_request_type_ST:   35.2578%
+  system.l1_cntrl3.L2cacheMemory_request_type_LD:   65.0679%
+  system.l1_cntrl3.L2cacheMemory_request_type_ST:   34.9321%
 
-  system.l1_cntrl3.L2cacheMemory_access_mode_type_Supervisor:   76973    100%
+  system.l1_cntrl3.L2cacheMemory_access_mode_type_Supervisor:   76517    100%
 
 Cache Stats: system.l1_cntrl4.L1IcacheMemory
   system.l1_cntrl4.L1IcacheMemory_total_misses: 0
@@ -859,28 +859,28 @@ Cache Stats: system.l1_cntrl4.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl4.L1DcacheMemory
-  system.l1_cntrl4.L1DcacheMemory_total_misses: 76796
-  system.l1_cntrl4.L1DcacheMemory_total_demand_misses: 76796
+  system.l1_cntrl4.L1DcacheMemory_total_misses: 76491
+  system.l1_cntrl4.L1DcacheMemory_total_demand_misses: 76491
   system.l1_cntrl4.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl4.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl4.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl4.L1DcacheMemory_request_type_LD:   65.0034%
-  system.l1_cntrl4.L1DcacheMemory_request_type_ST:   34.9966%
+  system.l1_cntrl4.L1DcacheMemory_request_type_LD:   64.7514%
+  system.l1_cntrl4.L1DcacheMemory_request_type_ST:   35.2486%
 
-  system.l1_cntrl4.L1DcacheMemory_access_mode_type_Supervisor:   76796    100%
+  system.l1_cntrl4.L1DcacheMemory_access_mode_type_Supervisor:   76491    100%
 
 Cache Stats: system.l1_cntrl4.L2cacheMemory
-  system.l1_cntrl4.L2cacheMemory_total_misses: 76796
-  system.l1_cntrl4.L2cacheMemory_total_demand_misses: 76796
+  system.l1_cntrl4.L2cacheMemory_total_misses: 76491
+  system.l1_cntrl4.L2cacheMemory_total_demand_misses: 76491
   system.l1_cntrl4.L2cacheMemory_total_prefetches: 0
   system.l1_cntrl4.L2cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl4.L2cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl4.L2cacheMemory_request_type_LD:   65.0034%
-  system.l1_cntrl4.L2cacheMemory_request_type_ST:   34.9966%
+  system.l1_cntrl4.L2cacheMemory_request_type_LD:   64.7514%
+  system.l1_cntrl4.L2cacheMemory_request_type_ST:   35.2486%
 
-  system.l1_cntrl4.L2cacheMemory_access_mode_type_Supervisor:   76796    100%
+  system.l1_cntrl4.L2cacheMemory_access_mode_type_Supervisor:   76491    100%
 
 Cache Stats: system.l1_cntrl5.L1IcacheMemory
   system.l1_cntrl5.L1IcacheMemory_total_misses: 0
@@ -891,28 +891,28 @@ Cache Stats: system.l1_cntrl5.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl5.L1DcacheMemory
-  system.l1_cntrl5.L1DcacheMemory_total_misses: 77019
-  system.l1_cntrl5.L1DcacheMemory_total_demand_misses: 77019
+  system.l1_cntrl5.L1DcacheMemory_total_misses: 76565
+  system.l1_cntrl5.L1DcacheMemory_total_demand_misses: 76565
   system.l1_cntrl5.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl5.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl5.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl5.L1DcacheMemory_request_type_LD:   64.9944%
-  system.l1_cntrl5.L1DcacheMemory_request_type_ST:   35.0056%
+  system.l1_cntrl5.L1DcacheMemory_request_type_LD:   64.937%
+  system.l1_cntrl5.L1DcacheMemory_request_type_ST:   35.063%
 
-  system.l1_cntrl5.L1DcacheMemory_access_mode_type_Supervisor:   77019    100%
+  system.l1_cntrl5.L1DcacheMemory_access_mode_type_Supervisor:   76565    100%
 
 Cache Stats: system.l1_cntrl5.L2cacheMemory
-  system.l1_cntrl5.L2cacheMemory_total_misses: 77019
-  system.l1_cntrl5.L2cacheMemory_total_demand_misses: 77019
+  system.l1_cntrl5.L2cacheMemory_total_misses: 76565
+  system.l1_cntrl5.L2cacheMemory_total_demand_misses: 76565
   system.l1_cntrl5.L2cacheMemory_total_prefetches: 0
   system.l1_cntrl5.L2cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl5.L2cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl5.L2cacheMemory_request_type_LD:   64.9944%
-  system.l1_cntrl5.L2cacheMemory_request_type_ST:   35.0056%
+  system.l1_cntrl5.L2cacheMemory_request_type_LD:   64.937%
+  system.l1_cntrl5.L2cacheMemory_request_type_ST:   35.063%
 
-  system.l1_cntrl5.L2cacheMemory_access_mode_type_Supervisor:   77019    100%
+  system.l1_cntrl5.L2cacheMemory_access_mode_type_Supervisor:   76565    100%
 
 Cache Stats: system.l1_cntrl6.L1IcacheMemory
   system.l1_cntrl6.L1IcacheMemory_total_misses: 0
@@ -923,28 +923,28 @@ Cache Stats: system.l1_cntrl6.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl6.L1DcacheMemory
-  system.l1_cntrl6.L1DcacheMemory_total_misses: 77296
-  system.l1_cntrl6.L1DcacheMemory_total_demand_misses: 77296
+  system.l1_cntrl6.L1DcacheMemory_total_misses: 76401
+  system.l1_cntrl6.L1DcacheMemory_total_demand_misses: 76401
   system.l1_cntrl6.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl6.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl6.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl6.L1DcacheMemory_request_type_LD:   64.962%
-  system.l1_cntrl6.L1DcacheMemory_request_type_ST:   35.038%
+  system.l1_cntrl6.L1DcacheMemory_request_type_LD:   64.8094%
+  system.l1_cntrl6.L1DcacheMemory_request_type_ST:   35.1906%
 
-  system.l1_cntrl6.L1DcacheMemory_access_mode_type_Supervisor:   77296    100%
+  system.l1_cntrl6.L1DcacheMemory_access_mode_type_Supervisor:   76401    100%
 
 Cache Stats: system.l1_cntrl6.L2cacheMemory
-  system.l1_cntrl6.L2cacheMemory_total_misses: 77296
-  system.l1_cntrl6.L2cacheMemory_total_demand_misses: 77296
+  system.l1_cntrl6.L2cacheMemory_total_misses: 76401
+  system.l1_cntrl6.L2cacheMemory_total_demand_misses: 76401
   system.l1_cntrl6.L2cacheMemory_total_prefetches: 0
   system.l1_cntrl6.L2cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl6.L2cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl6.L2cacheMemory_request_type_LD:   64.962%
-  system.l1_cntrl6.L2cacheMemory_request_type_ST:   35.038%
+  system.l1_cntrl6.L2cacheMemory_request_type_LD:   64.8094%
+  system.l1_cntrl6.L2cacheMemory_request_type_ST:   35.1906%
 
-  system.l1_cntrl6.L2cacheMemory_access_mode_type_Supervisor:   77296    100%
+  system.l1_cntrl6.L2cacheMemory_access_mode_type_Supervisor:   76401    100%
 
 Cache Stats: system.l1_cntrl7.L1IcacheMemory
   system.l1_cntrl7.L1IcacheMemory_total_misses: 0
@@ -955,28 +955,28 @@ Cache Stats: system.l1_cntrl7.L1IcacheMemory
 
 
 Cache Stats: system.l1_cntrl7.L1DcacheMemory
-  system.l1_cntrl7.L1DcacheMemory_total_misses: 76288
-  system.l1_cntrl7.L1DcacheMemory_total_demand_misses: 76288
+  system.l1_cntrl7.L1DcacheMemory_total_misses: 77114
+  system.l1_cntrl7.L1DcacheMemory_total_demand_misses: 77114
   system.l1_cntrl7.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl7.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl7.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl7.L1DcacheMemory_request_type_LD:   64.5737%
-  system.l1_cntrl7.L1DcacheMemory_request_type_ST:   35.4263%
+  system.l1_cntrl7.L1DcacheMemory_request_type_LD:   65.0051%
+  system.l1_cntrl7.L1DcacheMemory_request_type_ST:   34.9949%
 
-  system.l1_cntrl7.L1DcacheMemory_access_mode_type_Supervisor:   76288    100%
+  system.l1_cntrl7.L1DcacheMemory_access_mode_type_Supervisor:   77114    100%
 
 Cache Stats: system.l1_cntrl7.L2cacheMemory
-  system.l1_cntrl7.L2cacheMemory_total_misses: 76288
-  system.l1_cntrl7.L2cacheMemory_total_demand_misses: 76288
+  system.l1_cntrl7.L2cacheMemory_total_misses: 77114
+  system.l1_cntrl7.L2cacheMemory_total_demand_misses: 77114
   system.l1_cntrl7.L2cacheMemory_total_prefetches: 0
   system.l1_cntrl7.L2cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl7.L2cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl7.L2cacheMemory_request_type_LD:   64.5737%
-  system.l1_cntrl7.L2cacheMemory_request_type_ST:   35.4263%
+  system.l1_cntrl7.L2cacheMemory_request_type_LD:   65.0051%
+  system.l1_cntrl7.L2cacheMemory_request_type_ST:   34.9949%
 
-  system.l1_cntrl7.L2cacheMemory_access_mode_type_Supervisor:   76288    100%
+  system.l1_cntrl7.L2cacheMemory_access_mode_type_Supervisor:   77114    100%
 
 Cache Stats: system.dir_cntrl0.probeFilter
   system.dir_cntrl0.probeFilter_total_misses: 0
@@ -987,42 +987,42 @@ Cache Stats: system.dir_cntrl0.probeFilter
 
 
 Memory controller: system.dir_cntrl0.memBuffer:
-  memory_total_requests: 806978
-  memory_reads: 594147
-  memory_writes: 212804
-  memory_refreshes: 39853
-  memory_total_request_delays: 51488975
-  memory_delays_per_request: 63.8047
-  memory_delays_in_input_queue: 640640
-  memory_delays_behind_head_of_bank_queue: 21056513
-  memory_delays_stalled_at_head_of_bank_queue: 29791822
-  memory_stalls_for_bank_busy: 4491676
+  memory_total_requests: 804345
+  memory_reads: 592238
+  memory_writes: 212082
+  memory_refreshes: 39912
+  memory_total_request_delays: 48631568
+  memory_delays_per_request: 60.4611
+  memory_delays_in_input_queue: 404227
+  memory_delays_behind_head_of_bank_queue: 19355009
+  memory_delays_stalled_at_head_of_bank_queue: 28872332
+  memory_stalls_for_bank_busy: 4352151
   memory_stalls_for_random_busy: 0
-  memory_stalls_for_anti_starvation: 7566963
-  memory_stalls_for_arbitration: 6096462
-  memory_stalls_for_bus: 8254664
+  memory_stalls_for_anti_starvation: 7096916
+  memory_stalls_for_arbitration: 5949777
+  memory_stalls_for_bus: 8066498
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 2034613
-  memory_stalls_for_read_read_turnaround: 1347444
-  accesses_per_bank: 25429  25104  25218  25413  25515  25350  25511  25319  25424  25266  25320  25413  25039  25054  25226  25087  25177  25156  25231  25182  25251  25130  25286  25091  25061  24766  25133  24750  25104  25281  25420  25271  
+  memory_stalls_for_read_write_turnaround: 2045376
+  memory_stalls_for_read_read_turnaround: 1361614
+  accesses_per_bank: 25291  24997  25118  25349  25409  25279  25436  25183  25382  25203  25226  25282  24957  25012  25140  25021  25042  25126  25142  25064  25144  25103  25220  25067  24976  24655  25089  24676  25014  25218  25321  25203  
 
  --- Directory ---
  - Event Counts -
-GETX [218472 ] 218472
-GETS [404812 ] 404812
-PUT [579033 ] 579033
-Unblock [12 ] 12
-UnblockS [23720 ] 23720
-UnblockM [590471 ] 590471
-Writeback_Clean [8200 ] 8200
-Writeback_Dirty [98 ] 98
-Writeback_Exclusive_Clean [357818 ] 357818
-Writeback_Exclusive_Dirty [212716 ] 212716
+GETX [217953 ] 217953
+GETS [403510 ] 403510
+PUT [580089 ] 580089
+Unblock [219 ] 219
+UnblockS [23715 ] 23715
+UnblockM [588343 ] 588343
+Writeback_Clean [7949 ] 7949
+Writeback_Dirty [379 ] 379
+Writeback_Exclusive_Clean [356904 ] 356904
+Writeback_Exclusive_Dirty [211710 ] 211710
 Pf_Replacement [0 ] 0
 DMA_READ [0 ] 0
 DMA_WRITE [0 ] 0
-Memory_Data [594143 ] 594143
-Memory_Ack [212804 ] 212804
+Memory_Data [592234 ] 592234
+Memory_Ack [212081 ] 212081
 Ack [0 ] 0
 Shared_Ack [0 ] 0
 Shared_Data [0 ] 0
@@ -1031,22 +1031,22 @@ Exclusive_Data [0 ] 0
 All_acks_and_shared_data [0 ] 0
 All_acks_and_owner_data [0 ] 0
 All_acks_and_data_no_sharers [0 ] 0
-All_Unblocks [35 ] 35
+All_Unblocks [408 ] 408
 GETF [0 ] 0
 PUTF [0 ] 0
 
  - Transitions -
-NX  GETX [62 ] 62
-NX  GETS [85 ] 85
-NX  PUT [8309 ] 8309
+NX  GETX [55 ] 55
+NX  GETS [91 ] 91
+NX  PUT [8538 ] 8538
 NX  Pf_Replacement [0 ] 0
 NX  DMA_READ [0 ] 0
 NX  DMA_WRITE [0 ] 0
 NX  GETF [0 ] 0
 
-NO  GETX [6897 ] 6897
-NO  GETS [12969 ] 12969
-NO  PUT [570535 ] 570535
+NO  GETX [6917 ] 6917
+NO  GETS [12358 ] 12358
+NO  PUT [568629 ] 568629
 NO  Pf_Replacement [0 ] 0
 NO  DMA_READ [0 ] 0
 NO  DMA_WRITE [0 ] 0
@@ -1060,16 +1060,16 @@ S  DMA_READ [0 ] 0
 S  DMA_WRITE [0 ] 0
 S  GETF [0 ] 0
 
-O  GETX [8228 ] 8228
-O  GETS [15260 ] 15260
+O  GETX [8251 ] 8251
+O  GETS [15232 ] 15232
 O  PUT [0 ] 0
 O  Pf_Replacement [0 ] 0
 O  DMA_READ [0 ] 0
 O  DMA_WRITE [0 ] 0
 O  GETF [0 ] 0
 
-E  GETX [200078 ] 200078
-E  GETS [370598 ] 370598
+E  GETX [199274 ] 199274
+E  GETS [369499 ] 369499
 E  PUT [0 ] 0
 E  DMA_READ [0 ] 0
 E  DMA_WRITE [0 ] 0
@@ -1108,11 +1108,11 @@ NO_R  Exclusive_Data [0 ] 0
 NO_R  All_acks_and_data_no_sharers [0 ] 0
 NO_R  GETF [0 ] 0
 
-NO_B  GETX [21 ] 21
-NO_B  GETS [35 ] 35
-NO_B  PUT [189 ] 189
-NO_B  UnblockS [8402 ] 8402
-NO_B  UnblockM [590438 ] 590438
+NO_B  GETX [220 ] 220
+NO_B  GETS [408 ] 408
+NO_B  PUT [2898 ] 2898
+NO_B  UnblockS [8053 ] 8053
+NO_B  UnblockM [587738 ] 587738
 NO_B  Pf_Replacement [0 ] 0
 NO_B  DMA_READ [0 ] 0
 NO_B  DMA_WRITE [0 ] 0
@@ -1120,19 +1120,19 @@ NO_B  GETF [0 ] 0
 
 NO_B_X  GETX [0 ] 0
 NO_B_X  GETS [0 ] 0
-NO_B_X  PUT [0 ] 0
-NO_B_X  UnblockS [9 ] 9
-NO_B_X  UnblockM [12 ] 12
+NO_B_X  PUT [2 ] 2
+NO_B_X  UnblockS [5 ] 5
+NO_B_X  UnblockM [215 ] 215
 NO_B_X  Pf_Replacement [0 ] 0
 NO_B_X  DMA_READ [0 ] 0
 NO_B_X  DMA_WRITE [0 ] 0
 NO_B_X  GETF [0 ] 0
 
 NO_B_S  GETX [0 ] 0
-NO_B_S  GETS [1 ] 1
+NO_B_S  GETS [0 ] 0
 NO_B_S  PUT [0 ] 0
-NO_B_S  UnblockS [14 ] 14
-NO_B_S  UnblockM [21 ] 21
+NO_B_S  UnblockS [18 ] 18
+NO_B_S  UnblockM [390 ] 390
 NO_B_S  Pf_Replacement [0 ] 0
 NO_B_S  DMA_READ [0 ] 0
 NO_B_S  DMA_WRITE [0 ] 0
@@ -1140,43 +1140,43 @@ NO_B_S  GETF [0 ] 0
 
 NO_B_S_W  GETX [0 ] 0
 NO_B_S_W  GETS [0 ] 0
-NO_B_S_W  PUT [0 ] 0
-NO_B_S_W  UnblockS [36 ] 36
+NO_B_S_W  PUT [14 ] 14
+NO_B_S_W  UnblockS [408 ] 408
 NO_B_S_W  Pf_Replacement [0 ] 0
 NO_B_S_W  DMA_READ [0 ] 0
 NO_B_S_W  DMA_WRITE [0 ] 0
-NO_B_S_W  All_Unblocks [35 ] 35
+NO_B_S_W  All_Unblocks [408 ] 408
 NO_B_S_W  GETF [0 ] 0
 
-O_B  GETX [0 ] 0
-O_B  GETS [0 ] 0
+O_B  GETX [5 ] 5
+O_B  GETS [11 ] 11
 O_B  PUT [0 ] 0
-O_B  UnblockS [15259 ] 15259
+O_B  UnblockS [15231 ] 15231
 O_B  UnblockM [0 ] 0
 O_B  Pf_Replacement [0 ] 0
 O_B  DMA_READ [0 ] 0
 O_B  DMA_WRITE [0 ] 0
 O_B  GETF [0 ] 0
 
-NO_B_W  GETX [2020 ] 2020
-NO_B_W  GETS [3705 ] 3705
+NO_B_W  GETX [1880 ] 1880
+NO_B_W  GETS [3330 ] 3330
 NO_B_W  PUT [0 ] 0
 NO_B_W  UnblockS [0 ] 0
 NO_B_W  UnblockM [0 ] 0
 NO_B_W  Pf_Replacement [0 ] 0
 NO_B_W  DMA_READ [0 ] 0
 NO_B_W  DMA_WRITE [0 ] 0
-NO_B_W  Memory_Data [578884 ] 578884
+NO_B_W  Memory_Data [577003 ] 577003
 NO_B_W  GETF [0 ] 0
 
-O_B_W  GETX [46 ] 46
-O_B_W  GETS [110 ] 110
+O_B_W  GETX [52 ] 52
+O_B_W  GETS [105 ] 105
 O_B_W  PUT [0 ] 0
 O_B_W  UnblockS [0 ] 0
 O_B_W  Pf_Replacement [0 ] 0
 O_B_W  DMA_READ [0 ] 0
 O_B_W  DMA_WRITE [0 ] 0
-O_B_W  Memory_Data [15259 ] 15259
+O_B_W  Memory_Data [15231 ] 15231
 O_B_W  GETF [0 ] 0
 
 NO_W  GETX [0 ] 0
@@ -1287,14 +1287,14 @@ O_DR_B  All_acks_and_owner_data [0 ] 0
 O_DR_B  All_acks_and_data_no_sharers [0 ] 0
 O_DR_B  GETF [0 ] 0
 
-WB  GETX [78 ] 78
-WB  GETS [149 ] 149
-WB  PUT [0 ] 0
-WB  Unblock [12 ] 12
-WB  Writeback_Clean [8200 ] 8200
-WB  Writeback_Dirty [98 ] 98
-WB  Writeback_Exclusive_Clean [357818 ] 357818
-WB  Writeback_Exclusive_Dirty [212716 ] 212716
+WB  GETX [274 ] 274
+WB  GETS [527 ] 527
+WB  PUT [8 ] 8
+WB  Unblock [219 ] 219
+WB  Writeback_Clean [7949 ] 7949
+WB  Writeback_Dirty [379 ] 379
+WB  Writeback_Exclusive_Clean [356904 ] 356904
+WB  Writeback_Exclusive_Dirty [211710 ] 211710
 WB  Pf_Replacement [0 ] 0
 WB  DMA_READ [0 ] 0
 WB  DMA_WRITE [0 ] 0
@@ -1306,16 +1306,16 @@ WB_O_W  PUT [0 ] 0
 WB_O_W  Pf_Replacement [0 ] 0
 WB_O_W  DMA_READ [0 ] 0
 WB_O_W  DMA_WRITE [0 ] 0
-WB_O_W  Memory_Ack [98 ] 98
+WB_O_W  Memory_Ack [379 ] 379
 WB_O_W  GETF [0 ] 0
 
-WB_E_W  GETX [1042 ] 1042
-WB_E_W  GETS [1898 ] 1898
+WB_E_W  GETX [1025 ] 1025
+WB_E_W  GETS [1947 ] 1947
 WB_E_W  PUT [0 ] 0
 WB_E_W  Pf_Replacement [0 ] 0
 WB_E_W  DMA_READ [0 ] 0
 WB_E_W  DMA_WRITE [0 ] 0
-WB_E_W  Memory_Ack [212706 ] 212706
+WB_E_W  Memory_Ack [211702 ] 211702
 WB_E_W  GETF [0 ] 0
 
 NO_F  GETX [0 ] 0

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simerr b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simerr
index 54ab7e8241a73d5ac06dbe6c9a38378fd1c8fc29..98c3bf402d79e68bd029a28872abca55fbd42765 100755 (executable)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simerr
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simerr
@@ -1,74 +1,74 @@
-system.cpu4: completed 10000 read, 5412 write accesses @1871699
-system.cpu2: completed 10000 read, 5460 write accesses @1893369
-system.cpu1: completed 10000 read, 5378 write accesses @1906861
-system.cpu6: completed 10000 read, 5396 write accesses @1925998
-system.cpu0: completed 10000 read, 5377 write accesses @1932348
-system.cpu5: completed 10000 read, 5525 write accesses @1940098
-system.cpu3: completed 10000 read, 5395 write accesses @1950309
-system.cpu7: completed 10000 read, 5394 write accesses @1966559
-system.cpu1: completed 20000 read, 10544 write accesses @3781959
-system.cpu4: completed 20000 read, 10680 write accesses @3792439
-system.cpu2: completed 20000 read, 10687 write accesses @3801439
-system.cpu3: completed 20000 read, 10623 write accesses @3813939
-system.cpu0: completed 20000 read, 10834 write accesses @3843808
-system.cpu5: completed 20000 read, 10928 write accesses @3845319
-system.cpu6: completed 20000 read, 10782 write accesses @3845558
-system.cpu7: completed 20000 read, 10939 write accesses @3904539
-system.cpu2: completed 30000 read, 15884 write accesses @5673111
-system.cpu4: completed 30000 read, 16055 write accesses @5692488
-system.cpu1: completed 30000 read, 16005 write accesses @5703958
-system.cpu3: completed 30000 read, 16124 write accesses @5726919
-system.cpu5: completed 30000 read, 16307 write accesses @5771630
-system.cpu6: completed 30000 read, 16295 write accesses @5776079
-system.cpu0: completed 30000 read, 16283 write accesses @5776769
-system.cpu7: completed 30000 read, 16366 write accesses @5874559
-system.cpu3: completed 40000 read, 21574 write accesses @7627939
-system.cpu2: completed 40000 read, 21245 write accesses @7628738
-system.cpu1: completed 40000 read, 21306 write accesses @7628758
-system.cpu4: completed 40000 read, 21462 write accesses @7660680
-system.cpu0: completed 40000 read, 21631 write accesses @7675309
-system.cpu5: completed 40000 read, 21626 write accesses @7680509
-system.cpu6: completed 40000 read, 21716 write accesses @7696178
-system.cpu7: completed 40000 read, 21960 write accesses @7863749
-system.cpu0: completed 50000 read, 26830 write accesses @9562969
-system.cpu2: completed 50000 read, 26690 write accesses @9565708
-system.cpu3: completed 50000 read, 26994 write accesses @9575479
-system.cpu4: completed 50000 read, 26869 write accesses @9589449
-system.cpu1: completed 50000 read, 26670 write accesses @9611561
-system.cpu5: completed 50000 read, 27137 write accesses @9617389
-system.cpu6: completed 50000 read, 27275 write accesses @9658029
-system.cpu7: completed 50000 read, 27527 write accesses @9814359
-system.cpu0: completed 60000 read, 32249 write accesses @11423019
-system.cpu3: completed 60000 read, 32267 write accesses @11433399
-system.cpu2: completed 60000 read, 32022 write accesses @11474303
-system.cpu5: completed 60000 read, 32388 write accesses @11521948
-system.cpu4: completed 60000 read, 32356 write accesses @11528079
-system.cpu1: completed 60000 read, 32067 write accesses @11544409
-system.cpu6: completed 60000 read, 32659 write accesses @11548639
-system.cpu7: completed 60000 read, 32942 write accesses @11779569
-system.cpu3: completed 70000 read, 37638 write accesses @13336858
-system.cpu2: completed 70000 read, 37313 write accesses @13368779
-system.cpu0: completed 70000 read, 37676 write accesses @13377210
-system.cpu4: completed 70000 read, 37656 write accesses @13416889
-system.cpu6: completed 70000 read, 38021 write accesses @13465679
-system.cpu5: completed 70000 read, 37732 write accesses @13467391
-system.cpu1: completed 70000 read, 37360 write accesses @13477099
-system.cpu7: completed 70000 read, 38399 write accesses @13717039
-system.cpu3: completed 80000 read, 42978 write accesses @15269199
-system.cpu0: completed 80000 read, 42958 write accesses @15278319
-system.cpu2: completed 80000 read, 42507 write accesses @15310609
-system.cpu4: completed 80000 read, 42937 write accesses @15325761
-system.cpu6: completed 80000 read, 43416 write accesses @15354801
-system.cpu5: completed 80000 read, 43057 write accesses @15376839
-system.cpu1: completed 80000 read, 42520 write accesses @15380279
-system.cpu7: completed 80000 read, 43907 write accesses @15634198
-system.cpu3: completed 90000 read, 48403 write accesses @17192399
-system.cpu0: completed 90000 read, 48519 write accesses @17230959
-system.cpu1: completed 90000 read, 47845 write accesses @17249039
-system.cpu2: completed 90000 read, 47947 write accesses @17255499
-system.cpu6: completed 90000 read, 48741 write accesses @17263669
-system.cpu4: completed 90000 read, 48366 write accesses @17269639
-system.cpu5: completed 90000 read, 48485 write accesses @17297549
-system.cpu7: completed 90000 read, 49327 write accesses @17576399
-system.cpu0: completed 100000 read, 53893 write accesses @19129199
+system.cpu0: completed 10000 read, 5308 write accesses @570767
+system.cpu5: completed 10000 read, 5470 write accesses @573498
+system.cpu1: completed 10000 read, 5429 write accesses @573920
+system.cpu7: completed 10000 read, 5290 write accesses @575321
+system.cpu4: completed 10000 read, 5445 write accesses @585929
+system.cpu3: completed 10000 read, 5486 write accesses @586872
+system.cpu6: completed 10000 read, 5559 write accesses @588791
+system.cpu2: completed 10000 read, 5302 write accesses @590705
+system.cpu1: completed 20000 read, 10655 write accesses @1140898
+system.cpu7: completed 20000 read, 10580 write accesses @1148482
+system.cpu4: completed 20000 read, 10689 write accesses @1149967
+system.cpu0: completed 20000 read, 10632 write accesses @1151560
+system.cpu3: completed 20000 read, 10736 write accesses @1152482
+system.cpu5: completed 20000 read, 10944 write accesses @1160453
+system.cpu6: completed 20000 read, 10906 write accesses @1167829
+system.cpu2: completed 20000 read, 10785 write accesses @1181432
+system.cpu7: completed 30000 read, 15883 write accesses @1719841
+system.cpu1: completed 30000 read, 16166 write accesses @1721891
+system.cpu4: completed 30000 read, 16033 write accesses @1722326
+system.cpu3: completed 30000 read, 16219 write accesses @1736719
+system.cpu0: completed 30000 read, 16143 write accesses @1737446
+system.cpu5: completed 30000 read, 16313 write accesses @1738202
+system.cpu6: completed 30000 read, 16098 write accesses @1755658
+system.cpu2: completed 30000 read, 16394 write accesses @1762469
+system.cpu7: completed 40000 read, 21291 write accesses @2297271
+system.cpu1: completed 40000 read, 21590 write accesses @2298548
+system.cpu4: completed 40000 read, 21488 write accesses @2312342
+system.cpu6: completed 40000 read, 21332 write accesses @2321888
+system.cpu5: completed 40000 read, 21705 write accesses @2326997
+system.cpu3: completed 40000 read, 21707 write accesses @2330357
+system.cpu2: completed 40000 read, 21706 write accesses @2332615
+system.cpu0: completed 40000 read, 21524 write accesses @2334713
+system.cpu7: completed 50000 read, 26831 write accesses @2881244
+system.cpu1: completed 50000 read, 27020 write accesses @2890941
+system.cpu4: completed 50000 read, 27058 write accesses @2898430
+system.cpu3: completed 50000 read, 27008 write accesses @2902889
+system.cpu6: completed 50000 read, 26758 write accesses @2903882
+system.cpu5: completed 50000 read, 27004 write accesses @2909259
+system.cpu0: completed 50000 read, 27056 write accesses @2926100
+system.cpu2: completed 50000 read, 27098 write accesses @2926472
+system.cpu7: completed 60000 read, 32186 write accesses @3453644
+system.cpu4: completed 60000 read, 32482 write accesses @3465349
+system.cpu1: completed 60000 read, 32394 write accesses @3472313
+system.cpu5: completed 60000 read, 32325 write accesses @3483119
+system.cpu3: completed 60000 read, 32421 write accesses @3485537
+system.cpu6: completed 60000 read, 32185 write accesses @3493077
+system.cpu0: completed 60000 read, 32338 write accesses @3495286
+system.cpu2: completed 60000 read, 32370 write accesses @3496153
+system.cpu7: completed 70000 read, 37611 write accesses @4033523
+system.cpu4: completed 70000 read, 37774 write accesses @4042787
+system.cpu1: completed 70000 read, 37690 write accesses @4052999
+system.cpu3: completed 70000 read, 37732 write accesses @4060208
+system.cpu5: completed 70000 read, 37748 write accesses @4060547
+system.cpu2: completed 70000 read, 37645 write accesses @4064696
+system.cpu0: completed 70000 read, 37774 write accesses @4071656
+system.cpu6: completed 70000 read, 37516 write accesses @4081376
+system.cpu7: completed 80000 read, 43002 write accesses @4618082
+system.cpu4: completed 80000 read, 42974 write accesses @4622306
+system.cpu2: completed 80000 read, 43016 write accesses @4629591
+system.cpu3: completed 80000 read, 43060 write accesses @4631933
+system.cpu0: completed 80000 read, 42919 write accesses @4636700
+system.cpu5: completed 80000 read, 43162 write accesses @4639808
+system.cpu1: completed 80000 read, 42988 write accesses @4647998
+system.cpu6: completed 80000 read, 42866 write accesses @4656086
+system.cpu7: completed 90000 read, 48437 write accesses @5173289
+system.cpu4: completed 90000 read, 48464 write accesses @5207890
+system.cpu3: completed 90000 read, 48532 write accesses @5210569
+system.cpu2: completed 90000 read, 48392 write accesses @5213621
+system.cpu5: completed 90000 read, 48493 write accesses @5223220
+system.cpu0: completed 90000 read, 48496 write accesses @5233894
+system.cpu6: completed 90000 read, 48247 write accesses @5234744
+system.cpu1: completed 90000 read, 48380 write accesses @5239171
+system.cpu7: completed 100000 read, 53766 write accesses @5747338
 hack: be nice to actually delete the event here

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simout b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simout
index f73f144116647aa7b5822562f47d60e842d4e133..be73918379b7e74131882c4f5f6338312b7d1c3a 100755 (executable)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simout
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simout
@@ -1,10 +1,12 @@
+Redirecting stdout to build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer/simout
+Redirecting stderr to build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 28 2012 11:27:37
-gem5 started Jul 28 2012 11:35:39
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 13:53:26
+gem5 started Sep  1 2012 13:54:47
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer -re tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 19129199 because maximum number of loads reached
+Exiting @ tick 5747338 because maximum number of loads reached

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt
index 18deaff5aab1d4c5cef4f3d71b18bfa93a33023c..61721f45b298d64a8ece681b92c9defe5ec7ef87 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt
@@ -1,12 +1,12 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.019129                       # Number of seconds simulated
-sim_ticks                                    19129199                       # Number of ticks simulated
-final_tick                                   19129199                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.005747                       # Number of seconds simulated
+sim_ticks                                     5747338                       # Number of ticks simulated
+final_tick                                    5747338                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_tick_rate                                 190724                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 378788                       # Number of bytes of host memory used
-host_seconds                                   100.30                       # Real time elapsed on the host
+host_tick_rate                                  47566                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 409708                       # Number of bytes of host memory used
+host_seconds                                   120.83                       # Real time elapsed on the host
 system.l1_cntrl4.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl4.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl4.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads
@@ -157,29 +157,29 @@ system.dir_cntrl0.probeFilter.num_tag_array_reads            0
 system.dir_cntrl0.probeFilter.num_tag_array_writes            0                       # number of tag array writes
 system.dir_cntrl0.probeFilter.num_tag_array_stalls            0                       # number of stalls caused by tag array
 system.dir_cntrl0.probeFilter.num_data_array_stalls            0                       # number of stalls caused by data array
-system.cpu0.num_reads                          100000                       # number of read accesses completed
-system.cpu0.num_writes                          53893                       # number of write accesses completed
+system.cpu0.num_reads                           98701                       # number of read accesses completed
+system.cpu0.num_writes                          53180                       # number of write accesses completed
 system.cpu0.num_copies                              0                       # number of copy accesses completed
-system.cpu1.num_reads                           99845                       # number of read accesses completed
-system.cpu1.num_writes                          52936                       # number of write accesses completed
+system.cpu1.num_reads                           98822                       # number of read accesses completed
+system.cpu1.num_writes                          52970                       # number of write accesses completed
 system.cpu1.num_copies                              0                       # number of copy accesses completed
-system.cpu2.num_reads                           99959                       # number of read accesses completed
-system.cpu2.num_writes                          53318                       # number of write accesses completed
+system.cpu2.num_reads                           99173                       # number of read accesses completed
+system.cpu2.num_writes                          53394                       # number of write accesses completed
 system.cpu2.num_copies                              0                       # number of copy accesses completed
-system.cpu3.num_reads                           99709                       # number of read accesses completed
-system.cpu3.num_writes                          53594                       # number of write accesses completed
+system.cpu3.num_reads                           99438                       # number of read accesses completed
+system.cpu3.num_writes                          53653                       # number of write accesses completed
 system.cpu3.num_copies                              0                       # number of copy accesses completed
-system.cpu4.num_reads                           99622                       # number of read accesses completed
-system.cpu4.num_writes                          53609                       # number of write accesses completed
+system.cpu4.num_reads                           99047                       # number of read accesses completed
+system.cpu4.num_writes                          53311                       # number of write accesses completed
 system.cpu4.num_copies                              0                       # number of copy accesses completed
-system.cpu5.num_reads                           99608                       # number of read accesses completed
-system.cpu5.num_writes                          53591                       # number of write accesses completed
+system.cpu5.num_reads                           99288                       # number of read accesses completed
+system.cpu5.num_writes                          53451                       # number of write accesses completed
 system.cpu5.num_copies                              0                       # number of copy accesses completed
-system.cpu6.num_reads                           99715                       # number of read accesses completed
-system.cpu6.num_writes                          54030                       # number of write accesses completed
+system.cpu6.num_reads                           98768                       # number of read accesses completed
+system.cpu6.num_writes                          53052                       # number of write accesses completed
 system.cpu6.num_copies                              0                       # number of copy accesses completed
-system.cpu7.num_reads                           97913                       # number of read accesses completed
-system.cpu7.num_writes                          53717                       # number of write accesses completed
+system.cpu7.num_reads                          100000                       # number of read accesses completed
+system.cpu7.num_writes                          53766                       # number of write accesses completed
 system.cpu7.num_copies                              0                       # number of copy accesses completed
 
 ---------- End Simulation Statistics   ----------

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/config.ini b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/config.ini
index 2ff985fc220c0b9daacd699184bd26329aca7ebc..9db3e21d13a170339b12e510b4024de9751b5667 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/config.ini
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/config.ini
@@ -8,8 +8,9 @@ time_sync_spin_threshold=100000
 
 [system]
 type=System
-children=cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 dir_cntrl0 funcmem l1_cntrl0 l1_cntrl1 l1_cntrl2 l1_cntrl3 l1_cntrl4 l1_cntrl5 l1_cntrl6 l1_cntrl7 physmem ruby sys_port_proxy
+children=cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 dir_cntrl0 funcbus funcmem l1_cntrl0 l1_cntrl1 l1_cntrl2 l1_cntrl3 l1_cntrl4 l1_cntrl5 l1_cntrl6 l1_cntrl7 physmem ruby sys_port_proxy
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -30,6 +31,7 @@ system_port=system.sys_port_proxy.slave[0]
 [system.cpu0]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -42,12 +44,13 @@ progress_interval=10000
 suppress_func_warnings=true
 sys=system
 trace_addr=0
-functional=system.funcmem.port[0]
+functional=system.funcbus.slave[0]
 test=system.l1_cntrl0.sequencer.slave[0]
 
 [system.cpu1]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -60,12 +63,13 @@ progress_interval=10000
 suppress_func_warnings=true
 sys=system
 trace_addr=0
-functional=system.funcmem.port[1]
+functional=system.funcbus.slave[1]
 test=system.l1_cntrl1.sequencer.slave[0]
 
 [system.cpu2]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -78,12 +82,13 @@ progress_interval=10000
 suppress_func_warnings=true
 sys=system
 trace_addr=0
-functional=system.funcmem.port[2]
+functional=system.funcbus.slave[2]
 test=system.l1_cntrl2.sequencer.slave[0]
 
 [system.cpu3]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -96,12 +101,13 @@ progress_interval=10000
 suppress_func_warnings=true
 sys=system
 trace_addr=0
-functional=system.funcmem.port[3]
+functional=system.funcbus.slave[3]
 test=system.l1_cntrl3.sequencer.slave[0]
 
 [system.cpu4]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -114,12 +120,13 @@ progress_interval=10000
 suppress_func_warnings=true
 sys=system
 trace_addr=0
-functional=system.funcmem.port[4]
+functional=system.funcbus.slave[4]
 test=system.l1_cntrl4.sequencer.slave[0]
 
 [system.cpu5]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -132,12 +139,13 @@ progress_interval=10000
 suppress_func_warnings=true
 sys=system
 trace_addr=0
-functional=system.funcmem.port[5]
+functional=system.funcbus.slave[5]
 test=system.l1_cntrl5.sequencer.slave[0]
 
 [system.cpu6]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -150,12 +158,13 @@ progress_interval=10000
 suppress_func_warnings=true
 sys=system
 trace_addr=0
-functional=system.funcmem.port[6]
+functional=system.funcbus.slave[6]
 test=system.l1_cntrl6.sequencer.slave[0]
 
 [system.cpu7]
 type=MemTest
 atomic=false
+clock=1
 issue_dmas=false
 max_loads=100000
 memory_size=65536
@@ -168,7 +177,7 @@ progress_interval=10000
 suppress_func_warnings=true
 sys=system
 trace_addr=0
-functional=system.funcmem.port[7]
+functional=system.funcbus.slave[7]
 test=system.l1_cntrl7.sequencer.slave[0]
 
 [system.dir_cntrl0]
@@ -200,9 +209,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -211,11 +220,23 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
+[system.funcbus]
+type=NoncoherentBus
+block_size=64
+clock=1
+header_cycles=1
+use_default_range=false
+width=8
+master=system.funcmem.port
+slave=system.cpu0.functional system.cpu1.functional system.cpu2.functional system.cpu3.functional system.cpu4.functional system.cpu5.functional system.cpu6.functional system.cpu7.functional
+
 [system.funcmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=false
@@ -224,7 +245,7 @@ latency_var=0
 null=false
 range=0:134217727
 zero=false
-port=system.cpu0.functional system.cpu1.functional system.cpu2.functional system.cpu3.functional system.cpu4.functional system.cpu5.functional system.cpu6.functional system.cpu7.functional
+port=system.funcbus.master[0]
 
 [system.l1_cntrl0]
 type=L1Cache_Controller
@@ -259,6 +280,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl0.cacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl0.cacheMemory
@@ -305,6 +327,7 @@ tagArrayBanks=1
 [system.l1_cntrl1.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl1.cacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl1.cacheMemory
@@ -351,6 +374,7 @@ tagArrayBanks=1
 [system.l1_cntrl2.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl2.cacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl2.cacheMemory
@@ -397,6 +421,7 @@ tagArrayBanks=1
 [system.l1_cntrl3.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl3.cacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl3.cacheMemory
@@ -443,6 +468,7 @@ tagArrayBanks=1
 [system.l1_cntrl4.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl4.cacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl4.cacheMemory
@@ -489,6 +515,7 @@ tagArrayBanks=1
 [system.l1_cntrl5.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl5.cacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl5.cacheMemory
@@ -535,6 +562,7 @@ tagArrayBanks=1
 [system.l1_cntrl6.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl6.cacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl6.cacheMemory
@@ -581,6 +609,7 @@ tagArrayBanks=1
 [system.l1_cntrl7.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl7.cacheMemory
 deadlock_threshold=1000000
 icache=system.l1_cntrl7.cacheMemory
@@ -596,6 +625,7 @@ slave=system.cpu7.test
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -858,6 +888,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats
index fbda0817fa552a985a8ba04a6b5129064a432308..fbb000400962169165f1ab8728a5044586425284 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats
@@ -1,26 +1,26 @@
-Real time: Jul/10/2012 17:28:36
+Real time: Sep/01/2012 13:48:23
 
 Profiler Stats
 --------------
-Elapsed_time_in_seconds: 61
-Elapsed_time_in_minutes: 1.01667
-Elapsed_time_in_hours: 0.0169444
-Elapsed_time_in_days: 0.000706019
+Elapsed_time_in_seconds: 43
+Elapsed_time_in_minutes: 0.716667
+Elapsed_time_in_hours: 0.0119444
+Elapsed_time_in_days: 0.000497685
 
-Virtual_time_in_seconds: 60.59
-Virtual_time_in_minutes: 1.00983
-Virtual_time_in_hours:   0.0168306
-Virtual_time_in_days:    0.000701273
+Virtual_time_in_seconds: 43.31
+Virtual_time_in_minutes: 0.721833
+Virtual_time_in_hours:   0.0120306
+Virtual_time_in_days:    0.000501273
 
-Ruby_current_time: 28725020
+Ruby_current_time: 8642753
 Ruby_start_time: 0
-Ruby_cycles: 28725020
+Ruby_cycles: 8642753
 
-mbytes_resident: 59.0156
-mbytes_total: 370.527
-resident_ratio: 0.159285
+mbytes_resident: 60.6562
+mbytes_total: 399.672
+resident_ratio: 0.151804
 
-ruby_cycles_executed: [ 28725021 28725021 28725021 28725021 28725021 28725021 28725021 28725021 ]
+ruby_cycles_executed: [ 8642754 8642754 8642754 8642754 8642754 8642754 8642754 8642754 ]
 
 Busy Controller Counts:
 L1Cache-0:0  L1Cache-1:0  L1Cache-2:0  L1Cache-3:0  L1Cache-4:0  L1Cache-5:0  L1Cache-6:0  L1Cache-7:0  
@@ -30,29 +30,29 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 16 count: 615998 average: 15.9984 | standard deviation: 0.126895 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 615878 ]
+sequencer_requests_outstanding: [binsize: 1 max: 16 count: 616251 average: 15.9984 | standard deviation: 0.126869 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 616131 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 128 max: 17550 count: 615870 average: 5969.46 | standard deviation: 7116.59 | 0 4 6 6 5 4 5 1 5 4 3 6 4 5 21 31 46 90 169 235 418 648 1027 1394 1760 2694 3780 4717 5558 6535 8753 9589 11125 13750 13954 15292 17133 20395 19978 18654 22068 23938 22152 22290 22426 24096 21689 21471 22547 19077 18860 18264 18773 15923 13248 14135 13631 11388 10257 9512 9377 7381 6802 6677 5240 4722 4293 4074 3235 2564 2639 2296 1833 1614 1375 1233 1052 854 776 591 544 492 453 330 284 288 215 200 140 122 116 82 91 55 52 34 38 32 20 19 15 17 10 8 11 3 5 4 3 1 0 0 1 2 2 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 128 max: 17550 count: 400035 average: 5968.22 | standard deviation: 1417.97 | 0 4 3 5 3 2 4 1 2 2 1 2 2 4 14 21 27 59 108 148 275 433 688 907 1155 1771 2429 3013 3676 4199 5764 6270 7293 8986 9054 9918 11064 13179 12948 12115 14336 15590 14383 14461 14549 15708 14037 13915 14593 12436 12325 11870 12195 10304 8534 9247 8896 7405 6689 6174 6004 4768 4401 4309 3422 3106 2791 2621 2096 1647 1749 1478 1176 1060 878 801 692 570 497 397 361 314 289 233 190 190 131 126 85 78 64 59 58 30 29 16 25 20 14 11 10 13 6 4 6 2 3 1 1 0 0 0 1 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 128 max: 16420 count: 215835 average: 5971.76 | standard deviation: 1418.95 | 0 0 3 1 2 2 1 0 3 2 2 4 2 1 7 10 19 31 61 87 143 215 339 487 605 923 1351 1704 1882 2336 2989 3319 3832 4764 4900 5374 6069 7216 7030 6539 7732 8348 7769 7829 7877 8388 7652 7556 7954 6641 6535 6394 6578 5619 4714 4888 4735 3983 3568 3338 3373 2613 2401 2368 1818 1616 1502 1453 1139 917 890 818 657 554 497 432 360 284 279 194 183 178 164 97 94 98 84 74 55 44 52 23 33 25 23 18 13 12 6 8 5 4 4 4 5 1 2 3 2 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_Directory: [binsize: 128 max: 17550 count: 607509 average: 5975.88 | standard deviation: 7210.5 | 0 4 6 6 5 4 5 1 5 4 2 6 4 5 17 27 42 88 158 222 402 618 977 1328 1698 2630 3655 4589 5430 6369 8536 9419 10886 13519 13647 15042 16854 20026 19684 18343 21765 23626 21819 22017 22137 23782 21417 21230 22311 18836 18644 18063 18598 15763 13119 14010 13517 11272 10178 9410 9289 7324 6756 6627 5186 4688 4257 4046 3210 2538 2620 2281 1809 1600 1365 1221 1045 850 772 587 539 484 451 326 282 287 213 200 140 121 112 80 90 55 52 34 38 32 20 19 15 17 10 8 11 3 5 4 3 1 0 0 1 2 2 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_L1Cache_wCC: [binsize: 64 max: 11892 count: 8361 average: 5503.07 | standard deviation: 1405.32 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 2 2 2 1 3 0 2 5 6 7 6 10 6 16 14 19 31 39 27 26 36 23 41 67 58 59 69 63 65 72 94 106 111 94 76 113 126 110 121 152 155 134 116 137 142 173 196 157 137 171 140 153 150 150 162 167 166 135 138 142 147 168 146 131 141 113 128 99 137 136 105 110 106 88 113 83 92 85 75 72 57 65 60 51 63 66 50 39 40 51 51 44 44 31 26 20 26 28 22 29 25 18 16 22 14 12 16 13 12 15 11 12 7 7 8 15 9 5 9 4 6 7 5 4 3 3 1 2 2 3 1 3 2 4 4 1 1 2 2 2 0 1 0 0 2 0 0 0 0 1 0 3 1 1 1 0 1 ]
+miss_latency: [binsize: 32 max: 4776 count: 616123 average: 1795.35 | standard deviation: 414.477 | 0 1 4 5 4 6 2 4 5 3 2 2 1 4 3 0 4 16 19 24 35 84 107 158 246 394 516 799 1053 1257 1834 2502 2826 3510 4476 5278 6753 7207 7603 9693 11698 11058 12663 14078 14754 17257 16918 15782 18905 20633 18435 19307 19900 19344 21176 19234 17152 19082 20051 16188 16264 15715 14908 15416 13291 11277 12219 11916 9452 9307 8556 7808 7864 6457 5309 5581 5515 4250 3842 3580 3265 3103 2466 1908 2073 1994 1517 1313 1242 1090 1028 790 677 670 662 435 413 368 358 318 235 216 208 174 141 115 105 85 103 63 53 50 50 35 26 25 21 27 14 16 14 4 12 10 6 9 5 5 1 3 2 1 3 1 2 2 2 0 0 0 0 4 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD: [binsize: 32 max: 4737 count: 400262 average: 1795.26 | standard deviation: 414.645 | 0 1 4 2 4 4 1 2 3 2 2 0 0 3 2 0 3 10 13 11 23 53 66 110 159 266 334 537 699 799 1186 1637 1820 2298 2878 3407 4350 4680 4906 6373 7625 7226 8201 9120 9644 11229 10853 10342 12294 13400 12030 12512 12946 12569 13875 12476 11156 12382 13030 10587 10544 10172 9663 9945 8585 7315 7818 7765 6162 6022 5538 5088 5151 4134 3417 3701 3583 2767 2452 2314 2095 1997 1601 1255 1387 1294 988 884 833 737 684 490 452 419 436 288 285 220 225 214 149 143 140 122 94 73 73 51 66 34 32 32 31 24 15 10 10 18 7 11 9 3 5 7 6 7 4 2 0 3 0 1 3 1 2 1 2 0 0 0 0 4 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST: [binsize: 32 max: 4776 count: 215861 average: 1795.51 | standard deviation: 414.166 | 0 0 0 3 0 2 1 2 2 1 0 2 1 1 1 0 1 6 6 13 12 31 41 48 87 128 182 262 354 458 648 865 1006 1212 1598 1871 2403 2527 2697 3320 4073 3832 4462 4958 5110 6028 6065 5440 6611 7233 6405 6795 6954 6775 7301 6758 5996 6700 7021 5601 5720 5543 5245 5471 4706 3962 4401 4151 3290 3285 3018 2720 2713 2323 1892 1880 1932 1483 1390 1266 1170 1106 865 653 686 700 529 429 409 353 344 300 225 251 226 147 128 148 133 104 86 73 68 52 47 42 32 34 37 29 21 18 19 11 11 15 11 9 7 5 5 1 7 3 0 2 1 3 1 0 2 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_Directory: [binsize: 32 max: 4776 count: 607868 average: 1796.88 | standard deviation: 414.375 | 0 1 4 5 4 6 2 4 5 3 2 2 1 4 3 0 4 16 19 23 33 79 102 150 235 382 500 770 1020 1209 1785 2449 2745 3429 4369 5167 6620 7042 7423 9530 11521 10828 12435 13885 14505 16983 16670 15485 18664 20359 18181 19011 19634 19059 20930 19001 16911 18870 19850 15969 16076 15575 14760 15247 13149 11146 12125 11810 9354 9206 8478 7728 7786 6400 5234 5534 5471 4213 3806 3559 3230 3075 2450 1891 2058 1978 1499 1308 1237 1081 1020 780 667 662 659 434 408 362 357 314 235 214 208 174 140 113 104 84 103 63 53 50 50 35 26 25 21 26 14 16 14 4 12 10 6 9 5 5 1 3 2 1 3 1 2 2 2 0 0 0 0 4 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_L1Cache_wCC: [binsize: 32 max: 3752 count: 8255 average: 1682.74 | standard deviation: 406.431 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 5 5 8 11 12 16 29 33 48 49 53 81 81 107 111 133 165 180 163 177 230 228 193 249 274 248 297 241 274 254 296 266 285 246 233 241 212 201 219 188 140 148 169 142 131 94 106 98 101 78 80 78 57 75 47 44 37 36 21 35 28 16 17 15 16 18 5 5 9 8 10 10 8 3 1 5 6 1 4 0 2 0 0 1 2 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
-imcomplete_wCC_Times: 8361
+imcomplete_wCC_Times: 8255
 miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 7 average:     0 | standard deviation: 0 | 7 ]
 miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 7 average:     0 | standard deviation: 0 | 7 ]
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 7 average:     0 | standard deviation: 0 | 7 ]
-miss_latency_dir_first_response_to_completion: [binsize: 4 max: 539 count: 7 average: 334.714 | standard deviation: 168.608 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-imcomplete_dir_Times: 607502
-miss_latency_LD_Directory: [binsize: 128 max: 17550 count: 394629 average: 5974.59 | standard deviation: 1417.29 | 0 4 3 5 3 2 4 1 2 2 0 2 2 4 12 19 26 58 101 141 268 411 656 862 1113 1732 2355 2930 3601 4101 5626 6152 7140 8833 8863 9755 10888 12929 12755 11909 14133 15388 14160 14288 14352 15497 13858 13765 14436 12280 12181 11739 12073 10206 8456 9180 8819 7329 6645 6110 5948 4735 4371 4278 3389 3086 2766 2599 2081 1630 1735 1469 1159 1055 871 794 686 566 493 394 358 310 288 231 189 189 130 126 85 78 62 58 57 30 29 16 25 20 14 11 10 13 6 4 6 2 3 1 1 0 0 0 1 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD_L1Cache_wCC: [binsize: 64 max: 11892 count: 5406 average: 5502.87 | standard deviation: 1389.98 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 1 1 0 1 0 1 3 4 6 1 3 4 11 11 12 20 23 22 18 24 18 21 41 33 36 47 39 36 42 56 71 67 63 55 69 84 71 82 98 93 85 78 90 86 118 132 103 90 116 90 106 97 93 109 110 113 88 85 95 102 115 96 79 100 69 81 57 100 89 67 62 82 57 74 55 67 55 43 46 32 35 32 35 42 42 34 22 22 37 27 26 30 18 15 12 18 20 11 14 19 9 11 15 10 10 12 10 5 9 8 10 4 5 4 10 7 2 3 2 5 4 3 4 2 3 1 2 2 2 1 2 1 0 4 0 1 1 1 1 0 1 0 0 1 0 0 0 0 0 0 1 1 0 1 0 1 ]
-miss_latency_ST_Directory: [binsize: 128 max: 16420 count: 212880 average: 5978.26 | standard deviation: 1417.67 | 0 0 3 1 2 2 1 0 3 2 2 4 2 1 5 8 16 30 57 81 134 207 321 466 585 898 1300 1659 1829 2268 2910 3267 3746 4686 4784 5287 5966 7097 6929 6434 7632 8238 7659 7729 7785 8285 7559 7465 7875 6556 6463 6324 6525 5557 4663 4830 4698 3943 3533 3300 3341 2589 2385 2349 1797 1602 1491 1447 1129 908 885 812 650 545 494 427 359 284 279 193 181 174 163 95 93 98 83 74 55 43 50 22 33 25 23 18 13 12 6 8 5 4 4 4 5 1 2 3 2 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_L1Cache_wCC: [binsize: 64 max: 11673 count: 2955 average: 5503.42 | standard deviation: 1433.2 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 2 0 1 2 2 1 5 7 2 5 3 7 11 16 5 8 12 5 20 26 25 23 22 24 29 30 38 35 44 31 21 44 42 39 39 54 62 49 38 47 56 55 64 54 47 55 50 47 53 57 53 57 53 47 53 47 45 53 50 52 41 44 47 42 37 47 38 48 24 31 39 28 25 30 32 26 25 30 28 16 21 24 16 17 18 14 24 18 14 13 11 8 8 8 11 15 6 9 5 7 4 2 4 3 7 6 3 2 3 2 4 5 2 3 6 2 1 3 2 0 1 0 0 0 0 1 0 1 1 4 0 1 0 1 1 1 0 0 0 0 1 0 0 0 0 1 0 2 0 1 ]
+miss_latency_dir_first_response_to_completion: [binsize: 1 max: 175 count: 7 average: 113.714 | standard deviation: 50.5833 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ]
+imcomplete_dir_Times: 607861
+miss_latency_LD_Directory: [binsize: 32 max: 4737 count: 394885 average: 1796.82 | standard deviation: 414.485 | 0 1 4 2 4 4 1 2 3 2 2 0 0 3 2 0 3 10 13 11 21 49 64 105 152 257 322 518 679 769 1153 1596 1772 2247 2811 3334 4264 4563 4792 6261 7499 7072 8051 8990 9488 11054 10677 10152 12134 13228 11861 12318 12772 12386 13725 12331 11008 12241 12895 10439 10424 10080 9578 9838 8498 7238 7755 7697 6105 5957 5481 5033 5099 4100 3368 3668 3554 2742 2429 2302 2071 1979 1590 1241 1375 1283 979 882 829 732 677 483 443 413 433 287 283 216 225 211 149 141 140 122 93 72 72 50 66 34 32 32 31 24 15 10 10 17 7 11 9 3 5 7 6 7 4 2 0 3 0 1 3 1 2 1 2 0 0 0 0 4 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_L1Cache_wCC: [binsize: 32 max: 3752 count: 5377 average: 1681.26 | standard deviation: 410.533 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 4 2 5 7 9 12 19 20 30 33 41 48 51 67 73 86 117 114 112 126 154 150 130 156 175 176 190 160 172 169 194 174 183 150 145 148 141 135 148 120 92 85 107 87 77 63 68 57 65 57 55 52 34 49 33 29 25 23 12 24 18 11 14 12 11 9 2 4 5 7 7 9 6 3 1 2 4 0 3 0 2 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST_Directory: [binsize: 32 max: 4776 count: 212983 average:  1797 | standard deviation: 414.172 | 0 0 0 3 0 2 1 2 2 1 0 2 1 1 1 0 1 6 6 12 12 30 38 45 83 125 178 252 341 440 632 853 973 1182 1558 1833 2356 2479 2631 3269 4022 3756 4384 4895 5017 5929 5993 5333 6530 7131 6320 6693 6862 6673 7205 6670 5903 6629 6955 5530 5652 5495 5182 5409 4651 3908 4370 4113 3249 3249 2997 2695 2687 2300 1866 1866 1917 1471 1377 1257 1159 1096 860 650 683 695 520 426 408 349 343 297 224 249 226 147 125 146 132 103 86 73 68 52 47 41 32 34 37 29 21 18 19 11 11 15 11 9 7 5 5 1 7 3 0 2 1 3 1 0 2 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST_L1Cache_wCC: [binsize: 32 max: 3360 count: 2878 average: 1685.51 | standard deviation: 398.712 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 3 3 4 3 4 10 13 18 16 12 33 30 40 38 47 48 66 51 51 76 78 63 93 99 72 107 81 102 85 102 92 102 96 88 93 71 66 71 68 48 63 62 55 54 31 38 41 36 21 25 26 23 26 14 15 12 13 9 11 10 5 3 3 5 9 3 1 4 1 3 1 2 0 0 3 2 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -66,11 +66,11 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN
 
 Message Delayed Cycles
 ----------------------
-Total_delay_cycles: [binsize: 1 max: 22 count: 1233888 average: 0.00745367 | standard deviation: 0.17583 | 1231378 88 178 447 1777 0 0 1 0 0 0 0 1 11 0 0 0 0 3 0 0 0 4 ]
-Total_nonPF_delay_cycles: [binsize: 1 max: 22 count: 1233888 average: 0.00745367 | standard deviation: 0.17583 | 1231378 88 178 447 1777 0 0 1 0 0 0 0 1 11 0 0 0 0 3 0 0 0 4 ]
+Total_delay_cycles: [binsize: 1 max: 21 count: 1234820 average: 0.00719619 | standard deviation: 0.155601 | 1231314 951 818 846 872 1 0 0 0 0 1 1 1 4 3 2 1 0 2 2 0 1 ]
+Total_nonPF_delay_cycles: [binsize: 1 max: 21 count: 1234820 average: 0.00719619 | standard deviation: 0.155601 | 1231314 951 818 846 872 1 0 0 0 0 1 1 1 4 3 2 1 0 2 2 0 1 ]
   virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
-  virtual_network_1_delay_cycles: [binsize: 1 max: 3 count: 615870 average: 0.000342605 | standard deviation: 0.0243446 | 615732 69 65 4 ]
-  virtual_network_2_delay_cycles: [binsize: 1 max: 22 count: 618018 average: 0.01454 | standard deviation: 0.24705 | 615646 19 113 443 1777 0 0 1 0 0 0 0 1 11 0 0 0 0 3 0 0 0 4 ]
+  virtual_network_1_delay_cycles: [binsize: 1 max: 4 count: 616123 average: 0.000835872 | standard deviation: 0.0469998 | 615902 40 84 81 16 ]
+  virtual_network_2_delay_cycles: [binsize: 1 max: 21 count: 618697 average: 0.01353 | standard deviation: 0.214574 | 615412 911 734 765 856 1 0 0 0 0 1 1 1 4 3 2 1 0 2 2 0 1 ]
   virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -82,337 +82,337 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 22 count: 1233888 average: 0.00745367
 Resource Usage
 --------------
 page_size: 4096
-user_time: 60
+user_time: 43
 system_time: 0
-page_reclaims: 16275
+page_reclaims: 11522
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 184
 
 Network Stats
 -------------
 
-total_msg_count_Control: 1847643 14781144
-total_msg_count_Data: 1829024 131689728
-total_msg_count_Response_Data: 1847610 133027920
-total_msg_count_Writeback_Control: 1854054 14832432
-total_msgs: 7378331 total_bytes: 294331224
+total_msg_count_Control: 1848417 14787336
+total_msg_count_Data: 1831398 131860656
+total_msg_count_Response_Data: 1848370 133082640
+total_msg_count_Writeback_Control: 1856091 14848728
+total_msgs: 7384276 total_bytes: 294579360
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 1.34528
-  links_utilized_percent_switch_0_link_0: 1.34317 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 1.34738 bw: 16000 base_latency: 1
+links_utilized_percent_switch_0: 4.48511
+  links_utilized_percent_switch_0_link_0: 4.47733 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 4.49289 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_0_link_0_Response_Data: 77136 5553792 [ 0 0 0 0 77136 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Writeback_Control: 77433 619464 [ 0 0 0 77433 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Control: 77138 617104 [ 0 0 77138 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Data: 76420 5502240 [ 0 0 76420 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Response_Data: 1017 73224 [ 0 0 0 0 1017 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Data: 77360 5569920 [ 0 0 0 0 77360 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Writeback_Control: 77689 621512 [ 0 0 0 77689 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Control: 77364 618912 [ 0 0 77364 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Data: 76700 5522400 [ 0 0 76700 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Response_Data: 995 71640 [ 0 0 0 0 995 0 0 0 0 0 ] base_latency: 1
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 1.34599
-  links_utilized_percent_switch_1_link_0: 1.34421 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 1.34776 bw: 16000 base_latency: 1
+links_utilized_percent_switch_1: 4.47412
+  links_utilized_percent_switch_1_link_0: 4.46635 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 4.48189 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_1_link_0_Response_Data: 77200 5558400 [ 0 0 0 0 77200 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Writeback_Control: 77452 619616 [ 0 0 0 77452 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Control: 77201 617608 [ 0 0 77201 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Data: 76436 5503392 [ 0 0 76436 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Response_Data: 1018 73296 [ 0 0 0 0 1018 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Response_Data: 77170 5556240 [ 0 0 0 0 77170 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Writeback_Control: 77501 620008 [ 0 0 0 77501 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Control: 77173 617384 [ 0 0 77173 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Data: 76458 5504976 [ 0 0 76458 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Response_Data: 1047 75384 [ 0 0 0 0 1047 0 0 0 0 0 ] base_latency: 1
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 1.34111
-  links_utilized_percent_switch_2_link_0: 1.33905 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 1.34318 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 4.45232
+  links_utilized_percent_switch_2_link_0: 4.44489 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 4.45975 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_2_link_0_Response_Data: 76899 5536728 [ 0 0 0 0 76899 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Writeback_Control: 77195 617560 [ 0 0 0 77195 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Control: 76900 615200 [ 0 0 76900 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Data: 76098 5479056 [ 0 0 76098 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Response_Data: 1097 78984 [ 0 0 0 0 1097 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Response_Data: 76800 5529600 [ 0 0 0 0 76800 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Writeback_Control: 77121 616968 [ 0 0 0 77121 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Control: 76801 614408 [ 0 0 76801 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Data: 76122 5480784 [ 0 0 76122 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Response_Data: 999 71928 [ 0 0 0 0 999 0 0 0 0 0 ] base_latency: 1
 
 switch_3_inlinks: 2
 switch_3_outlinks: 2
-links_utilized_percent_switch_3: 1.34039
-  links_utilized_percent_switch_3_link_0: 1.33852 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_1: 1.34225 bw: 16000 base_latency: 1
+links_utilized_percent_switch_3: 4.4511
+  links_utilized_percent_switch_3_link_0: 4.44343 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_1: 4.45876 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_3_link_0_Response_Data: 76872 5534784 [ 0 0 0 0 76872 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Writeback_Control: 77134 617072 [ 0 0 0 77134 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Control: 76875 615000 [ 0 0 76875 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Data: 76106 5479632 [ 0 0 76106 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Response_Data: 1033 74376 [ 0 0 0 0 1033 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Response_Data: 76774 5527728 [ 0 0 0 0 76774 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Writeback_Control: 77103 616824 [ 0 0 0 77103 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Control: 76775 614200 [ 0 0 76775 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Data: 76039 5474808 [ 0 0 76039 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Response_Data: 1066 76752 [ 0 0 0 0 1066 0 0 0 0 0 ] base_latency: 1
 
 switch_4_inlinks: 2
 switch_4_outlinks: 2
-links_utilized_percent_switch_4: 1.34098
-  links_utilized_percent_switch_4_link_0: 1.33927 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_4_link_1: 1.34269 bw: 16000 base_latency: 1
+links_utilized_percent_switch_4: 4.47992
+  links_utilized_percent_switch_4_link_0: 4.47268 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_4_link_1: 4.48716 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_4_link_0_Response_Data: 76917 5538024 [ 0 0 0 0 76917 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_0_Writeback_Control: 77161 617288 [ 0 0 0 77161 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Control: 76918 615344 [ 0 0 76918 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Data: 76104 5479488 [ 0 0 76104 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_4_link_1_Response_Data: 1058 76176 [ 0 0 0 0 1058 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Response_Data: 77282 5564304 [ 0 0 0 0 77282 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_0_Writeback_Control: 77591 620728 [ 0 0 0 77591 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Control: 77282 618256 [ 0 0 77282 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Data: 76562 5512464 [ 0 0 76562 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_4_link_1_Response_Data: 1032 74304 [ 0 0 0 0 1032 0 0 0 0 0 ] base_latency: 1
 
 switch_5_inlinks: 2
 switch_5_outlinks: 2
-links_utilized_percent_switch_5: 1.34326
-  links_utilized_percent_switch_5_link_0: 1.34149 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_5_link_1: 1.34504 bw: 16000 base_latency: 1
+links_utilized_percent_switch_5: 4.45778
+  links_utilized_percent_switch_5_link_0: 4.44972 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_5_link_1: 4.46585 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_5_link_0_Response_Data: 77043 5547096 [ 0 0 0 0 77043 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_0_Writeback_Control: 77297 618376 [ 0 0 0 77297 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Control: 77044 616352 [ 0 0 77044 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Data: 76280 5492160 [ 0 0 76280 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_5_link_1_Response_Data: 1018 73296 [ 0 0 0 0 1018 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_Response_Data: 76881 5535432 [ 0 0 0 0 76881 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_0_Writeback_Control: 77228 617824 [ 0 0 0 77228 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Control: 76883 615064 [ 0 0 76883 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Data: 76151 5482872 [ 0 0 76151 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_5_link_1_Response_Data: 1078 77616 [ 0 0 0 0 1078 0 0 0 0 0 ] base_latency: 1
 
 switch_6_inlinks: 2
 switch_6_outlinks: 2
-links_utilized_percent_switch_6: 1.33528
-  links_utilized_percent_switch_6_link_0: 1.33337 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_6_link_1: 1.33719 bw: 16000 base_latency: 1
+links_utilized_percent_switch_6: 4.46993
+  links_utilized_percent_switch_6_link_0: 4.46316 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_6_link_1: 4.4767 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_6_link_0_Response_Data: 76575 5513400 [ 0 0 0 0 76575 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_0_Writeback_Control: 76846 614768 [ 0 0 0 76846 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Control: 76576 612608 [ 0 0 76576 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Data: 75797 5457384 [ 0 0 75797 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_6_link_1_Response_Data: 1052 75744 [ 0 0 0 0 1052 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_Response_Data: 77119 5552568 [ 0 0 0 0 77119 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_0_Writeback_Control: 77408 619264 [ 0 0 0 77408 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Control: 77121 616968 [ 0 0 77121 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Data: 76391 5500152 [ 0 0 76391 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_6_link_1_Response_Data: 1020 73440 [ 0 0 0 0 1020 0 0 0 0 0 ] base_latency: 1
 
 switch_7_inlinks: 2
 switch_7_outlinks: 2
-links_utilized_percent_switch_7: 1.34665
-  links_utilized_percent_switch_7_link_0: 1.34474 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_7_link_1: 1.34856 bw: 16000 base_latency: 1
+links_utilized_percent_switch_7: 4.44875
+  links_utilized_percent_switch_7_link_0: 4.44123 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_7_link_1: 4.45627 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_7_link_0_Response_Data: 77228 5560416 [ 0 0 0 0 77228 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_0_Writeback_Control: 77500 620000 [ 0 0 0 77500 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Control: 77229 617832 [ 0 0 77229 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Data: 76434 5503248 [ 0 0 76434 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_7_link_1_Response_Data: 1068 76896 [ 0 0 0 0 1068 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Response_Data: 76737 5525064 [ 0 0 0 0 76737 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_0_Writeback_Control: 77056 616448 [ 0 0 0 77056 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Control: 76740 613920 [ 0 0 76740 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Data: 76043 5475096 [ 0 0 76043 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_7_link_1_Response_Data: 1018 73296 [ 0 0 0 0 1018 0 0 0 0 0 ] base_latency: 1
 
 switch_8_inlinks: 2
 switch_8_outlinks: 2
-links_utilized_percent_switch_8: 10.608
-  links_utilized_percent_switch_8_link_0: 10.6231 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_8_link_1: 10.5929 bw: 16000 base_latency: 1
+links_utilized_percent_switch_8: 35.2892
+  links_utilized_percent_switch_8_link_0: 35.3495 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_8_link_1: 35.229 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_8_link_0_Control: 615881 4927048 [ 0 0 615881 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_0_Data: 609674 43896528 [ 0 0 609674 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Response_Data: 607509 43740648 [ 0 0 0 0 607509 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_8_link_1_Writeback_Control: 618018 4944144 [ 0 0 0 618018 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Control: 616139 4929112 [ 0 0 616139 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_0_Data: 610466 43953552 [ 0 0 610466 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Response_Data: 607869 43766568 [ 0 0 0 0 607869 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_8_link_1_Writeback_Control: 618697 4949576 [ 0 0 0 618697 0 0 0 0 0 0 ] base_latency: 1
 
 switch_9_inlinks: 9
 switch_9_outlinks: 9
-links_utilized_percent_switch_9: 2.37188
-  links_utilized_percent_switch_9_link_0: 1.34318 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_1: 1.34421 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_2: 1.33905 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_3: 1.33852 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_4: 1.33927 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_5: 1.34149 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_6: 1.33337 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_7: 1.34474 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_9_link_8: 10.6231 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_9_link_0_Response_Data: 77136 5553792 [ 0 0 0 0 77136 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_0_Writeback_Control: 77433 619464 [ 0 0 0 77433 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_1_Response_Data: 77200 5558400 [ 0 0 0 0 77200 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_1_Writeback_Control: 77452 619616 [ 0 0 0 77452 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_2_Response_Data: 76899 5536728 [ 0 0 0 0 76899 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_2_Writeback_Control: 77195 617560 [ 0 0 0 77195 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_3_Response_Data: 76872 5534784 [ 0 0 0 0 76872 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_3_Writeback_Control: 77134 617072 [ 0 0 0 77134 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_4_Response_Data: 76917 5538024 [ 0 0 0 0 76917 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_4_Writeback_Control: 77161 617288 [ 0 0 0 77161 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_5_Response_Data: 77043 5547096 [ 0 0 0 0 77043 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_5_Writeback_Control: 77297 618376 [ 0 0 0 77297 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_6_Response_Data: 76575 5513400 [ 0 0 0 0 76575 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_6_Writeback_Control: 76846 614768 [ 0 0 0 76846 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_7_Response_Data: 77228 5560416 [ 0 0 0 0 77228 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_7_Writeback_Control: 77500 620000 [ 0 0 0 77500 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_8_Control: 615881 4927048 [ 0 0 615881 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_9_link_8_Data: 609675 43896600 [ 0 0 609675 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_9: 7.88981
+  links_utilized_percent_switch_9_link_0: 4.47733 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_1: 4.46635 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_2: 4.44489 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_3: 4.44343 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_4: 4.4727 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_5: 4.44972 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_6: 4.46316 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_7: 4.44123 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_9_link_8: 35.3495 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_9_link_0_Response_Data: 77360 5569920 [ 0 0 0 0 77360 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_0_Writeback_Control: 77689 621512 [ 0 0 0 77689 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_1_Response_Data: 77170 5556240 [ 0 0 0 0 77170 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_1_Writeback_Control: 77501 620008 [ 0 0 0 77501 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_2_Response_Data: 76800 5529600 [ 0 0 0 0 76800 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_2_Writeback_Control: 77121 616968 [ 0 0 0 77121 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_3_Response_Data: 76774 5527728 [ 0 0 0 0 76774 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_3_Writeback_Control: 77103 616824 [ 0 0 0 77103 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_4_Response_Data: 77282 5564304 [ 0 0 0 0 77282 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_4_Writeback_Control: 77591 620728 [ 0 0 0 77591 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_5_Response_Data: 76881 5535432 [ 0 0 0 0 76881 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_5_Writeback_Control: 77228 617824 [ 0 0 0 77228 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_6_Response_Data: 77119 5552568 [ 0 0 0 0 77119 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_6_Writeback_Control: 77408 619264 [ 0 0 0 77408 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_7_Response_Data: 76737 5525064 [ 0 0 0 0 76737 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_7_Writeback_Control: 77056 616448 [ 0 0 0 77056 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_8_Control: 616139 4929112 [ 0 0 616139 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_9_link_8_Data: 610466 43953552 [ 0 0 610466 0 0 0 0 0 0 0 ] base_latency: 1
 
 Cache Stats: system.l1_cntrl0.cacheMemory
-  system.l1_cntrl0.cacheMemory_total_misses: 77138
-  system.l1_cntrl0.cacheMemory_total_demand_misses: 77138
+  system.l1_cntrl0.cacheMemory_total_misses: 77364
+  system.l1_cntrl0.cacheMemory_total_demand_misses: 77364
   system.l1_cntrl0.cacheMemory_total_prefetches: 0
   system.l1_cntrl0.cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl0.cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl0.cacheMemory_request_type_LD:   65.2065%
-  system.l1_cntrl0.cacheMemory_request_type_ST:   34.7935%
+  system.l1_cntrl0.cacheMemory_request_type_LD:   65.016%
+  system.l1_cntrl0.cacheMemory_request_type_ST:   34.984%
 
-  system.l1_cntrl0.cacheMemory_access_mode_type_Supervisor:   77138    100%
+  system.l1_cntrl0.cacheMemory_access_mode_type_Supervisor:   77364    100%
 
  --- L1Cache ---
  - Event Counts -
-Load [50062 49936 49885 50169 50299 50006 49692 49994 ] 400043
+Load [50042 50017 50024 50037 50299 50232 49853 49771 ] 400275
 Ifetch [0 0 0 0 0 0 0 0 ] 0
-Store [26856 27108 26691 27060 26839 27195 27208 26882 ] 215839
-Data [76917 77043 76575 77228 77136 77200 76899 76872 ] 615870
-Fwd_GETX [1058 1018 1052 1068 1017 1018 1097 1033 ] 8361
+Store [27243 26866 27097 26703 27065 26941 26948 27004 ] 215867
+Data [77282 76881 77119 76737 77360 77170 76800 76774 ] 616123
+Fwd_GETX [1032 1078 1020 1018 995 1047 999 1066 ] 8255
 Inv [0 0 0 0 0 0 0 0 ] 0
-Replacement [76914 77040 76572 77225 77134 77197 76896 76872 ] 615850
-Writeback_Ack [75855 76021 75517 76155 76113 76177 75799 75834 ] 607471
-Writeback_Nack [248 258 277 277 303 257 299 267 ] 2186
+Replacement [77281 76879 77117 76736 77360 77169 76797 76771 ] 616110
+Writeback_Ack [76243 75800 76094 75713 76359 76118 75798 75703 ] 607828
+Writeback_Nack [316 350 294 325 335 336 324 334 ] 2614
 
  - Transitions -
-I  Load [50062 49936 49885 50169 50299 50006 49692 49994 ] 400043
+I  Load [50042 50017 50024 50037 50299 50232 49853 49771 ] 400275
 I  Ifetch [0 0 0 0 0 0 0 0 ] 0
-I  Store [26856 27108 26691 27060 26839 27195 27208 26882 ] 215839
+I  Store [27243 26866 27097 26703 27065 26941 26948 27004 ] 215867
 I  Inv [0 0 0 0 0 0 0 0 ] 0
-I  Replacement [810 760 775 791 714 761 798 766 ] 6175
+I  Replacement [716 728 726 693 660 711 675 732 ] 5641
 
-II  Writeback_Nack [248 258 277 277 303 257 299 267 ] 2186
+II  Writeback_Nack [316 350 294 325 335 336 324 334 ] 2614
 
 M  Load [0 0 0 0 0 0 0 0 ] 0
 M  Ifetch [0 0 0 0 0 0 0 0 ] 0
 M  Store [0 0 0 0 0 0 0 0 ] 0
-M  Fwd_GETX [810 760 775 791 714 761 798 766 ] 6175
+M  Fwd_GETX [716 728 726 693 660 711 675 732 ] 5641
 M  Inv [0 0 0 0 0 0 0 0 ] 0
-M  Replacement [76104 76280 75797 76434 76420 76436 76098 76106 ] 609675
+M  Replacement [76565 76151 76391 76043 76700 76458 76122 76039 ] 610469
 
-MI  Fwd_GETX [248 258 277 277 303 257 299 267 ] 2186
+MI  Fwd_GETX [316 350 294 325 335 336 324 334 ] 2614
 MI  Inv [0 0 0 0 0 0 0 0 ] 0
-MI  Writeback_Ack [75855 76021 75517 76155 76113 76177 75799 75834 ] 607471
+MI  Writeback_Ack [76243 75800 76094 75713 76359 76118 75798 75703 ] 607828
 MI  Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
 
 MII  Fwd_GETX [0 0 0 0 0 0 0 0 ] 0
 
-IS  Data [50061 49936 49885 50168 50297 50005 49691 49992 ] 400035
+IS  Data [50041 50016 50022 50034 50297 50229 49853 49770 ] 400262
 
-IM  Data [26856 27107 26690 27060 26839 27195 27208 26880 ] 215835
+IM  Data [27241 26865 27097 26703 27063 26941 26947 27004 ] 215861
 
 Cache Stats: system.l1_cntrl1.cacheMemory
-  system.l1_cntrl1.cacheMemory_total_misses: 77201
-  system.l1_cntrl1.cacheMemory_total_demand_misses: 77201
+  system.l1_cntrl1.cacheMemory_total_misses: 77173
+  system.l1_cntrl1.cacheMemory_total_demand_misses: 77173
   system.l1_cntrl1.cacheMemory_total_prefetches: 0
   system.l1_cntrl1.cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl1.cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl1.cacheMemory_request_type_LD:   64.7738%
-  system.l1_cntrl1.cacheMemory_request_type_ST:   35.2262%
+  system.l1_cntrl1.cacheMemory_request_type_LD:   65.0901%
+  system.l1_cntrl1.cacheMemory_request_type_ST:   34.9099%
 
-  system.l1_cntrl1.cacheMemory_access_mode_type_Supervisor:   77201    100%
+  system.l1_cntrl1.cacheMemory_access_mode_type_Supervisor:   77173    100%
 
 Cache Stats: system.l1_cntrl2.cacheMemory
-  system.l1_cntrl2.cacheMemory_total_misses: 76900
-  system.l1_cntrl2.cacheMemory_total_demand_misses: 76900
+  system.l1_cntrl2.cacheMemory_total_misses: 76801
+  system.l1_cntrl2.cacheMemory_total_demand_misses: 76801
   system.l1_cntrl2.cacheMemory_total_prefetches: 0
   system.l1_cntrl2.cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl2.cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl2.cacheMemory_request_type_LD:   64.619%
-  system.l1_cntrl2.cacheMemory_request_type_ST:   35.381%
+  system.l1_cntrl2.cacheMemory_request_type_LD:   64.9119%
+  system.l1_cntrl2.cacheMemory_request_type_ST:   35.0881%
 
-  system.l1_cntrl2.cacheMemory_access_mode_type_Supervisor:   76900    100%
+  system.l1_cntrl2.cacheMemory_access_mode_type_Supervisor:   76801    100%
 
 Cache Stats: system.l1_cntrl3.cacheMemory
-  system.l1_cntrl3.cacheMemory_total_misses: 76876
-  system.l1_cntrl3.cacheMemory_total_demand_misses: 76876
+  system.l1_cntrl3.cacheMemory_total_misses: 76775
+  system.l1_cntrl3.cacheMemory_total_demand_misses: 76775
   system.l1_cntrl3.cacheMemory_total_prefetches: 0
   system.l1_cntrl3.cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl3.cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl3.cacheMemory_request_type_LD:   65.032%
-  system.l1_cntrl3.cacheMemory_request_type_ST:   34.968%
+  system.l1_cntrl3.cacheMemory_request_type_LD:   64.8271%
+  system.l1_cntrl3.cacheMemory_request_type_ST:   35.1729%
 
-  system.l1_cntrl3.cacheMemory_access_mode_type_Supervisor:   76876    100%
+  system.l1_cntrl3.cacheMemory_access_mode_type_Supervisor:   76775    100%
 
 Cache Stats: system.l1_cntrl4.cacheMemory
-  system.l1_cntrl4.cacheMemory_total_misses: 76918
-  system.l1_cntrl4.cacheMemory_total_demand_misses: 76918
+  system.l1_cntrl4.cacheMemory_total_misses: 77285
+  system.l1_cntrl4.cacheMemory_total_demand_misses: 77285
   system.l1_cntrl4.cacheMemory_total_prefetches: 0
   system.l1_cntrl4.cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl4.cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl4.cacheMemory_request_type_LD:   65.0849%
-  system.l1_cntrl4.cacheMemory_request_type_ST:   34.9151%
+  system.l1_cntrl4.cacheMemory_request_type_LD:   64.75%
+  system.l1_cntrl4.cacheMemory_request_type_ST:   35.25%
 
-  system.l1_cntrl4.cacheMemory_access_mode_type_Supervisor:   76918    100%
+  system.l1_cntrl4.cacheMemory_access_mode_type_Supervisor:   77285    100%
 
 Cache Stats: system.l1_cntrl5.cacheMemory
-  system.l1_cntrl5.cacheMemory_total_misses: 77044
-  system.l1_cntrl5.cacheMemory_total_demand_misses: 77044
+  system.l1_cntrl5.cacheMemory_total_misses: 76883
+  system.l1_cntrl5.cacheMemory_total_demand_misses: 76883
   system.l1_cntrl5.cacheMemory_total_prefetches: 0
   system.l1_cntrl5.cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl5.cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl5.cacheMemory_request_type_LD:   64.8149%
-  system.l1_cntrl5.cacheMemory_request_type_ST:   35.1851%
+  system.l1_cntrl5.cacheMemory_request_type_LD:   65.056%
+  system.l1_cntrl5.cacheMemory_request_type_ST:   34.944%
 
-  system.l1_cntrl5.cacheMemory_access_mode_type_Supervisor:   77044    100%
+  system.l1_cntrl5.cacheMemory_access_mode_type_Supervisor:   76883    100%
 
 Cache Stats: system.l1_cntrl6.cacheMemory
-  system.l1_cntrl6.cacheMemory_total_misses: 76576
-  system.l1_cntrl6.cacheMemory_total_demand_misses: 76576
+  system.l1_cntrl6.cacheMemory_total_misses: 77121
+  system.l1_cntrl6.cacheMemory_total_demand_misses: 77121
   system.l1_cntrl6.cacheMemory_total_prefetches: 0
   system.l1_cntrl6.cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl6.cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl6.cacheMemory_request_type_LD:   65.1444%
-  system.l1_cntrl6.cacheMemory_request_type_ST:   34.8556%
+  system.l1_cntrl6.cacheMemory_request_type_LD:   64.8643%
+  system.l1_cntrl6.cacheMemory_request_type_ST:   35.1357%
 
-  system.l1_cntrl6.cacheMemory_access_mode_type_Supervisor:   76576    100%
+  system.l1_cntrl6.cacheMemory_access_mode_type_Supervisor:   77121    100%
 
 Cache Stats: system.l1_cntrl7.cacheMemory
-  system.l1_cntrl7.cacheMemory_total_misses: 77229
-  system.l1_cntrl7.cacheMemory_total_demand_misses: 77229
+  system.l1_cntrl7.cacheMemory_total_misses: 76740
+  system.l1_cntrl7.cacheMemory_total_demand_misses: 76740
   system.l1_cntrl7.cacheMemory_total_prefetches: 0
   system.l1_cntrl7.cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl7.cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl7.cacheMemory_request_type_LD:   64.9613%
-  system.l1_cntrl7.cacheMemory_request_type_ST:   35.0387%
+  system.l1_cntrl7.cacheMemory_request_type_LD:   65.2033%
+  system.l1_cntrl7.cacheMemory_request_type_ST:   34.7967%
 
-  system.l1_cntrl7.cacheMemory_access_mode_type_Supervisor:   77229    100%
+  system.l1_cntrl7.cacheMemory_access_mode_type_Supervisor:   76740    100%
 
 Memory controller: system.dir_cntrl0.memBuffer:
-  memory_total_requests: 1215007
-  memory_reads: 607514
-  memory_writes: 607471
-  memory_refreshes: 59844
-  memory_total_request_delays: 94490839
-  memory_delays_per_request: 77.7698
-  memory_delays_in_input_queue: 4956280
-  memory_delays_behind_head_of_bank_queue: 42721539
-  memory_delays_stalled_at_head_of_bank_queue: 46813020
-  memory_stalls_for_bank_busy: 7203781
+  memory_total_requests: 1215736
+  memory_reads: 607873
+  memory_writes: 607828
+  memory_refreshes: 60020
+  memory_total_request_delays: 87259380
+  memory_delays_per_request: 71.7749
+  memory_delays_in_input_queue: 1519458
+  memory_delays_behind_head_of_bank_queue: 40027777
+  memory_delays_stalled_at_head_of_bank_queue: 45712145
+  memory_stalls_for_bank_busy: 7071199
   memory_stalls_for_random_busy: 0
-  memory_stalls_for_anti_starvation: 12030630
-  memory_stalls_for_arbitration: 9262268
-  memory_stalls_for_bus: 12663868
+  memory_stalls_for_anti_starvation: 11246699
+  memory_stalls_for_arbitration: 9161203
+  memory_stalls_for_bus: 12538876
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 4593756
-  memory_stalls_for_read_read_turnaround: 1058717
-  accesses_per_bank: 38064  37906  37810  38185  38131  38139  38459  38015  38286  38038  38075  38326  37705  37695  37985  37984  37848  37764  37931  38109  38114  37875  38032  37917  37934  37358  38024  37068  37768  38020  38377  38065  
+  memory_stalls_for_read_write_turnaround: 4625197
+  memory_stalls_for_read_read_turnaround: 1068971
+  accesses_per_bank: 38200  37933  37788  38170  38170  38159  38358  38044  38330  38092  38142  38320  37763  37679  37948  38038  37829  37792  38064  38023  38122  37894  38063  37979  37916  37422  38015  37136  37884  38037  38326  38100  
 
  --- Directory ---
  - Event Counts -
-GETX [1243024 ] 1243024
+GETX [786348 ] 786348
 GETS [0 ] 0
-PUTX [607488 ] 607488
-PUTX_NotOwner [2186 ] 2186
+PUTX [607852 ] 607852
+PUTX_NotOwner [2614 ] 2614
 DMA_READ [0 ] 0
 DMA_WRITE [0 ] 0
-Memory_Data [607509 ] 607509
-Memory_Ack [607471 ] 607471
+Memory_Data [607869 ] 607869
+Memory_Ack [607828 ] 607828
 
  - Transitions -
-I  GETX [607519 ] 607519
+I  GETX [607884 ] 607884
 I  PUTX_NotOwner [0 ] 0
 I  DMA_READ [0 ] 0
 I  DMA_WRITE [0 ] 0
 
-M  GETX [8361 ] 8361
-M  PUTX [607488 ] 607488
-M  PUTX_NotOwner [2186 ] 2186
+M  GETX [8255 ] 8255
+M  PUTX [607852 ] 607852
+M  PUTX_NotOwner [2614 ] 2614
 M  DMA_READ [0 ] 0
 M  DMA_WRITE [0 ] 0
 
@@ -428,21 +428,21 @@ M_DWRI  Memory_Ack [0 ] 0
 M_DRDI  GETX [0 ] 0
 M_DRDI  Memory_Ack [0 ] 0
 
-IM  GETX [250002 ] 250002
+IM  GETX [65216 ] 65216
 IM  GETS [0 ] 0
 IM  PUTX [0 ] 0
 IM  PUTX_NotOwner [0 ] 0
 IM  DMA_READ [0 ] 0
 IM  DMA_WRITE [0 ] 0
-IM  Memory_Data [607509 ] 607509
+IM  Memory_Data [607869 ] 607869
 
-MI  GETX [377142 ] 377142
+MI  GETX [104993 ] 104993
 MI  GETS [0 ] 0
 MI  PUTX [0 ] 0
 MI  PUTX_NotOwner [0 ] 0
 MI  DMA_READ [0 ] 0
 MI  DMA_WRITE [0 ] 0
-MI  Memory_Ack [607471 ] 607471
+MI  Memory_Ack [607828 ] 607828
 
 ID  GETX [0 ] 0
 ID  GETS [0 ] 0

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simerr b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simerr
index 8802752c7f84a97b601f5049bfdfe6840182e744..b60dc70fa40ef3d96133f001b2d11dabe6f4c81a 100755 (executable)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simerr
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simerr
@@ -1,74 +1,74 @@
-system.cpu5: completed 10000 read, 5419 write accesses @2858002
-system.cpu7: completed 10000 read, 5473 write accesses @2858520
-system.cpu0: completed 10000 read, 5305 write accesses @2868940
-system.cpu1: completed 10000 read, 5416 write accesses @2893421
-system.cpu4: completed 10000 read, 5371 write accesses @2900102
-system.cpu2: completed 10000 read, 5337 write accesses @2905419
-system.cpu3: completed 10000 read, 5513 write accesses @2916882
-system.cpu6: completed 10000 read, 5458 write accesses @2971509
-system.cpu1: completed 20000 read, 10866 write accesses @5727829
-system.cpu0: completed 20000 read, 10592 write accesses @5734440
-system.cpu4: completed 20000 read, 10679 write accesses @5748810
-system.cpu7: completed 20000 read, 10819 write accesses @5759030
-system.cpu3: completed 20000 read, 10666 write accesses @5769940
-system.cpu5: completed 20000 read, 10771 write accesses @5778709
-system.cpu6: completed 20000 read, 10832 write accesses @5805350
-system.cpu2: completed 20000 read, 10785 write accesses @5828740
-system.cpu1: completed 30000 read, 16207 write accesses @8557570
-system.cpu0: completed 30000 read, 15949 write accesses @8566069
-system.cpu7: completed 30000 read, 16214 write accesses @8624139
-system.cpu4: completed 30000 read, 16127 write accesses @8660230
-system.cpu3: completed 30000 read, 16038 write accesses @8676099
-system.cpu5: completed 30000 read, 16217 write accesses @8736099
-system.cpu6: completed 30000 read, 16240 write accesses @8737471
-system.cpu2: completed 30000 read, 16356 write accesses @8775610
-system.cpu4: completed 40000 read, 21442 write accesses @11430710
-system.cpu1: completed 40000 read, 21431 write accesses @11446880
-system.cpu0: completed 40000 read, 21249 write accesses @11450119
-system.cpu7: completed 40000 read, 21591 write accesses @11495090
-system.cpu3: completed 40000 read, 21525 write accesses @11637130
-system.cpu6: completed 40000 read, 21625 write accesses @11655440
-system.cpu5: completed 40000 read, 21557 write accesses @11655900
-system.cpu2: completed 40000 read, 22064 write accesses @11762920
-system.cpu0: completed 50000 read, 26643 write accesses @14301920
-system.cpu7: completed 50000 read, 26956 write accesses @14350920
-system.cpu1: completed 50000 read, 26912 write accesses @14419140
-system.cpu4: completed 50000 read, 27035 write accesses @14428630
-system.cpu3: completed 50000 read, 26875 write accesses @14456189
-system.cpu6: completed 50000 read, 26968 write accesses @14552960
-system.cpu5: completed 50000 read, 27033 write accesses @14560100
-system.cpu2: completed 50000 read, 27494 write accesses @14706770
-system.cpu0: completed 60000 read, 32018 write accesses @17124880
-system.cpu7: completed 60000 read, 32300 write accesses @17213372
-system.cpu3: completed 60000 read, 32247 write accesses @17322589
-system.cpu4: completed 60000 read, 32351 write accesses @17326542
-system.cpu1: completed 60000 read, 32302 write accesses @17368660
-system.cpu6: completed 60000 read, 32274 write accesses @17446980
-system.cpu5: completed 60000 read, 32418 write accesses @17468540
-system.cpu2: completed 60000 read, 32981 write accesses @17554781
-system.cpu0: completed 70000 read, 37316 write accesses @19965899
-system.cpu7: completed 70000 read, 37727 write accesses @20108089
-system.cpu4: completed 70000 read, 37633 write accesses @20233790
-system.cpu1: completed 70000 read, 37821 write accesses @20289790
-system.cpu3: completed 70000 read, 37645 write accesses @20291829
-system.cpu6: completed 70000 read, 37499 write accesses @20304889
-system.cpu5: completed 70000 read, 37769 write accesses @20345680
-system.cpu2: completed 70000 read, 38246 write accesses @20384949
-system.cpu0: completed 80000 read, 42438 write accesses @22835499
-system.cpu7: completed 80000 read, 43085 write accesses @23031949
-system.cpu4: completed 80000 read, 42968 write accesses @23134444
-system.cpu3: completed 80000 read, 42908 write accesses @23138450
-system.cpu1: completed 80000 read, 43002 write accesses @23183439
-system.cpu6: completed 80000 read, 42955 write accesses @23224650
-system.cpu2: completed 80000 read, 43596 write accesses @23229730
-system.cpu5: completed 80000 read, 43242 write accesses @23231600
-system.cpu0: completed 90000 read, 47763 write accesses @25792220
-system.cpu7: completed 90000 read, 48675 write accesses @25948310
-system.cpu3: completed 90000 read, 48223 write accesses @26022110
-system.cpu4: completed 90000 read, 48406 write accesses @26054041
-system.cpu6: completed 90000 read, 48309 write accesses @26074843
-system.cpu2: completed 90000 read, 49141 write accesses @26106590
-system.cpu5: completed 90000 read, 48681 write accesses @26106730
-system.cpu1: completed 90000 read, 48449 write accesses @26117229
-system.cpu0: completed 100000 read, 53147 write accesses @28725020
+system.cpu0: completed 10000 read, 5375 write accesses @856398
+system.cpu7: completed 10000 read, 5367 write accesses @862743
+system.cpu4: completed 10000 read, 5441 write accesses @863378
+system.cpu5: completed 10000 read, 5493 write accesses @863384
+system.cpu6: completed 10000 read, 5390 write accesses @871145
+system.cpu2: completed 10000 read, 5481 write accesses @872080
+system.cpu3: completed 10000 read, 5307 write accesses @887641
+system.cpu1: completed 10000 read, 5435 write accesses @888236
+system.cpu0: completed 20000 read, 10720 write accesses @1697024
+system.cpu4: completed 20000 read, 10674 write accesses @1708688
+system.cpu2: completed 20000 read, 10679 write accesses @1718143
+system.cpu7: completed 20000 read, 10680 write accesses @1726961
+system.cpu5: completed 20000 read, 10844 write accesses @1731599
+system.cpu6: completed 20000 read, 10755 write accesses @1744688
+system.cpu1: completed 20000 read, 10834 write accesses @1760840
+system.cpu3: completed 20000 read, 10861 write accesses @1783274
+system.cpu0: completed 30000 read, 16096 write accesses @2576060
+system.cpu7: completed 30000 read, 16150 write accesses @2587892
+system.cpu2: completed 30000 read, 16059 write accesses @2589422
+system.cpu4: completed 30000 read, 16216 write accesses @2589611
+system.cpu5: completed 30000 read, 16311 write accesses @2606290
+system.cpu1: completed 30000 read, 16085 write accesses @2614280
+system.cpu6: completed 30000 read, 16250 write accesses @2617742
+system.cpu3: completed 30000 read, 16179 write accesses @2640821
+system.cpu0: completed 40000 read, 21491 write accesses @3463636
+system.cpu5: completed 40000 read, 21654 write accesses @3466586
+system.cpu4: completed 40000 read, 21608 write accesses @3466694
+system.cpu6: completed 40000 read, 21630 write accesses @3468467
+system.cpu2: completed 40000 read, 21509 write accesses @3470109
+system.cpu7: completed 40000 read, 21495 write accesses @3471086
+system.cpu1: completed 40000 read, 21461 write accesses @3476351
+system.cpu3: completed 40000 read, 21515 write accesses @3523754
+system.cpu4: completed 50000 read, 27063 write accesses @4330388
+system.cpu6: completed 50000 read, 27077 write accesses @4332246
+system.cpu5: completed 50000 read, 27022 write accesses @4334407
+system.cpu1: completed 50000 read, 26821 write accesses @4334861
+system.cpu2: completed 50000 read, 27005 write accesses @4339007
+system.cpu0: completed 50000 read, 27011 write accesses @4351000
+system.cpu7: completed 50000 read, 27023 write accesses @4371905
+system.cpu3: completed 50000 read, 26894 write accesses @4421954
+system.cpu6: completed 60000 read, 32380 write accesses @5185697
+system.cpu2: completed 60000 read, 32320 write accesses @5197049
+system.cpu1: completed 60000 read, 32167 write accesses @5197304
+system.cpu4: completed 60000 read, 32460 write accesses @5201909
+system.cpu5: completed 60000 read, 32453 write accesses @5222405
+system.cpu0: completed 60000 read, 32443 write accesses @5224148
+system.cpu7: completed 60000 read, 32400 write accesses @5229110
+system.cpu3: completed 60000 read, 32209 write accesses @5281507
+system.cpu6: completed 70000 read, 37664 write accesses @6045459
+system.cpu4: completed 70000 read, 37836 write accesses @6058226
+system.cpu1: completed 70000 read, 37476 write accesses @6063535
+system.cpu2: completed 70000 read, 37820 write accesses @6074654
+system.cpu5: completed 70000 read, 37785 write accesses @6097069
+system.cpu7: completed 70000 read, 37611 write accesses @6097865
+system.cpu0: completed 70000 read, 37769 write accesses @6104873
+system.cpu3: completed 70000 read, 37585 write accesses @6142157
+system.cpu4: completed 80000 read, 43086 write accesses @6914689
+system.cpu6: completed 80000 read, 42941 write accesses @6923107
+system.cpu1: completed 80000 read, 42761 write accesses @6929131
+system.cpu2: completed 80000 read, 43045 write accesses @6933740
+system.cpu5: completed 80000 read, 43067 write accesses @6962084
+system.cpu7: completed 80000 read, 43014 write accesses @6974408
+system.cpu0: completed 80000 read, 43066 write accesses @6974987
+system.cpu3: completed 80000 read, 43041 write accesses @7015199
+system.cpu4: completed 90000 read, 48630 write accesses @7775720
+system.cpu1: completed 90000 read, 48156 write accesses @7793810
+system.cpu6: completed 90000 read, 48441 write accesses @7801463
+system.cpu2: completed 90000 read, 48518 write accesses @7804520
+system.cpu5: completed 90000 read, 48378 write accesses @7834475
+system.cpu0: completed 90000 read, 48500 write accesses @7849400
+system.cpu7: completed 90000 read, 48425 write accesses @7864016
+system.cpu3: completed 90000 read, 48443 write accesses @7889702
+system.cpu4: completed 100000 read, 54108 write accesses @8642753
 hack: be nice to actually delete the event here

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simout b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simout
index cc90915b5e5b03dec7111bbca2a7b04cc16fe0a7..ab6547bea1a00f28ea03dc4069c4e16975a3a8cf 100755 (executable)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simout
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simout
@@ -1,10 +1,12 @@
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 10 2012 16:32:12
-gem5 started Jul 10 2012 17:27:35
-gem5 executing on sc2b0605
+gem5 compiled Sep  1 2012 13:41:29
+gem5 started Sep  1 2012 13:47:40
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby -re tests/run.py build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 28725020 because maximum number of loads reached
+Exiting @ tick 8642753 because maximum number of loads reached

diff --git a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
index 321ca5f77a335c6fa8bb28a6381d6dfe5e409921..a9a755cda7a26ab0898036c2b96021a390d025f2 100644 (file)
--- a/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
+++ b/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
@@ -1,12 +1,12 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.028725                       # Number of seconds simulated
-sim_ticks                                    28725020                       # Number of ticks simulated
-final_tick                                   28725020                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.008643                       # Number of seconds simulated
+sim_ticks                                     8642753                       # Number of ticks simulated
+final_tick                                    8642753                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_tick_rate                                 477176                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 379424                       # Number of bytes of host memory used
-host_seconds                                    60.20                       # Real time elapsed on the host
+host_tick_rate                                 200801                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 409268                       # Number of bytes of host memory used
+host_seconds                                    43.04                       # Real time elapsed on the host
 system.l1_cntrl4.cacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl4.cacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl4.cacheMemory.num_tag_array_reads            0                       # number of tag array reads
@@ -55,29 +55,29 @@ system.l1_cntrl3.cacheMemory.num_tag_array_reads            0
 system.l1_cntrl3.cacheMemory.num_tag_array_writes            0                       # number of tag array writes
 system.l1_cntrl3.cacheMemory.num_tag_array_stalls            0                       # number of stalls caused by tag array
 system.l1_cntrl3.cacheMemory.num_data_array_stalls            0                       # number of stalls caused by data array
-system.cpu0.num_reads                          100000                       # number of read accesses completed
-system.cpu0.num_writes                          53147                       # number of write accesses completed
+system.cpu0.num_reads                           99336                       # number of read accesses completed
+system.cpu0.num_writes                          53454                       # number of write accesses completed
 system.cpu0.num_copies                              0                       # number of copy accesses completed
-system.cpu1.num_reads                           99027                       # number of read accesses completed
-system.cpu1.num_writes                          53354                       # number of write accesses completed
+system.cpu1.num_reads                           99686                       # number of read accesses completed
+system.cpu1.num_writes                          53261                       # number of write accesses completed
 system.cpu1.num_copies                              0                       # number of copy accesses completed
-system.cpu2.num_reads                           98992                       # number of read accesses completed
-system.cpu2.num_writes                          53956                       # number of write accesses completed
+system.cpu2.num_reads                           99694                       # number of read accesses completed
+system.cpu2.num_writes                          53721                       # number of write accesses completed
 system.cpu2.num_copies                              0                       # number of copy accesses completed
-system.cpu3.num_reads                           99374                       # number of read accesses completed
-system.cpu3.num_writes                          53181                       # number of write accesses completed
+system.cpu3.num_reads                           98699                       # number of read accesses completed
+system.cpu3.num_writes                          53080                       # number of write accesses completed
 system.cpu3.num_copies                              0                       # number of copy accesses completed
-system.cpu4.num_reads                           99392                       # number of read accesses completed
-system.cpu4.num_writes                          53489                       # number of write accesses completed
+system.cpu4.num_reads                          100000                       # number of read accesses completed
+system.cpu4.num_writes                          54108                       # number of write accesses completed
 system.cpu4.num_copies                              0                       # number of copy accesses completed
-system.cpu5.num_reads                           99177                       # number of read accesses completed
-system.cpu5.num_writes                          53605                       # number of write accesses completed
+system.cpu5.num_reads                           99065                       # number of read accesses completed
+system.cpu5.num_writes                          53284                       # number of write accesses completed
 system.cpu5.num_copies                              0                       # number of copy accesses completed
-system.cpu6.num_reads                           99055                       # number of read accesses completed
-system.cpu6.num_writes                          53188                       # number of write accesses completed
+system.cpu6.num_reads                           99678                       # number of read accesses completed
+system.cpu6.num_writes                          53683                       # number of write accesses completed
 system.cpu6.num_copies                              0                       # number of copy accesses completed
-system.cpu7.num_reads                           99520                       # number of read accesses completed
-system.cpu7.num_writes                          53821                       # number of write accesses completed
+system.cpu7.num_reads                           98986                       # number of read accesses completed
+system.cpu7.num_writes                          53291                       # number of write accesses completed
 system.cpu7.num_copies                              0                       # number of copy accesses completed
 
 ---------- End Simulation Statistics   ----------

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini
index f8c719b994c06eb00407a64bfd21caea2c704e17..66023571fb07593525688a26a508c066cd4dc24f 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy tester
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -57,9 +58,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -68,6 +69,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -121,6 +123,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -165,6 +168,7 @@ tagArrayBanks=1
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -289,6 +293,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true
@@ -302,6 +307,7 @@ slave=system.system_port
 type=RubyTester
 check_flush=false
 checks_to_complete=100
+clock=1
 deadlock_threshold=50000
 num_cpus=1
 system=system

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats
index cd8ab42dba1067b4b1d67a1a1e1a45fa79828641..cd088963952ef7c063e27ba92b38212e99ed53b4 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats
@@ -1,4 +1,4 @@
-Real time: Jul/10/2012 17:34:42
+Real time: Sep/01/2012 14:05:06
 
 Profiler Stats
 --------------
@@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0
 Elapsed_time_in_hours: 0
 Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 0.58
-Virtual_time_in_minutes: 0.00966667
-Virtual_time_in_hours:   0.000161111
-Virtual_time_in_days:    6.71296e-06
+Virtual_time_in_seconds: 0.52
+Virtual_time_in_minutes: 0.00866667
+Virtual_time_in_hours:   0.000144444
+Virtual_time_in_days:    6.01852e-06
 
-Ruby_current_time: 349711
+Ruby_current_time: 318321
 Ruby_start_time: 0
-Ruby_cycles: 349711
+Ruby_cycles: 318321
 
-mbytes_resident: 41.8008
-mbytes_total: 225.551
-resident_ratio: 0.185362
+mbytes_resident: 44.9961
+mbytes_total: 254.652
+resident_ratio: 0.176758
 
-ruby_cycles_executed: [ 349712 ]
+ruby_cycles_executed: [ 318322 ]
 
 Busy Controller Counts:
 L1Cache-0:0  
@@ -30,15 +30,15 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 16 count: 994 average: 15.841 | standard deviation: 1.12331 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 39 941 ]
+sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1012 average: 15.8221 | standard deviation: 1.11991 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 61 937 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 64 max: 8736 count: 979 average: 5661.07 | standard deviation: 2367.21 | 72 10 0 0 2 2 5 2 5 4 6 8 4 7 3 2 4 3 2 4 3 1 1 1 0 1 1 0 2 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 21 27 27 32 32 32 39 32 43 26 27 28 36 34 35 22 24 33 26 22 19 22 17 14 7 2 16 6 5 11 5 4 3 3 1 2 0 2 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 64 max: 8339 count: 44 average:  6147 | standard deviation: 2036.5 | 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 1 1 1 1 4 4 1 1 3 2 0 2 1 1 0 3 1 1 1 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 1 ]
-miss_latency_ST: [binsize: 64 max: 8736 count: 879 average: 5937.77 | standard deviation: 2125.68 | 69 9 0 0 2 0 3 2 2 0 3 0 1 2 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 19 25 25 31 31 31 38 28 39 25 26 25 34 34 33 21 23 33 23 21 18 21 17 13 7 2 16 5 5 11 5 3 3 3 1 1 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH: [binsize: 16 max: 1853 count: 56 average: 936.107 | standard deviation: 353.831 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 2 0 0 0 0 0 1 0 2 0 0 1 1 2 3 0 0 0 2 0 4 2 0 1 1 1 0 4 1 0 1 0 1 1 1 1 0 0 2 2 0 0 1 0 0 1 1 0 1 0 1 1 1 1 1 2 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_NULL: [binsize: 64 max: 8736 count: 979 average: 5661.07 | standard deviation: 2367.21 | 72 10 0 0 2 2 5 2 5 4 6 8 4 7 3 2 4 3 2 4 3 1 1 1 0 1 1 0 2 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 21 27 27 32 32 32 39 32 43 26 27 28 36 34 35 22 24 33 26 22 19 22 17 14 7 2 16 6 5 11 5 4 3 3 1 2 0 2 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency: [binsize: 64 max: 8110 count: 997 average: 5056.15 | standard deviation: 2131.53 | 69 13 4 2 1 6 6 4 4 1 8 8 6 5 0 3 0 1 1 1 2 3 2 3 0 0 3 1 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 1 1 0 1 3 0 3 1 5 8 11 8 16 15 20 29 26 21 24 31 17 30 34 34 27 28 36 25 28 32 33 35 28 34 17 19 21 21 16 13 13 11 7 3 6 6 8 3 2 2 4 2 2 1 0 3 1 2 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD: [binsize: 64 max: 7764 count: 44 average: 5504.89 | standard deviation: 1648.56 | 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 1 1 0 1 2 0 1 3 1 1 1 2 1 0 0 3 3 0 2 1 1 1 3 1 2 1 0 1 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 ]
+miss_latency_ST: [binsize: 64 max: 8110 count: 897 average: 5296.67 | standard deviation: 1932.9 | 66 13 3 2 0 3 1 2 2 0 1 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 1 1 0 1 2 0 3 1 4 7 11 7 15 15 19 27 26 20 21 30 16 29 32 33 27 28 33 22 28 30 32 34 27 31 16 17 20 21 15 12 13 11 7 2 6 6 8 3 2 1 4 2 2 1 0 2 1 2 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_IFETCH: [binsize: 16 max: 2021 count: 56 average: 850.893 | standard deviation: 421.128 | 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 2 0 3 0 1 1 0 1 0 1 0 0 2 0 0 1 0 0 2 3 1 1 2 0 3 3 1 1 2 2 0 0 3 2 0 0 0 0 0 0 0 2 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 2 0 0 0 0 0 0 2 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_NULL: [binsize: 64 max: 8110 count: 997 average: 5056.15 | standard deviation: 2131.53 | 69 13 4 2 1 6 6 4 4 1 8 8 6 5 0 3 0 1 1 1 2 3 2 3 0 0 3 1 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 1 1 0 1 3 0 3 1 5 8 11 8 16 15 20 29 26 21 24 31 17 30 34 34 27 28 36 25 28 32 33 35 28 34 17 19 21 21 16 13 13 11 7 3 6 6 8 3 2 2 4 2 2 1 0 3 1 2 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -49,9 +49,9 @@ miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: N
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 imcomplete_dir_Times: 0
-miss_latency_LD_NULL: [binsize: 64 max: 8339 count: 44 average:  6147 | standard deviation: 2036.5 | 3 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 1 1 1 1 4 4 1 1 3 2 0 2 1 1 0 3 1 1 1 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 1 ]
-miss_latency_ST_NULL: [binsize: 64 max: 8736 count: 879 average: 5937.77 | standard deviation: 2125.68 | 69 9 0 0 2 0 3 2 2 0 3 0 1 2 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 1 1 2 8 4 5 9 6 8 9 19 19 25 25 31 31 31 38 28 39 25 26 25 34 34 33 21 23 33 23 21 18 21 17 13 7 2 16 5 5 11 5 3 3 3 1 1 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH_NULL: [binsize: 16 max: 1853 count: 56 average: 936.107 | standard deviation: 353.831 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 2 0 0 0 0 0 1 0 2 0 0 1 1 2 3 0 0 0 2 0 4 2 0 1 1 1 0 4 1 0 1 0 1 1 1 1 0 0 2 2 0 0 1 0 0 1 1 0 1 0 1 1 1 1 1 2 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD_NULL: [binsize: 64 max: 7764 count: 44 average: 5504.89 | standard deviation: 1648.56 | 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 1 1 0 1 2 0 1 3 1 1 1 2 1 0 0 3 3 0 2 1 1 1 3 1 2 1 0 1 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 ]
+miss_latency_ST_NULL: [binsize: 64 max: 8110 count: 897 average: 5296.67 | standard deviation: 1932.9 | 66 13 3 2 0 3 1 2 2 0 1 0 0 0 0 1 0 0 1 1 0 1 0 1 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 1 1 0 1 2 0 3 1 4 7 11 7 15 15 19 27 26 20 21 30 16 29 32 33 27 28 33 22 28 30 32 34 27 31 16 17 20 21 15 12 13 11 7 2 6 6 8 3 2 1 4 2 2 1 0 2 1 2 2 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_IFETCH_NULL: [binsize: 16 max: 2021 count: 56 average: 850.893 | standard deviation: 421.128 | 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 2 0 3 0 1 1 0 1 0 1 0 0 2 0 0 1 0 0 2 3 1 1 2 0 3 3 1 1 2 2 0 0 3 2 0 0 0 0 0 0 0 2 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 2 0 0 0 0 0 0 2 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -65,11 +65,11 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN
 
 Message Delayed Cycles
 ----------------------
-Total_delay_cycles: [binsize: 64 max: 1964 count: 6930 average: 44.9837 | standard deviation: 177.937 | 6277 162 19 77 35 23 39 25 31 46 31 47 16 29 20 14 5 2 2 5 1 3 4 7 1 3 1 1 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-Total_nonPF_delay_cycles: [binsize: 1 max: 10 count: 4452 average: 0.269093 | standard deviation: 0.946561 | 4000 119 113 132 37 23 14 8 1 4 1 ]
-  virtual_network_0_delay_cycles: [binsize: 64 max: 1964 count: 2478 average: 125.318 | standard deviation: 280.209 | 1825 162 19 77 35 23 39 25 31 46 31 47 16 29 20 14 5 2 2 5 1 3 4 7 1 3 1 1 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-  virtual_network_1_delay_cycles: [binsize: 1 max: 10 count: 3903 average: 0.282603 | standard deviation: 0.959989 | 3479 115 110 122 32 19 13 8 1 3 1 ]
-  virtual_network_2_delay_cycles: [binsize: 1 max: 9 count: 549 average: 0.173042 | standard deviation: 0.84036 | 521 4 3 10 5 4 1 0 0 1 ]
+Total_delay_cycles: [binsize: 32 max: 1572 count: 7069 average: 39.9154 | standard deviation: 159.247 | 6421 15 38 124 13 11 58 12 11 21 23 10 10 30 13 21 26 16 8 26 17 12 9 25 16 4 10 11 7 8 1 4 2 4 7 1 2 4 1 2 2 1 1 4 2 0 0 3 1 1 ]
+Total_nonPF_delay_cycles: [binsize: 1 max: 11 count: 4539 average: 0.320996 | standard deviation: 1.03402 | 3993 136 158 137 52 29 15 8 6 4 0 1 ]
+  virtual_network_0_delay_cycles: [binsize: 32 max: 1572 count: 2530 average: 110.951 | standard deviation: 251.02 | 1882 15 38 124 13 11 58 12 11 21 23 10 10 30 13 21 26 16 8 26 17 12 9 25 16 4 10 11 7 8 1 4 2 4 7 1 2 4 1 2 2 1 1 4 2 0 0 3 1 1 ]
+  virtual_network_1_delay_cycles: [binsize: 1 max: 9 count: 3976 average: 0.342807 | standard deviation: 1.04899 | 3455 133 152 135 45 25 14 8 5 4 ]
+  virtual_network_2_delay_cycles: [binsize: 1 max: 11 count: 563 average: 0.166963 | standard deviation: 0.907658 | 538 3 6 2 7 4 1 0 1 0 0 1 ]
   virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -83,83 +83,83 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 11853
+page_reclaims: 8497
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 80
 
 Network Stats
 -------------
 
-total_msg_count_Control: 5280 42240
-total_msg_count_Request_Control: 1647 13176
-total_msg_count_Response_Data: 7584 546048
-total_msg_count_Response_Control: 7733 61864
-total_msg_count_Writeback_Data: 3603 259416
-total_msg_count_Writeback_Control: 108 864
-total_msgs: 25955 total_bytes: 923608
+total_msg_count_Control: 5373 42984
+total_msg_count_Request_Control: 1689 13512
+total_msg_count_Response_Data: 7724 556128
+total_msg_count_Response_Control: 7854 62832
+total_msg_count_Writeback_Data: 3705 266760
+total_msg_count_Writeback_Control: 102 816
+total_msgs: 26447 total_bytes: 943032
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 1.57251
-  links_utilized_percent_switch_0_link_0: 1.33853 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 1.80649 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_0_link_0_Request_Control: 549 4392 [ 549 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Response_Data: 897 64584 [ 0 897 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Response_Control: 740 5920 [ 0 740 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Response_Control: 892 7136 [ 0 52 840 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Data: 1201 86472 [ 704 497 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Control: 36 288 [ 36 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_0: 1.76936
+  links_utilized_percent_switch_0_link_0: 1.50069 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 2.03804 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_0_link_0_Request_Control: 563 4504 [ 563 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Data: 915 65880 [ 0 915 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Control: 756 6048 [ 0 756 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Control: 917 7336 [ 917 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Response_Control: 909 7272 [ 0 50 859 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Data: 1235 88920 [ 722 513 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Control: 34 272 [ 34 0 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 2.75106
-  links_utilized_percent_switch_1_link_0: 3.03694 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 2.46518 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_1_link_0_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Response_Data: 861 61992 [ 0 861 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Response_Control: 1749 13992 [ 0 909 840 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Writeback_Data: 1201 86472 [ 704 497 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Writeback_Control: 36 288 [ 36 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Control: 862 6896 [ 862 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Request_Control: 549 4392 [ 549 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Response_Data: 1667 120024 [ 0 1667 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Response_Control: 828 6624 [ 0 828 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_1: 3.08541
+  links_utilized_percent_switch_1_link_0: 3.40851 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 2.76231 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_1_link_0_Control: 917 7336 [ 917 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Response_Data: 873 62856 [ 0 873 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Response_Control: 1777 14216 [ 0 919 858 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Writeback_Data: 1235 88920 [ 722 513 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Writeback_Control: 34 272 [ 34 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Control: 874 6992 [ 874 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Request_Control: 563 4504 [ 563 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Response_Data: 1701 122472 [ 0 1701 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Response_Control: 840 6720 [ 0 840 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 1.17862
-  links_utilized_percent_switch_2_link_0: 1.12664 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 1.23059 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 1.31691
+  links_utilized_percent_switch_2_link_0: 1.26162 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 1.3722 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_2_link_0_Control: 862 6896 [ 862 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Response_Data: 770 55440 [ 0 770 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Response_Control: 88 704 [ 0 88 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Response_Data: 861 61992 [ 0 861 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Response_Control: 858 6864 [ 0 858 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Control: 874 6992 [ 874 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Response_Data: 786 56592 [ 0 786 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Response_Control: 84 672 [ 0 84 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Response_Data: 874 62928 [ 0 874 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Response_Control: 870 6960 [ 0 870 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_3_inlinks: 3
 switch_3_outlinks: 3
-links_utilized_percent_switch_3: 1.83409
-  links_utilized_percent_switch_3_link_0: 1.33853 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_1: 3.03708 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_2: 1.12664 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_3_link_0_Request_Control: 549 4392 [ 549 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Response_Data: 897 64584 [ 0 897 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Response_Control: 740 5920 [ 0 740 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Response_Data: 861 61992 [ 0 861 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Response_Control: 1750 14000 [ 0 910 840 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Writeback_Data: 1201 86472 [ 704 497 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Writeback_Control: 36 288 [ 36 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_2_Control: 862 6896 [ 862 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_2_Response_Data: 770 55440 [ 0 770 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_2_Response_Control: 88 704 [ 0 88 0 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_3: 2.05746
+  links_utilized_percent_switch_3_link_0: 1.50069 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_1: 3.41008 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_2: 1.26162 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_3_link_0_Request_Control: 563 4504 [ 563 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Response_Data: 915 65880 [ 0 915 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Response_Control: 756 6048 [ 0 756 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Control: 917 7336 [ 917 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Response_Data: 874 62928 [ 0 874 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Response_Control: 1778 14224 [ 0 920 858 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Writeback_Data: 1235 88920 [ 722 513 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Writeback_Control: 34 272 [ 34 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_2_Control: 874 6992 [ 874 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_2_Response_Data: 786 56592 [ 0 786 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_2_Response_Control: 84 672 [ 0 84 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 Cache Stats: system.l1_cntrl0.L1IcacheMemory
   system.l1_cntrl0.L1IcacheMemory_total_misses: 56
@@ -173,39 +173,39 @@ Cache Stats: system.l1_cntrl0.L1IcacheMemory
   system.l1_cntrl0.L1IcacheMemory_access_mode_type_Supervisor:   56    100%
 
 Cache Stats: system.l1_cntrl0.L1DcacheMemory
-  system.l1_cntrl0.L1DcacheMemory_total_misses: 842
-  system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 842
+  system.l1_cntrl0.L1DcacheMemory_total_misses: 861
+  system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 861
   system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl0.L1DcacheMemory_request_type_LD:   4.86936%
-  system.l1_cntrl0.L1DcacheMemory_request_type_ST:   95.1306%
+  system.l1_cntrl0.L1DcacheMemory_request_type_LD:   4.87805%
+  system.l1_cntrl0.L1DcacheMemory_request_type_ST:   95.122%
 
-  system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor:   842    100%
+  system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor:   861    100%
 
  --- L1Cache ---
  - Event Counts -
-Load [45 ] 45
-Ifetch [62 ] 62
-Store [879 ] 879
-Inv [549 ] 549
-L1_Replacement [10481 ] 10481
+Load [44 ] 44
+Ifetch [67 ] 67
+Store [898 ] 898
+Inv [563 ] 563
+L1_Replacement [10398 ] 10398
 Fwd_GETX [0 ] 0
 Fwd_GETS [0 ] 0
 Fwd_GET_INSTR [0 ] 0
 Data [0 ] 0
-Data_Exclusive [40 ] 40
+Data_Exclusive [41 ] 41
 DataS_fromL1 [0 ] 0
-Data_all_Acks [857 ] 857
+Data_all_Acks [874 ] 874
 Ack [0 ] 0
-Ack_all [0 ] 0
-WB_Ack [740 ] 740
+Ack_all [1 ] 1
+WB_Ack [755 ] 755
 
  - Transitions -
-NP  Load [41 ] 41
+NP  Load [42 ] 42
 NP  Ifetch [56 ] 56
-NP  Store [801 ] 801
+NP  Store [818 ] 818
 NP  Inv [1 ] 1
 NP  L1_Replacement [0 ] 0
 
@@ -213,28 +213,28 @@ I  Load [0 ] 0
 I  Ifetch [0 ] 0
 I  Store [0 ] 0
 I  Inv [0 ] 0
-I  L1_Replacement [146 ] 146
+I  L1_Replacement [145 ] 145
 
 S  Load [0 ] 0
 S  Ifetch [0 ] 0
-S  Store [0 ] 0
-S  Inv [27 ] 27
-S  L1_Replacement [7 ] 7
+S  Store [1 ] 1
+S  Inv [31 ] 31
+S  L1_Replacement [11 ] 11
 
 E  Load [0 ] 0
 E  Ifetch [0 ] 0
-E  Store [1 ] 1
-E  Inv [2 ] 2
-E  L1_Replacement [36 ] 36
+E  Store [2 ] 2
+E  Inv [4 ] 4
+E  L1_Replacement [34 ] 34
 E  Fwd_GETX [0 ] 0
 E  Fwd_GETS [0 ] 0
 E  Fwd_GET_INSTR [0 ] 0
 
-M  Load [4 ] 4
+M  Load [2 ] 2
 M  Ifetch [0 ] 0
 M  Store [77 ] 77
 M  Inv [97 ] 97
-M  L1_Replacement [704 ] 704
+M  L1_Replacement [722 ] 722
 M  Fwd_GETX [0 ] 0
 M  Fwd_GETS [0 ] 0
 M  Fwd_GET_INSTR [0 ] 0
@@ -242,19 +242,19 @@ M  Fwd_GET_INSTR [0 ] 0
 IS  Load [0 ] 0
 IS  Ifetch [0 ] 0
 IS  Store [0 ] 0
-IS  Inv [22 ] 22
-IS  L1_Replacement [508 ] 508
-IS  Data_Exclusive [40 ] 40
+IS  Inv [14 ] 14
+IS  L1_Replacement [374 ] 374
+IS  Data_Exclusive [41 ] 41
 IS  DataS_fromL1 [0 ] 0
-IS  Data_all_Acks [34 ] 34
+IS  Data_all_Acks [43 ] 43
 
 IM  Load [0 ] 0
 IM  Ifetch [0 ] 0
 IM  Store [0 ] 0
 IM  Inv [0 ] 0
-IM  L1_Replacement [9080 ] 9080
+IM  L1_Replacement [9112 ] 9112
 IM  Data [0 ] 0
-IM  Data_all_Acks [801 ] 801
+IM  Data_all_Acks [817 ] 817
 IM  Ack [0 ] 0
 
 SM  Load [0 ] 0
@@ -263,7 +263,7 @@ SM  Store [0 ] 0
 SM  Inv [0 ] 0
 SM  L1_Replacement [0 ] 0
 SM  Ack [0 ] 0
-SM  Ack_all [0 ] 0
+SM  Ack_all [1 ] 1
 
 IS_I  Load [0 ] 0
 IS_I  Ifetch [0 ] 0
@@ -272,12 +272,12 @@ IS_I  Inv [0 ] 0
 IS_I  L1_Replacement [0 ] 0
 IS_I  Data_Exclusive [0 ] 0
 IS_I  DataS_fromL1 [0 ] 0
-IS_I  Data_all_Acks [22 ] 22
+IS_I  Data_all_Acks [14 ] 14
 
 M_I  Load [0 ] 0
-M_I  Ifetch [6 ] 6
+M_I  Ifetch [10 ] 10
 M_I  Store [0 ] 0
-M_I  Inv [400 ] 400
+M_I  Inv [416 ] 416
 M_I  L1_Replacement [0 ] 0
 M_I  Fwd_GETX [0 ] 0
 M_I  Fwd_GETS [0 ] 0
@@ -285,73 +285,73 @@ M_I  Fwd_GET_INSTR [0 ] 0
 M_I  WB_Ack [340 ] 340
 
 SINK_WB_ACK  Load [0 ] 0
-SINK_WB_ACK  Ifetch [0 ] 0
+SINK_WB_ACK  Ifetch [1 ] 1
 SINK_WB_ACK  Store [0 ] 0
 SINK_WB_ACK  Inv [0 ] 0
 SINK_WB_ACK  L1_Replacement [0 ] 0
-SINK_WB_ACK  WB_Ack [400 ] 400
+SINK_WB_ACK  WB_Ack [415 ] 415
 
 Cache Stats: system.l2_cntrl0.L2cacheMemory
-  system.l2_cntrl0.L2cacheMemory_total_misses: 862
-  system.l2_cntrl0.L2cacheMemory_total_demand_misses: 862
+  system.l2_cntrl0.L2cacheMemory_total_misses: 874
+  system.l2_cntrl0.L2cacheMemory_total_demand_misses: 874
   system.l2_cntrl0.L2cacheMemory_total_prefetches: 0
   system.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0
   system.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0
 
-  system.l2_cntrl0.L2cacheMemory_request_type_GETS:   4.75638%
-  system.l2_cntrl0.L2cacheMemory_request_type_GET_INSTR:   5.80046%
-  system.l2_cntrl0.L2cacheMemory_request_type_GETX:   89.4432%
+  system.l2_cntrl0.L2cacheMemory_request_type_GETS:   4.69108%
+  system.l2_cntrl0.L2cacheMemory_request_type_GET_INSTR:   5.26316%
+  system.l2_cntrl0.L2cacheMemory_request_type_GETX:   90.0458%
 
-  system.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor:   862    100%
+  system.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor:   874    100%
 
  --- L2Cache ---
  - Event Counts -
 L1_GET_INSTR [56 ] 56
-L1_GETS [41 ] 41
-L1_GETX [801 ] 801
-L1_UPGRADE [0 ] 0
-L1_PUTX [349 ] 349
-L1_PUTX_old [757 ] 757
+L1_GETS [42 ] 42
+L1_GETX [818 ] 818
+L1_UPGRADE [1 ] 1
+L1_PUTX [345 ] 345
+L1_PUTX_old [796 ] 796
 Fwd_L1_GETX [0 ] 0
 Fwd_L1_GETS [0 ] 0
 Fwd_L1_GET_INSTR [0 ] 0
-L2_Replacement [297 ] 297
-L2_Replacement_clean [1183 ] 1183
-Mem_Data [861 ] 861
-Mem_Ack [856 ] 856
-WB_Data [473 ] 473
-WB_Data_clean [24 ] 24
+L2_Replacement [291 ] 291
+L2_Replacement_clean [1216 ] 1216
+Mem_Data [873 ] 873
+Mem_Ack [869 ] 869
+WB_Data [495 ] 495
+WB_Data_clean [18 ] 18
 Ack [0 ] 0
-Ack_all [52 ] 52
+Ack_all [50 ] 50
 Unblock [0 ] 0
 Unblock_Cancel [0 ] 0
-Exclusive_Unblock [840 ] 840
+Exclusive_Unblock [858 ] 858
 MEM_Inv [0 ] 0
 
  - Transitions -
-NP  L1_GET_INSTR [50 ] 50
+NP  L1_GET_INSTR [46 ] 46
 NP  L1_GETS [41 ] 41
-NP  L1_GETX [771 ] 771
+NP  L1_GETX [787 ] 787
 NP  L1_PUTX [0 ] 0
-NP  L1_PUTX_old [264 ] 264
+NP  L1_PUTX_old [302 ] 302
 
 SS  L1_GET_INSTR [0 ] 0
-SS  L1_GETS [0 ] 0
-SS  L1_GETX [6 ] 6
-SS  L1_UPGRADE [0 ] 0
+SS  L1_GETS [1 ] 1
+SS  L1_GETX [9 ] 9
+SS  L1_UPGRADE [1 ] 1
 SS  L1_PUTX [0 ] 0
 SS  L1_PUTX_old [0 ] 0
 SS  L2_Replacement [0 ] 0
-SS  L2_Replacement_clean [50 ] 50
+SS  L2_Replacement_clean [46 ] 46
 SS  MEM_Inv [0 ] 0
 
-M  L1_GET_INSTR [6 ] 6
+M  L1_GET_INSTR [10 ] 10
 M  L1_GETS [0 ] 0
-M  L1_GETX [24 ] 24
+M  L1_GETX [22 ] 22
 M  L1_PUTX [0 ] 0
 M  L1_PUTX_old [0 ] 0
-M  L2_Replacement [297 ] 297
-M  L2_Replacement_clean [12 ] 12
+M  L2_Replacement [291 ] 291
+M  L2_Replacement_clean [16 ] 16
 M  MEM_Inv [0 ] 0
 
 MT  L1_GET_INSTR [0 ] 0
@@ -360,7 +360,7 @@ MT  L1_GETX [0 ] 0
 MT  L1_PUTX [340 ] 340
 MT  L1_PUTX_old [0 ] 0
 MT  L2_Replacement [0 ] 0
-MT  L2_Replacement_clean [499 ] 499
+MT  L2_Replacement_clean [517 ] 517
 MT  MEM_Inv [0 ] 0
 
 M_I  L1_GET_INSTR [0 ] 0
@@ -368,8 +368,8 @@ M_I  L1_GETS [0 ] 0
 M_I  L1_GETX [0 ] 0
 M_I  L1_UPGRADE [0 ] 0
 M_I  L1_PUTX [0 ] 0
-M_I  L1_PUTX_old [136 ] 136
-M_I  Mem_Ack [856 ] 856
+M_I  L1_PUTX_old [113 ] 113
+M_I  Mem_Ack [869 ] 869
 M_I  MEM_Inv [0 ] 0
 
 MT_I  L1_GET_INSTR [0 ] 0
@@ -388,10 +388,10 @@ MCT_I  L1_GETS [0 ] 0
 MCT_I  L1_GETX [0 ] 0
 MCT_I  L1_UPGRADE [0 ] 0
 MCT_I  L1_PUTX [0 ] 0
-MCT_I  L1_PUTX_old [181 ] 181
-MCT_I  WB_Data [473 ] 473
-MCT_I  WB_Data_clean [24 ] 24
-MCT_I  Ack_all [2 ] 2
+MCT_I  L1_PUTX_old [210 ] 210
+MCT_I  WB_Data [495 ] 495
+MCT_I  WB_Data_clean [18 ] 18
+MCT_I  Ack_all [4 ] 4
 
 I_I  L1_GET_INSTR [0 ] 0
 I_I  L1_GETS [0 ] 0
@@ -400,7 +400,7 @@ I_I  L1_UPGRADE [0 ] 0
 I_I  L1_PUTX [0 ] 0
 I_I  L1_PUTX_old [0 ] 0
 I_I  Ack [0 ] 0
-I_I  Ack_all [50 ] 50
+I_I  Ack_all [46 ] 46
 
 S_I  L1_GET_INSTR [0 ] 0
 S_I  L1_GETS [0 ] 0
@@ -418,8 +418,8 @@ ISS  L1_GETX [0 ] 0
 ISS  L1_PUTX [0 ] 0
 ISS  L1_PUTX_old [0 ] 0
 ISS  L2_Replacement [0 ] 0
-ISS  L2_Replacement_clean [14 ] 14
-ISS  Mem_Data [40 ] 40
+ISS  L2_Replacement_clean [11 ] 11
+ISS  Mem_Data [41 ] 41
 ISS  MEM_Inv [0 ] 0
 
 IS  L1_GET_INSTR [0 ] 0
@@ -428,8 +428,8 @@ IS  L1_GETX [0 ] 0
 IS  L1_PUTX [0 ] 0
 IS  L1_PUTX_old [0 ] 0
 IS  L2_Replacement [0 ] 0
-IS  L2_Replacement_clean [69 ] 69
-IS  Mem_Data [50 ] 50
+IS  L2_Replacement_clean [57 ] 57
+IS  Mem_Data [46 ] 46
 IS  MEM_Inv [0 ] 0
 
 IM  L1_GET_INSTR [0 ] 0
@@ -438,8 +438,8 @@ IM  L1_GETX [0 ] 0
 IM  L1_PUTX [0 ] 0
 IM  L1_PUTX_old [0 ] 0
 IM  L2_Replacement [0 ] 0
-IM  L2_Replacement_clean [225 ] 225
-IM  Mem_Data [771 ] 771
+IM  L2_Replacement_clean [219 ] 219
+IM  Mem_Data [786 ] 786
 IM  MEM_Inv [0 ] 0
 
 SS_MB  L1_GET_INSTR [0 ] 0
@@ -451,19 +451,19 @@ SS_MB  L1_PUTX_old [0 ] 0
 SS_MB  L2_Replacement [0 ] 0
 SS_MB  L2_Replacement_clean [0 ] 0
 SS_MB  Unblock_Cancel [0 ] 0
-SS_MB  Exclusive_Unblock [6 ] 6
+SS_MB  Exclusive_Unblock [10 ] 10
 SS_MB  MEM_Inv [0 ] 0
 
 MT_MB  L1_GET_INSTR [0 ] 0
 MT_MB  L1_GETS [0 ] 0
 MT_MB  L1_GETX [0 ] 0
 MT_MB  L1_UPGRADE [0 ] 0
-MT_MB  L1_PUTX [9 ] 9
-MT_MB  L1_PUTX_old [176 ] 176
+MT_MB  L1_PUTX [5 ] 5
+MT_MB  L1_PUTX_old [171 ] 171
 MT_MB  L2_Replacement [0 ] 0
-MT_MB  L2_Replacement_clean [314 ] 314
+MT_MB  L2_Replacement_clean [350 ] 350
 MT_MB  Unblock_Cancel [0 ] 0
-MT_MB  Exclusive_Unblock [834 ] 834
+MT_MB  Exclusive_Unblock [848 ] 848
 MT_MB  MEM_Inv [0 ] 0
 
 M_MB  L1_GET_INSTR [0 ] 0
@@ -515,37 +515,37 @@ MT_SB  Unblock [0 ] 0
 MT_SB  MEM_Inv [0 ] 0
 
 Memory controller: system.dir_cntrl0.memBuffer:
-  memory_total_requests: 1632
-  memory_reads: 861
-  memory_writes: 770
-  memory_refreshes: 729
-  memory_total_request_delays: 1043
-  memory_delays_per_request: 0.639093
-  memory_delays_in_input_queue: 147
-  memory_delays_behind_head_of_bank_queue: 0
-  memory_delays_stalled_at_head_of_bank_queue: 896
-  memory_stalls_for_bank_busy: 170
+  memory_total_requests: 1660
+  memory_reads: 874
+  memory_writes: 786
+  memory_refreshes: 2210
+  memory_total_request_delays: 601
+  memory_delays_per_request: 0.362048
+  memory_delays_in_input_queue: 44
+  memory_delays_behind_head_of_bank_queue: 2
+  memory_delays_stalled_at_head_of_bank_queue: 555
+  memory_stalls_for_bank_busy: 169
   memory_stalls_for_random_busy: 0
   memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 70
-  memory_stalls_for_bus: 355
+  memory_stalls_for_arbitration: 30
+  memory_stalls_for_bus: 188
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 230
-  memory_stalls_for_read_read_turnaround: 71
-  accesses_per_bank: 59  40  48  77  75  69  65  47  55  56  48  54  65  48  34  60  44  35  56  37  49  41  46  49  50  48  50  47  58  40  41  41  
+  memory_stalls_for_read_write_turnaround: 104
+  memory_stalls_for_read_read_turnaround: 64
+  accesses_per_bank: 42  51  50  73  73  71  65  49  54  41  50  44  58  48  47  63  57  47  58  57  41  49  46  49  57  45  42  49  45  53  48  38  
 
  --- Directory ---
  - Event Counts -
-Fetch [862 ] 862
-Data [770 ] 770
-Memory_Data [861 ] 861
-Memory_Ack [770 ] 770
+Fetch [874 ] 874
+Data [786 ] 786
+Memory_Data [874 ] 874
+Memory_Ack [786 ] 786
 DMA_READ [0 ] 0
 DMA_WRITE [0 ] 0
-CleanReplacement [88 ] 88
+CleanReplacement [84 ] 84
 
  - Transitions -
-I  Fetch [862 ] 862
+I  Fetch [874 ] 874
 I  DMA_READ [0 ] 0
 I  DMA_WRITE [0 ] 0
 
@@ -561,20 +561,20 @@ ID_W  Memory_Ack [0 ] 0
 ID_W  DMA_READ [0 ] 0
 ID_W  DMA_WRITE [0 ] 0
 
-M  Data [770 ] 770
+M  Data [786 ] 786
 M  DMA_READ [0 ] 0
 M  DMA_WRITE [0 ] 0
-M  CleanReplacement [88 ] 88
+M  CleanReplacement [84 ] 84
 
 IM  Fetch [0 ] 0
 IM  Data [0 ] 0
-IM  Memory_Data [861 ] 861
+IM  Memory_Data [874 ] 874
 IM  DMA_READ [0 ] 0
 IM  DMA_WRITE [0 ] 0
 
 MI  Fetch [0 ] 0
 MI  Data [0 ] 0
-MI  Memory_Ack [770 ] 770
+MI  Memory_Ack [786 ] 786
 MI  DMA_READ [0 ] 0
 MI  DMA_WRITE [0 ] 0
 

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout
index d145eb7c5014cc26e0201fe3c7640c53f4db129c..fddb193cf819b71189a99b60a8ef68ad153eb230 100755 (executable)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout
@@ -1,10 +1,12 @@
+Redirecting stdout to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 28 2012 11:30:15
-gem5 started Jul 28 2012 11:35:50
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 14:01:54
+gem5 started Sep  1 2012 14:05:06
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MESI_CMP_directory/gem5.opt -d build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 349711 because Ruby Tester completed
+Exiting @ tick 318321 because Ruby Tester completed

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt
index 7224a1c96d784658f688cd750f1430c6e0bc102a..618fbf540a963c6a06eff063736006613865a477 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt
@@ -1,12 +1,12 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000350                       # Number of seconds simulated
-sim_ticks                                      349711                       # Number of ticks simulated
-final_tick                                     349711                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.000318                       # Number of seconds simulated
+sim_ticks                                      318321                       # Number of ticks simulated
+final_tick                                     318321                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_tick_rate                                2474351                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 229272                       # Number of bytes of host memory used
-host_seconds                                     0.14                       # Real time elapsed on the host
+host_tick_rate                                1505639                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 260768                       # Number of bytes of host memory used
+host_seconds                                     0.21                       # Real time elapsed on the host
 system.l1_cntrl0.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl0.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini
index dc2ecd66a6860aaf8693fcdc792bf724b2a4016f..783db058fd21dd9f759b890d98c14808fa35e0bf 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby sys_port_proxy tester
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -56,9 +57,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -67,6 +68,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -118,6 +120,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -161,6 +164,7 @@ tagArrayBanks=1
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -285,6 +289,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true
@@ -298,6 +303,7 @@ slave=system.system_port
 type=RubyTester
 check_flush=false
 checks_to_complete=100
+clock=1
 deadlock_threshold=50000
 num_cpus=1
 system=system

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats
index 5feac2c34e69e55cb75698d00bbc2aa37102935d..19907d57891d9e5b1ddfaa6c68bebb53fdfbfc64 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats
@@ -1,26 +1,26 @@
-Real time: Jul/10/2012 17:44:41
+Real time: Sep/01/2012 14:14:50
 
 Profiler Stats
 --------------
-Elapsed_time_in_seconds: 0
-Elapsed_time_in_minutes: 0
-Elapsed_time_in_hours: 0
-Elapsed_time_in_days: 0
+Elapsed_time_in_seconds: 1
+Elapsed_time_in_minutes: 0.0166667
+Elapsed_time_in_hours: 0.000277778
+Elapsed_time_in_days: 1.15741e-05
 
-Virtual_time_in_seconds: 1.08
-Virtual_time_in_minutes: 0.018
-Virtual_time_in_hours:   0.0003
-Virtual_time_in_days:    1.25e-05
+Virtual_time_in_seconds: 0.83
+Virtual_time_in_minutes: 0.0138333
+Virtual_time_in_hours:   0.000230556
+Virtual_time_in_days:    9.60648e-06
 
-Ruby_current_time: 357561
+Ruby_current_time: 316521
 Ruby_start_time: 0
-Ruby_cycles: 357561
+Ruby_cycles: 316521
 
-mbytes_resident: 41.8789
-mbytes_total: 225.645
-resident_ratio: 0.185631
+mbytes_resident: 44.0977
+mbytes_total: 254.852
+resident_ratio: 0.173094
 
-ruby_cycles_executed: [ 357562 ]
+ruby_cycles_executed: [ 316522 ]
 
 Busy Controller Counts:
 L2Cache-0:0  
@@ -30,15 +30,15 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 16 count: 959 average: 15.8321 | standard deviation: 1.14411 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 42 903 ]
+sequencer_requests_outstanding: [binsize: 1 max: 16 count: 977 average: 15.825 | standard deviation: 1.13712 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 52 911 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 256 max: 35755 count: 944 average: 5943.47 | standard deviation: 8648.87 | 80 45 92 101 84 54 37 40 29 42 18 14 12 10 11 11 4 10 2 6 6 0 1 3 5 3 4 3 0 5 2 1 4 4 1 1 1 1 2 2 2 0 1 1 1 0 1 1 0 0 0 0 0 0 0 1 2 1 0 1 1 1 2 1 5 5 2 1 1 4 1 8 4 3 6 6 6 2 4 10 4 6 2 5 3 3 3 1 4 5 3 3 4 4 1 3 0 2 2 0 6 4 3 1 1 0 1 2 5 0 2 1 1 2 0 0 3 2 0 3 2 1 2 0 1 1 1 1 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_LD: [binsize: 256 max: 32625 count: 44 average: 6010.95 | standard deviation: 9060.42 | 5 4 0 9 2 5 2 0 2 2 0 1 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 1 0 1 1 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST: [binsize: 256 max: 35755 count: 844 average: 6286.24 | standard deviation: 8806.66 | 73 32 69 78 75 48 35 40 27 40 18 13 12 10 11 11 4 8 2 6 6 0 1 3 5 3 4 3 0 5 2 1 4 4 1 1 1 1 2 2 2 0 1 1 1 0 1 1 0 0 0 0 0 0 0 1 2 1 0 1 1 1 2 1 5 4 2 1 1 4 1 8 3 3 5 6 6 2 4 9 4 6 2 4 3 2 2 1 4 5 3 3 2 4 1 3 0 2 2 0 6 4 3 1 1 0 1 2 5 0 2 1 1 2 0 0 3 2 0 3 2 1 2 0 1 1 1 0 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH: [binsize: 8 max: 1342 count: 56 average: 724.5 | standard deviation: 266.653 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 2 1 0 0 1 1 0 0 0 0 2 2 4 1 0 0 1 1 0 0 1 1 0 0 2 1 1 1 0 0 0 1 0 1 1 0 0 1 0 0 0 1 1 0 0 1 0 0 0 0 1 1 3 1 1 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 2 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
-miss_latency_NULL: [binsize: 256 max: 35755 count: 944 average: 5943.47 | standard deviation: 8648.87 | 80 45 92 101 84 54 37 40 29 42 18 14 12 10 11 11 4 10 2 6 6 0 1 3 5 3 4 3 0 5 2 1 4 4 1 1 1 1 2 2 2 0 1 1 1 0 1 1 0 0 0 0 0 0 0 1 2 1 0 1 1 1 2 1 5 5 2 1 1 4 1 8 4 3 6 6 6 2 4 10 4 6 2 5 3 3 3 1 4 5 3 3 4 4 1 3 0 2 2 0 6 4 3 1 1 0 1 2 5 0 2 1 1 2 0 0 3 2 0 3 2 1 2 0 1 1 1 1 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency: [binsize: 256 max: 34293 count: 962 average: 5083.18 | standard deviation: 7651.66 | 97 58 107 114 62 59 47 32 38 24 25 15 18 13 6 9 6 5 2 4 5 3 3 2 2 2 1 0 0 2 2 2 1 2 3 1 2 2 1 2 0 0 2 1 1 2 3 0 3 2 1 0 2 1 2 5 3 4 3 2 3 2 2 4 3 3 10 3 2 5 4 1 8 2 6 4 5 4 4 2 1 1 2 4 3 2 4 0 2 1 6 0 3 3 1 1 1 3 6 1 1 0 1 2 0 0 0 1 1 1 0 1 6 1 1 1 1 0 0 0 0 1 0 1 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD: [binsize: 128 max: 25205 count: 44 average: 5768.3 | standard deviation: 8418.68 | 7 0 1 1 0 0 6 2 3 1 0 0 2 3 0 1 0 0 2 0 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 2 ]
+miss_latency_ST: [binsize: 256 max: 34293 count: 862 average: 5340.56 | standard deviation: 7771.5 | 84 40 83 99 56 58 42 31 38 22 24 14 17 12 6 9 6 5 2 4 5 3 3 2 2 2 1 0 0 2 2 2 1 2 2 1 2 2 1 2 0 0 2 1 1 2 3 0 3 2 1 0 2 1 2 5 3 4 3 2 1 1 2 4 3 3 10 3 2 5 4 1 7 2 6 4 5 4 3 2 1 1 2 4 3 2 3 0 2 1 5 0 3 3 1 0 1 3 4 1 1 0 1 2 0 0 0 1 1 1 0 1 6 1 1 1 1 0 0 0 0 1 0 1 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_IFETCH: [binsize: 8 max: 1374 count: 56 average: 583.107 | standard deviation: 267.301 | 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 1 0 0 1 1 2 0 0 0 0 0 1 0 1 0 0 2 1 1 1 0 2 0 1 0 1 0 0 0 2 0 0 1 0 0 0 0 1 1 0 0 1 1 3 3 1 2 2 1 0 1 0 0 0 0 0 2 1 1 0 0 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 ]
+miss_latency_NULL: [binsize: 256 max: 34293 count: 962 average: 5083.18 | standard deviation: 7651.66 | 97 58 107 114 62 59 47 32 38 24 25 15 18 13 6 9 6 5 2 4 5 3 3 2 2 2 1 0 0 2 2 2 1 2 3 1 2 2 1 2 0 0 2 1 1 2 3 0 3 2 1 0 2 1 2 5 3 4 3 2 3 2 2 4 3 3 10 3 2 5 4 1 8 2 6 4 5 4 4 2 1 1 2 4 3 2 4 0 2 1 6 0 3 3 1 1 1 3 6 1 1 0 1 2 0 0 0 1 1 1 0 1 6 1 1 1 1 0 0 0 0 1 0 1 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -49,9 +49,9 @@ miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: N
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 imcomplete_dir_Times: 0
-miss_latency_LD_NULL: [binsize: 256 max: 32625 count: 44 average: 6010.95 | standard deviation: 9060.42 | 5 4 0 9 2 5 2 0 2 2 0 1 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 1 0 1 1 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_NULL: [binsize: 256 max: 35755 count: 844 average: 6286.24 | standard deviation: 8806.66 | 73 32 69 78 75 48 35 40 27 40 18 13 12 10 11 11 4 8 2 6 6 0 1 3 5 3 4 3 0 5 2 1 4 4 1 1 1 1 2 2 2 0 1 1 1 0 1 1 0 0 0 0 0 0 0 1 2 1 0 1 1 1 2 1 5 4 2 1 1 4 1 8 3 3 5 6 6 2 4 9 4 6 2 4 3 2 2 1 4 5 3 3 2 4 1 3 0 2 2 0 6 4 3 1 1 0 1 2 5 0 2 1 1 2 0 0 3 2 0 3 2 1 2 0 1 1 1 0 0 2 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_IFETCH_NULL: [binsize: 8 max: 1342 count: 56 average: 724.5 | standard deviation: 266.653 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 2 1 0 0 1 1 0 0 0 0 2 2 4 1 0 0 1 1 0 0 1 1 0 0 2 1 1 1 0 0 0 1 0 1 1 0 0 1 0 0 0 1 1 0 0 1 0 0 0 0 1 1 3 1 1 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 2 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_LD_NULL: [binsize: 128 max: 25205 count: 44 average: 5768.3 | standard deviation: 8418.68 | 7 0 1 1 0 0 6 2 3 1 0 0 2 3 0 1 0 0 2 0 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 2 ]
+miss_latency_ST_NULL: [binsize: 256 max: 34293 count: 862 average: 5340.56 | standard deviation: 7771.5 | 84 40 83 99 56 58 42 31 38 22 24 14 17 12 6 9 6 5 2 4 5 3 3 2 2 2 1 0 0 2 2 2 1 2 2 1 2 2 1 2 0 0 2 1 1 2 3 0 3 2 1 0 2 1 2 5 3 4 3 2 1 1 2 4 3 3 10 3 2 5 4 1 7 2 6 4 5 4 3 2 1 1 2 4 3 2 3 0 2 1 5 0 3 3 1 0 1 3 4 1 1 0 1 2 0 0 0 1 1 1 0 1 6 1 1 1 1 0 0 0 0 1 0 1 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_IFETCH_NULL: [binsize: 8 max: 1374 count: 56 average: 583.107 | standard deviation: 267.301 | 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 1 0 0 1 1 2 0 0 0 0 0 1 0 1 0 0 2 1 1 1 0 2 0 1 0 1 0 0 0 2 0 0 1 0 0 0 0 1 1 0 0 1 1 3 3 1 2 2 1 0 1 0 0 0 0 0 2 1 1 0 0 0 0 1 0 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -81,89 +81,89 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard dev
 Resource Usage
 --------------
 page_size: 4096
-user_time: 1
+user_time: 0
 system_time: 0
-page_reclaims: 11882
+page_reclaims: 8272
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 80
 
 Network Stats
 -------------
 
-total_msg_count_Request_Control: 5082 40656
-total_msg_count_Response_Data: 4932 355104
-total_msg_count_ResponseL2hit_Data: 138 9936
-total_msg_count_Writeback_Data: 4785 344520
-total_msg_count_Writeback_Control: 10307 82456
-total_msg_count_Unblock_Control: 5058 40464
-total_msgs: 30302 total_bytes: 873136
+total_msg_count_Request_Control: 5112 40896
+total_msg_count_Response_Data: 4992 359424
+total_msg_count_ResponseL2hit_Data: 120 8640
+total_msg_count_Writeback_Data: 4839 348408
+total_msg_count_Writeback_Control: 10370 82960
+total_msg_count_Unblock_Control: 5107 40856
+total_msgs: 30540 total_bytes: 881184
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 2.54369
-  links_utilized_percent_switch_0_link_0: 2.59676 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 2.49062 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_0_link_0_Request_Control: 870 6960 [ 870 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Writeback_Data: 862 62064 [ 0 0 862 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Writeback_Control: 1678 13424 [ 865 813 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Unblock_Control: 866 6928 [ 0 0 866 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Request_Control: 824 6592 [ 0 824 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_ResponseL2hit_Data: 46 3312 [ 0 0 46 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Data: 733 52776 [ 0 0 733 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Control: 1758 14064 [ 865 813 80 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Unblock_Control: 820 6560 [ 0 0 820 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_0: 2.89997
+  links_utilized_percent_switch_0_link_0: 2.95778 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 2.84215 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_0_link_0_Request_Control: 872 6976 [ 872 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Writeback_Data: 867 62424 [ 0 0 867 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Writeback_Control: 1690 13520 [ 867 823 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Unblock_Control: 871 6968 [ 0 0 871 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Request_Control: 832 6656 [ 0 832 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_ResponseL2hit_Data: 40 2880 [ 0 0 40 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Data: 746 53712 [ 0 0 746 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Control: 1767 14136 [ 867 824 76 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Unblock_Control: 831 6648 [ 0 0 831 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 1.33089
-  links_utilized_percent_switch_1_link_0: 1.21322 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 1.44856 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_1_link_0_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_ResponseL2hit_Data: 46 3312 [ 0 0 46 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Writeback_Control: 864 6912 [ 864 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Request_Control: 870 6960 [ 870 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Writeback_Data: 862 62064 [ 0 0 862 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Writeback_Control: 865 6920 [ 865 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Unblock_Control: 866 6928 [ 0 0 866 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_1: 1.51096
+  links_utilized_percent_switch_1_link_0: 1.37669 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 1.64523 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_1_link_0_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_ResponseL2hit_Data: 40 2880 [ 0 0 40 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Writeback_Control: 867 6936 [ 867 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Request_Control: 872 6976 [ 872 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Data: 867 62424 [ 0 0 867 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Control: 868 6944 [ 868 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Unblock_Control: 872 6976 [ 0 0 872 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 1.21273
-  links_utilized_percent_switch_2_link_0: 1.27726 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 1.1482 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 1.38901
+  links_utilized_percent_switch_2_link_0: 1.46515 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 1.31287 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_2_link_0_Request_Control: 824 6592 [ 0 824 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Writeback_Data: 733 52776 [ 0 0 733 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Writeback_Control: 893 7144 [ 0 813 80 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Unblock_Control: 820 6560 [ 0 0 820 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Writeback_Control: 813 6504 [ 0 813 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Request_Control: 832 6656 [ 0 832 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Writeback_Data: 746 53712 [ 0 0 746 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Writeback_Control: 899 7192 [ 0 823 76 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Unblock_Control: 830 6640 [ 0 0 830 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Writeback_Control: 823 6584 [ 0 823 0 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_3_inlinks: 3
 switch_3_outlinks: 3
-links_utilized_percent_switch_3: 1.69579
-  links_utilized_percent_switch_3_link_0: 2.59676 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_1: 1.21336 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_3_link_2: 1.27726 bw: 16000 base_latency: 1
-
-  outgoing_messages_switch_3_link_0_Request_Control: 870 6960 [ 870 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Writeback_Data: 862 62064 [ 0 0 862 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Writeback_Control: 1678 13424 [ 865 813 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_0_Unblock_Control: 866 6928 [ 0 0 866 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Response_Data: 822 59184 [ 0 0 822 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_ResponseL2hit_Data: 46 3312 [ 0 0 46 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_1_Writeback_Control: 865 6920 [ 865 0 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_2_Request_Control: 824 6592 [ 0 824 0 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_2_Writeback_Data: 733 52776 [ 0 0 733 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_2_Writeback_Control: 893 7144 [ 0 813 80 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_3_link_2_Unblock_Control: 820 6560 [ 0 0 820 0 0 0 0 0 0 0 ] base_latency: 1
+links_utilized_percent_switch_3: 1.93331
+  links_utilized_percent_switch_3_link_0: 2.95794 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_1: 1.37669 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_3_link_2: 1.46531 bw: 16000 base_latency: 1
+
+  outgoing_messages_switch_3_link_0_Request_Control: 872 6976 [ 872 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Writeback_Data: 867 62424 [ 0 0 867 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Writeback_Control: 1690 13520 [ 867 823 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_0_Unblock_Control: 872 6976 [ 0 0 872 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Response_Data: 832 59904 [ 0 0 832 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_ResponseL2hit_Data: 40 2880 [ 0 0 40 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_1_Writeback_Control: 867 6936 [ 867 0 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_2_Request_Control: 832 6656 [ 0 832 0 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_2_Writeback_Data: 746 53712 [ 0 0 746 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_2_Writeback_Control: 899 7192 [ 0 823 76 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_3_link_2_Unblock_Control: 831 6648 [ 0 0 831 0 0 0 0 0 0 0 ] base_latency: 1
 
 Cache Stats: system.l1_cntrl0.L1IcacheMemory
   system.l1_cntrl0.L1IcacheMemory_total_misses: 0
@@ -183,10 +183,10 @@ Cache Stats: system.l1_cntrl0.L1DcacheMemory
 
  --- L1Cache ---
  - Event Counts -
-Load [47 ] 47
-Ifetch [318 ] 318
-Store [964 ] 964
-L1_Replacement [506921 ] 506921
+Load [44 ] 44
+Ifetch [204 ] 204
+Store [1039 ] 1039
+L1_Replacement [449881 ] 449881
 Own_GETX [0 ] 0
 Fwd_GETX [0 ] 0
 Fwd_GETS [0 ] 0
@@ -194,17 +194,17 @@ Fwd_DMA [0 ] 0
 Inv [0 ] 0
 Ack [0 ] 0
 Data [0 ] 0
-Exclusive_Data [868 ] 868
+Exclusive_Data [872 ] 872
 Writeback_Ack [0 ] 0
-Writeback_Ack_Data [864 ] 864
+Writeback_Ack_Data [867 ] 867
 Writeback_Nack [0 ] 0
-All_acks [772 ] 772
-Use_Timeout [866 ] 866
+All_acks [782 ] 782
+Use_Timeout [870 ] 870
 
  - Transitions -
-I  Load [41 ] 41
-I  Ifetch [56 ] 56
-I  Store [773 ] 773
+I  Load [37 ] 37
+I  Ifetch [53 ] 53
+I  Store [783 ] 783
 I  L1_Replacement [0 ] 0
 I  Inv [0 ] 0
 
@@ -225,28 +225,28 @@ O  Fwd_GETS [0 ] 0
 O  Fwd_DMA [0 ] 0
 
 M  Load [0 ] 0
-M  Ifetch [0 ] 0
+M  Ifetch [3 ] 3
 M  Store [0 ] 0
-M  L1_Replacement [94 ] 94
+M  L1_Replacement [88 ] 88
 M  Fwd_GETX [0 ] 0
 M  Fwd_GETS [0 ] 0
 M  Fwd_DMA [0 ] 0
 
-M_W  Load [1 ] 1
+M_W  Load [0 ] 0
 M_W  Ifetch [0 ] 0
 M_W  Store [0 ] 0
-M_W  L1_Replacement [1321 ] 1321
+M_W  L1_Replacement [1690 ] 1690
 M_W  Own_GETX [0 ] 0
 M_W  Fwd_GETX [0 ] 0
 M_W  Fwd_GETS [0 ] 0
 M_W  Fwd_DMA [0 ] 0
 M_W  Inv [0 ] 0
-M_W  Use_Timeout [94 ] 94
+M_W  Use_Timeout [90 ] 90
 
-MM  Load [2 ] 2
+MM  Load [6 ] 6
 MM  Ifetch [0 ] 0
-MM  Store [66 ] 66
-MM  L1_Replacement [771 ] 771
+MM  Store [74 ] 74
+MM  L1_Replacement [780 ] 780
 MM  Fwd_GETX [0 ] 0
 MM  Fwd_GETS [0 ] 0
 MM  Fwd_DMA [0 ] 0
@@ -254,22 +254,22 @@ MM  Fwd_DMA [0 ] 0
 MM_W  Load [1 ] 1
 MM_W  Ifetch [0 ] 0
 MM_W  Store [6 ] 6
-MM_W  L1_Replacement [28136 ] 28136
+MM_W  L1_Replacement [28210 ] 28210
 MM_W  Own_GETX [0 ] 0
 MM_W  Fwd_GETX [0 ] 0
 MM_W  Fwd_GETS [0 ] 0
 MM_W  Fwd_DMA [0 ] 0
 MM_W  Inv [0 ] 0
-MM_W  Use_Timeout [772 ] 772
+MM_W  Use_Timeout [780 ] 780
 
 IM  Load [0 ] 0
 IM  Ifetch [0 ] 0
 IM  Store [0 ] 0
-IM  L1_Replacement [439219 ] 439219
+IM  L1_Replacement [383229 ] 383229
 IM  Inv [0 ] 0
 IM  Ack [0 ] 0
 IM  Data [0 ] 0
-IM  Exclusive_Data [772 ] 772
+IM  Exclusive_Data [782 ] 782
 
 SM  Load [0 ] 0
 SM  Ifetch [0 ] 0
@@ -285,21 +285,21 @@ SM  Exclusive_Data [0 ] 0
 OM  Load [0 ] 0
 OM  Ifetch [0 ] 0
 OM  Store [0 ] 0
-OM  L1_Replacement [14936 ] 14936
+OM  L1_Replacement [14910 ] 14910
 OM  Own_GETX [0 ] 0
 OM  Fwd_GETX [0 ] 0
 OM  Fwd_GETS [0 ] 0
 OM  Fwd_DMA [0 ] 0
 OM  Ack [0 ] 0
-OM  All_acks [772 ] 772
+OM  All_acks [782 ] 782
 
 IS  Load [0 ] 0
 IS  Ifetch [0 ] 0
 IS  Store [0 ] 0
-IS  L1_Replacement [22444 ] 22444
+IS  L1_Replacement [20974 ] 20974
 IS  Inv [0 ] 0
 IS  Data [0 ] 0
-IS  Exclusive_Data [96 ] 96
+IS  Exclusive_Data [90 ] 90
 
 SI  Load [0 ] 0
 SI  Ifetch [0 ] 0
@@ -323,15 +323,15 @@ OI  Writeback_Ack [0 ] 0
 OI  Writeback_Ack_Data [0 ] 0
 OI  Writeback_Nack [0 ] 0
 
-MI  Load [2 ] 2
-MI  Ifetch [262 ] 262
-MI  Store [119 ] 119
+MI  Load [0 ] 0
+MI  Ifetch [148 ] 148
+MI  Store [176 ] 176
 MI  L1_Replacement [0 ] 0
 MI  Fwd_GETX [0 ] 0
 MI  Fwd_GETS [0 ] 0
 MI  Fwd_DMA [0 ] 0
 MI  Writeback_Ack [0 ] 0
-MI  Writeback_Ack_Data [864 ] 864
+MI  Writeback_Ack_Data [867 ] 867
 MI  Writeback_Nack [0 ] 0
 
 II  Load [0 ] 0
@@ -353,10 +353,10 @@ Cache Stats: system.l2_cntrl0.L2cacheMemory
 
  --- L2Cache ---
  - Event Counts -
-L1_GETS [127 ] 127
-L1_GETX [839 ] 839
+L1_GETS [129 ] 129
+L1_GETX [848 ] 848
 L1_PUTO [0 ] 0
-L1_PUTX [2005 ] 2005
+L1_PUTX [2406 ] 2406
 L1_PUTS_only [0 ] 0
 L1_PUTS [0 ] 0
 Fwd_GETX [0 ] 0
@@ -366,21 +366,21 @@ Own_GETX [0 ] 0
 Inv [0 ] 0
 IntAck [0 ] 0
 ExtAck [0 ] 0
-All_Acks [736 ] 736
-Data [736 ] 736
-Data_Exclusive [86 ] 86
-L1_WBCLEANDATA [84 ] 84
-L1_WBDIRTYDATA [778 ] 778
-Writeback_Ack [813 ] 813
+All_Acks [752 ] 752
+Data [752 ] 752
+Data_Exclusive [80 ] 80
+L1_WBCLEANDATA [79 ] 79
+L1_WBDIRTYDATA [788 ] 788
+Writeback_Ack [823 ] 823
 Writeback_Nack [0 ] 0
 Unblock [0 ] 0
-Exclusive_Unblock [866 ] 866
+Exclusive_Unblock [871 ] 871
 DmaAck [0 ] 0
-L2_Replacement [814 ] 814
+L2_Replacement [824 ] 824
 
  - Transitions -
-NP  L1_GETS [87 ] 87
-NP  L1_GETX [737 ] 737
+NP  L1_GETS [80 ] 80
+NP  L1_GETX [752 ] 752
 NP  L1_PUTO [0 ] 0
 NP  L1_PUTX [0 ] 0
 NP  L1_PUTS [0 ] 0
@@ -406,7 +406,7 @@ ILS  L2_Replacement [0 ] 0
 ILX  L1_GETS [0 ] 0
 ILX  L1_GETX [0 ] 0
 ILX  L1_PUTO [0 ] 0
-ILX  L1_PUTX [865 ] 865
+ILX  L1_PUTX [867 ] 867
 ILX  L1_PUTS_only [0 ] 0
 ILX  L1_PUTS [0 ] 0
 ILX  Fwd_GETX [0 ] 0
@@ -506,14 +506,14 @@ SLS  Inv [0 ] 0
 SLS  L2_Replacement [0 ] 0
 
 M  L1_GETS [10 ] 10
-M  L1_GETX [36 ] 36
+M  L1_GETX [30 ] 30
 M  L1_PUTO [0 ] 0
 M  L1_PUTX [0 ] 0
 M  L1_PUTS [0 ] 0
 M  Fwd_GETX [0 ] 0
 M  Fwd_GETS [0 ] 0
 M  Fwd_DMA [0 ] 0
-M  L2_Replacement [813 ] 813
+M  L2_Replacement [824 ] 824
 
 IFGX  L1_GETS [0 ] 0
 IFGX  L1_GETX [0 ] 0
@@ -762,8 +762,8 @@ OLSXW  Inv [0 ] 0
 OLSXW  Unblock [0 ] 0
 OLSXW  L2_Replacement [0 ] 0
 
-ILXW  L1_GETS [30 ] 30
-ILXW  L1_GETX [31 ] 31
+ILXW  L1_GETS [36 ] 36
+ILXW  L1_GETX [47 ] 47
 ILXW  L1_PUTO [0 ] 0
 ILXW  L1_PUTX [0 ] 0
 ILXW  L1_PUTS_only [0 ] 0
@@ -773,8 +773,8 @@ ILXW  Fwd_GETS [0 ] 0
 ILXW  Fwd_DMA [0 ] 0
 ILXW  Inv [0 ] 0
 ILXW  Data [0 ] 0
-ILXW  L1_WBCLEANDATA [84 ] 84
-ILXW  L1_WBDIRTYDATA [778 ] 778
+ILXW  L1_WBCLEANDATA [79 ] 79
+ILXW  L1_WBDIRTYDATA [788 ] 788
 ILXW  Unblock [0 ] 0
 ILXW  L2_Replacement [0 ] 0
 
@@ -862,7 +862,7 @@ IFLXO  L2_Replacement [0 ] 0
 IGS  L1_GETS [0 ] 0
 IGS  L1_GETX [0 ] 0
 IGS  L1_PUTO [0 ] 0
-IGS  L1_PUTX [87 ] 87
+IGS  L1_PUTX [44 ] 44
 IGS  L1_PUTS_only [0 ] 0
 IGS  L1_PUTS [0 ] 0
 IGS  Fwd_GETX [0 ] 0
@@ -871,9 +871,9 @@ IGS  Fwd_DMA [0 ] 0
 IGS  Own_GETX [0 ] 0
 IGS  Inv [0 ] 0
 IGS  Data [0 ] 0
-IGS  Data_Exclusive [86 ] 86
+IGS  Data_Exclusive [80 ] 80
 IGS  Unblock [0 ] 0
-IGS  Exclusive_Unblock [84 ] 84
+IGS  Exclusive_Unblock [80 ] 80
 IGS  L2_Replacement [0 ] 0
 
 IGM  L1_GETS [0 ] 0
@@ -888,7 +888,7 @@ IGM  Fwd_DMA [0 ] 0
 IGM  Own_GETX [0 ] 0
 IGM  Inv [0 ] 0
 IGM  ExtAck [0 ] 0
-IGM  Data [736 ] 736
+IGM  Data [752 ] 752
 IGM  Data_Exclusive [0 ] 0
 IGM  L2_Replacement [0 ] 0
 
@@ -909,7 +909,7 @@ IGMLS  L2_Replacement [0 ] 0
 IGMO  L1_GETS [0 ] 0
 IGMO  L1_GETX [0 ] 0
 IGMO  L1_PUTO [0 ] 0
-IGMO  L1_PUTX [1037 ] 1037
+IGMO  L1_PUTX [1465 ] 1465
 IGMO  L1_PUTS_only [0 ] 0
 IGMO  L1_PUTS [0 ] 0
 IGMO  Fwd_GETX [0 ] 0
@@ -917,8 +917,8 @@ IGMO  Fwd_GETS [0 ] 0
 IGMO  Fwd_DMA [0 ] 0
 IGMO  Own_GETX [0 ] 0
 IGMO  ExtAck [0 ] 0
-IGMO  All_Acks [736 ] 736
-IGMO  Exclusive_Unblock [736 ] 736
+IGMO  All_Acks [752 ] 752
+IGMO  Exclusive_Unblock [751 ] 751
 IGMO  L2_Replacement [0 ] 0
 
 IGMIO  L1_GETS [0 ] 0
@@ -991,14 +991,14 @@ II  All_Acks [0 ] 0
 MM  L1_GETS [0 ] 0
 MM  L1_GETX [0 ] 0
 MM  L1_PUTO [0 ] 0
-MM  L1_PUTX [0 ] 0
+MM  L1_PUTX [30 ] 30
 MM  L1_PUTS_only [0 ] 0
 MM  L1_PUTS [0 ] 0
 MM  Fwd_GETX [0 ] 0
 MM  Fwd_GETS [0 ] 0
 MM  Fwd_DMA [0 ] 0
 MM  Inv [0 ] 0
-MM  Exclusive_Unblock [36 ] 36
+MM  Exclusive_Unblock [30 ] 30
 MM  L2_Replacement [0 ] 0
 
 SS  L1_GETS [0 ] 0
@@ -1017,7 +1017,7 @@ SS  L2_Replacement [0 ] 0
 OO  L1_GETS [0 ] 0
 OO  L1_GETX [0 ] 0
 OO  L1_PUTO [0 ] 0
-OO  L1_PUTX [16 ] 16
+OO  L1_PUTX [0 ] 0
 OO  L1_PUTS_only [0 ] 0
 OO  L1_PUTS [0 ] 0
 OO  Fwd_GETX [0 ] 0
@@ -1026,7 +1026,7 @@ OO  Fwd_DMA [0 ] 0
 OO  Inv [0 ] 0
 OO  Unblock [0 ] 0
 OO  Exclusive_Unblock [10 ] 10
-OO  L2_Replacement [1 ] 1
+OO  L2_Replacement [0 ] 0
 
 OLSS  L1_GETS [0 ] 0
 OLSS  L1_GETX [0 ] 0
@@ -1080,8 +1080,8 @@ OI  Writeback_Ack [0 ] 0
 OI  Writeback_Nack [0 ] 0
 OI  L2_Replacement [0 ] 0
 
-MI  L1_GETS [0 ] 0
-MI  L1_GETX [35 ] 35
+MI  L1_GETS [3 ] 3
+MI  L1_GETX [19 ] 19
 MI  L1_PUTO [0 ] 0
 MI  L1_PUTX [0 ] 0
 MI  L1_PUTS_only [0 ] 0
@@ -1089,7 +1089,7 @@ MI  L1_PUTS [0 ] 0
 MI  Fwd_GETX [0 ] 0
 MI  Fwd_GETS [0 ] 0
 MI  Fwd_DMA [0 ] 0
-MI  Writeback_Ack [813 ] 813
+MI  Writeback_Ack [823 ] 823
 MI  L2_Replacement [0 ] 0
 
 MII  L1_GETS [0 ] 0
@@ -1196,51 +1196,51 @@ ILOXD  DmaAck [0 ] 0
 ILOXD  L2_Replacement [0 ] 0
 
 Memory controller: system.dir_cntrl0.memBuffer:
-  memory_total_requests: 1557
-  memory_reads: 824
-  memory_writes: 733
-  memory_refreshes: 745
-  memory_total_request_delays: 699
-  memory_delays_per_request: 0.44894
-  memory_delays_in_input_queue: 100
+  memory_total_requests: 1578
+  memory_reads: 832
+  memory_writes: 746
+  memory_refreshes: 2198
+  memory_total_request_delays: 449
+  memory_delays_per_request: 0.284537
+  memory_delays_in_input_queue: 36
   memory_delays_behind_head_of_bank_queue: 0
-  memory_delays_stalled_at_head_of_bank_queue: 599
-  memory_stalls_for_bank_busy: 167
+  memory_delays_stalled_at_head_of_bank_queue: 413
+  memory_stalls_for_bank_busy: 165
   memory_stalls_for_random_busy: 0
   memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 37
-  memory_stalls_for_bus: 228
+  memory_stalls_for_arbitration: 26
+  memory_stalls_for_bus: 146
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 89
-  memory_stalls_for_read_read_turnaround: 78
-  accesses_per_bank: 58  56  38  78  87  60  65  48  44  42  38  35  56  49  46  40  29  55  43  35  47  44  52  40  42  46  53  46  44  46  52  43  
+  memory_stalls_for_read_write_turnaround: 29
+  memory_stalls_for_read_read_turnaround: 47
+  accesses_per_bank: 42  42  62  72  55  44  62  62  55  41  42  49  52  46  57  38  61  59  41  51  46  55  45  47  39  55  63  43  31  45  39  37  
 
  --- Directory ---
  - Event Counts -
-GETX [788 ] 788
-GETS [87 ] 87
-PUTX [817 ] 817
+GETX [765 ] 765
+GETS [80 ] 80
+PUTX [823 ] 823
 PUTO [0 ] 0
 PUTO_SHARERS [0 ] 0
 Unblock [0 ] 0
 Last_Unblock [0 ] 0
-Exclusive_Unblock [820 ] 820
-Clean_Writeback [80 ] 80
-Dirty_Writeback [733 ] 733
-Memory_Data [822 ] 822
-Memory_Ack [732 ] 732
+Exclusive_Unblock [830 ] 830
+Clean_Writeback [76 ] 76
+Dirty_Writeback [746 ] 746
+Memory_Data [832 ] 832
+Memory_Ack [746 ] 746
 DMA_READ [0 ] 0
 DMA_WRITE [0 ] 0
 DMA_ACK [0 ] 0
 Data [0 ] 0
 
  - Transitions -
-I  GETX [737 ] 737
-I  GETS [87 ] 87
+I  GETX [752 ] 752
+I  GETS [80 ] 80
 I  PUTX [0 ] 0
 I  PUTO [0 ] 0
 I  Memory_Data [0 ] 0
-I  Memory_Ack [728 ] 728
+I  Memory_Ack [744 ] 744
 I  DMA_READ [0 ] 0
 I  DMA_WRITE [0 ] 0
 
@@ -1265,7 +1265,7 @@ O  DMA_WRITE [0 ] 0
 
 M  GETX [0 ] 0
 M  GETS [0 ] 0
-M  PUTX [813 ] 813
+M  PUTX [823 ] 823
 M  PUTO [0 ] 0
 M  PUTO_SHARERS [0 ] 0
 M  Memory_Data [0 ] 0
@@ -1279,8 +1279,8 @@ IS  PUTX [0 ] 0
 IS  PUTO [0 ] 0
 IS  PUTO_SHARERS [0 ] 0
 IS  Unblock [0 ] 0
-IS  Exclusive_Unblock [84 ] 84
-IS  Memory_Data [86 ] 86
+IS  Exclusive_Unblock [80 ] 80
+IS  Memory_Data [80 ] 80
 IS  Memory_Ack [0 ] 0
 IS  DMA_READ [0 ] 0
 IS  DMA_WRITE [0 ] 0
@@ -1323,24 +1323,24 @@ MO  DMA_WRITE [0 ] 0
 
 MM  GETX [0 ] 0
 MM  GETS [0 ] 0
-MM  PUTX [4 ] 4
+MM  PUTX [0 ] 0
 MM  PUTO [0 ] 0
 MM  PUTO_SHARERS [0 ] 0
-MM  Exclusive_Unblock [736 ] 736
-MM  Memory_Data [736 ] 736
-MM  Memory_Ack [4 ] 4
+MM  Exclusive_Unblock [750 ] 750
+MM  Memory_Data [752 ] 752
+MM  Memory_Ack [2 ] 2
 MM  DMA_READ [0 ] 0
 MM  DMA_WRITE [0 ] 0
 
 
-MI  GETX [51 ] 51
+MI  GETX [13 ] 13
 MI  GETS [0 ] 0
 MI  PUTX [0 ] 0
 MI  PUTO [0 ] 0
 MI  PUTO_SHARERS [0 ] 0
 MI  Unblock [0 ] 0
-MI  Clean_Writeback [80 ] 80
-MI  Dirty_Writeback [733 ] 733
+MI  Clean_Writeback [76 ] 76
+MI  Dirty_Writeback [746 ] 746
 MI  Memory_Data [0 ] 0
 MI  Memory_Ack [0 ] 0
 MI  DMA_READ [0 ] 0

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout
index 7310e89b2f4eb2ac63def8ea5b4e8e535063c9ff..c5a30e355a9c4b844b5d97b4393c75d525b641ef 100755 (executable)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout
@@ -1,10 +1,12 @@
+Redirecting stdout to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout
+Redirecting stderr to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 28 2012 11:32:56
-gem5 started Jul 28 2012 11:35:54
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 14:10:16
+gem5 started Sep  1 2012 14:14:49
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 357561 because Ruby Tester completed
+Exiting @ tick 316521 because Ruby Tester completed

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt
index 017992f913df3f7d6c3ff2836c60800b77fe2ef9..150be1ab510d605e6343dedfcc0d65694019255a 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt
@@ -1,12 +1,12 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000358                       # Number of seconds simulated
-sim_ticks                                      357561                       # Number of ticks simulated
-final_tick                                     357561                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.000317                       # Number of seconds simulated
+sim_ticks                                      316521                       # Number of ticks simulated
+final_tick                                     316521                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_tick_rate                                 791110                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 229444                       # Number of bytes of host memory used
-host_seconds                                     0.45                       # Real time elapsed on the host
+host_tick_rate                                 596457                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 260972                       # Number of bytes of host memory used
+host_seconds                                     0.53                       # Real time elapsed on the host
 system.l1_cntrl0.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl0.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini
index 22a3e73565417e9b46efaf9ff53894149d274e20..2920575eaf96c2c78fb048c047e87cc9682ffcd9 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy tester
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -59,9 +60,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -70,6 +71,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -152,6 +154,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl0.L1DcacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.L1IcacheMemory
@@ -167,6 +170,7 @@ slave=system.tester.cpuDataPort[0] system.tester.cpuInstPort[0]
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -268,6 +272,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true
@@ -281,6 +286,7 @@ slave=system.system_port
 type=RubyTester
 check_flush=true
 checks_to_complete=100
+clock=1
 deadlock_threshold=50000
 num_cpus=1
 system=system

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats
index a315a3873eb7c71fb01a02bf27458bef18703d57..31072bf7e60e4cf77abc9e641bff61d6fddd7593 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats
@@ -1,4 +1,4 @@
-Real time: Jul/10/2012 17:54:42
+Real time: Sep/01/2012 13:57:00
 
 Profiler Stats
 --------------
@@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0
 Elapsed_time_in_hours: 0
 Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 0.48
-Virtual_time_in_minutes: 0.008
-Virtual_time_in_hours:   0.000133333
-Virtual_time_in_days:    5.55556e-06
+Virtual_time_in_seconds: 0.44
+Virtual_time_in_minutes: 0.00733333
+Virtual_time_in_hours:   0.000122222
+Virtual_time_in_days:    5.09259e-06
 
-Ruby_current_time: 205611
+Ruby_current_time: 172201
 Ruby_start_time: 0
-Ruby_cycles: 205611
+Ruby_cycles: 172201
 
-mbytes_resident: 41.625
-mbytes_total: 225.387
-resident_ratio: 0.184717
+mbytes_resident: 44.8359
+mbytes_total: 254.68
+resident_ratio: 0.176125
 
-ruby_cycles_executed: [ 205612 ]
+ruby_cycles_executed: [ 172202 ]
 
 Busy Controller Counts:
 L1Cache-0:0  
@@ -29,18 +29,18 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 16 count: 955 average: 15.8063 | standard deviation: 1.1547 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 2 64 876 ]
+sequencer_requests_outstanding: [binsize: 1 max: 16 count: 986 average: 15.788 | standard deviation: 1.14484 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 4 84 885 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 32 max: 5995 count: 940 average: 3454.8 | standard deviation: 1689.48 | 73 0 0 15 0 3 1 1 9 6 2 7 11 6 2 14 6 0 5 12 4 2 3 2 1 3 2 1 0 0 1 0 1 0 0 2 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 1 0 0 0 1 1 3 3 2 4 5 6 5 14 2 7 10 3 17 12 13 12 12 19 15 16 15 18 28 27 20 15 26 23 19 24 21 26 18 22 22 18 11 20 18 12 11 10 9 7 8 8 11 9 0 7 5 8 5 7 3 3 4 5 4 1 1 5 2 2 0 0 3 0 0 2 0 0 2 5 0 0 0 1 0 0 0 0 1 ]
-miss_latency_LD: [binsize: 32 max: 5688 count: 51 average: 3691.18 | standard deviation: 1748.75 | 8 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 2 0 0 0 0 1 0 0 1 0 0 2 1 0 4 1 3 1 1 0 1 2 1 3 0 0 4 1 1 2 2 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ]
-miss_latency_ST: [binsize: 32 max: 5995 count: 837 average: 3617.77 | standard deviation: 1564.58 | 62 0 0 14 0 2 1 0 4 4 2 3 5 2 0 10 2 0 2 7 4 1 2 0 1 2 2 1 0 0 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 1 0 0 0 1 1 3 3 2 4 5 6 4 14 2 7 10 3 15 12 13 12 12 18 15 16 14 18 28 25 19 15 22 21 16 23 20 26 17 20 21 14 11 20 14 11 10 8 7 7 8 8 10 9 0 7 5 7 4 7 3 3 3 5 3 1 0 5 2 2 0 0 3 0 0 2 0 0 1 5 0 0 0 1 0 0 0 0 1 ]
-miss_latency_IFETCH: [binsize: 8 max: 809 count: 49 average:   434 | standard deviation: 189.079 | 2 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 2 2 1 0 1 0 0 0 0 0 0 1 0 2 4 2 0 0 1 2 1 0 0 2 0 0 1 2 1 0 2 0 1 1 0 0 0 0 1 1 0 1 3 1 1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_FLUSH: [binsize: 32 max: 4507 count: 3 average:  3306 | standard deviation: 1853.78 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 ]
-miss_latency_L1Cache: [binsize: 32 max: 4507 count: 81 average: 139.605 | standard deviation: 691.167 | 67 0 0 11 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 ]
-miss_latency_L2Cache: [binsize: 32 max: 5708 count: 38 average: 2643.53 | standard deviation: 1886.57 | 6 0 0 4 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 1 1 0 0 1 0 0 2 0 0 0 1 0 0 0 0 1 1 1 1 1 1 0 2 1 1 1 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_Directory: [binsize: 32 max: 5995 count: 821 average: 3819.42 | standard deviation: 1346.15 | 0 0 0 0 0 3 1 1 9 5 2 7 11 5 2 14 6 0 5 11 4 2 3 2 1 3 2 1 0 0 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 2 2 2 4 4 6 5 12 2 7 10 2 17 12 13 12 11 18 14 15 14 17 28 25 19 14 25 21 19 23 21 26 18 22 22 16 11 20 18 12 11 10 8 7 8 8 11 9 0 7 5 8 5 7 3 3 4 5 4 1 1 5 2 2 0 0 3 0 0 2 0 0 2 4 0 0 0 1 0 0 0 0 1 ]
+miss_latency: [binsize: 32 max: 4954 count: 971 average: 2802.39 | standard deviation: 1327.57 | 80 0 6 7 2 8 6 2 1 19 3 3 8 2 2 8 6 2 5 4 1 3 3 1 0 1 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 2 0 0 1 2 2 0 1 1 5 4 7 3 3 4 9 8 7 5 8 19 10 17 6 23 19 18 16 17 17 21 17 30 28 20 26 23 25 26 21 23 34 18 14 18 15 15 9 20 13 16 12 12 7 10 6 8 6 11 3 1 4 6 4 5 2 4 0 0 0 1 1 0 0 2 1 0 2 2 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD: [binsize: 32 max: 4368 count: 50 average: 2780.46 | standard deviation: 1378.72 | 4 0 1 1 0 0 0 0 0 2 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 2 1 1 0 1 0 3 0 0 1 1 1 0 0 0 4 1 1 1 0 0 2 0 0 4 3 0 1 0 0 0 0 2 1 0 0 3 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST: [binsize: 32 max: 4954 count: 866 average: 2940.8 | standard deviation: 1219.88 | 67 0 4 4 1 5 5 1 1 9 2 1 3 1 1 5 4 0 3 2 0 2 1 1 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 2 0 0 1 1 2 0 1 1 5 4 7 3 3 4 9 7 7 4 7 17 9 16 6 22 19 15 16 17 16 20 16 30 28 20 22 22 23 25 20 23 32 17 14 14 12 15 8 20 13 16 12 10 6 10 6 5 5 9 3 1 4 6 4 5 2 3 0 0 0 1 1 0 0 2 1 0 2 2 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_IFETCH: [binsize: 8 max: 817 count: 50 average: 332.28 | standard deviation: 230.032 | 6 3 0 0 0 0 0 0 0 0 1 0 0 2 0 0 0 0 0 1 0 0 1 2 1 0 0 0 1 0 0 0 0 0 0 0 3 2 1 2 0 1 0 0 0 0 1 1 2 1 0 1 1 0 0 0 0 1 0 0 0 1 0 2 1 0 1 0 0 0 1 0 0 0 1 1 0 1 1 0 0 1 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_FLUSH: [binsize: 32 max: 4122 count: 5 average:  3751 | standard deviation: 332.267 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ]
+miss_latency_L1Cache: [binsize: 32 max: 4122 count: 76 average: 256.355 | standard deviation: 937.092 | 66 0 0 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ]
+miss_latency_L2Cache: [binsize: 32 max: 4319 count: 49 average: 1546.86 | standard deviation: 1620.72 | 14 0 3 1 0 1 2 1 0 1 0 0 1 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 2 0 0 0 1 0 0 0 1 1 1 1 0 0 0 2 0 0 0 1 0 0 2 0 0 1 0 1 0 0 0 0 1 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_Directory: [binsize: 32 max: 4954 count: 846 average: 3103.83 | standard deviation: 1015.18 | 0 0 3 1 2 7 4 1 1 18 3 3 7 2 1 7 6 2 5 3 1 3 3 1 0 1 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 2 0 0 1 2 2 0 1 1 4 3 6 3 3 4 9 6 7 5 8 18 10 17 6 22 18 17 15 17 17 21 15 30 28 20 25 23 24 24 20 23 33 17 13 18 15 15 9 19 13 14 12 11 7 10 6 8 5 10 3 1 4 6 4 4 2 4 0 0 0 1 1 0 0 2 1 0 2 2 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -50,16 +50,16 @@ miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average:
 miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
-imcomplete_dir_Times: 821
-miss_latency_LD_L1Cache: [binsize: 1 max: 4 count: 7 average: 2.42857 | standard deviation: 1 | 0 1 3 2 1 ]
-miss_latency_LD_L2Cache: [binsize: 32 max: 4298 count: 2 average: 2152.5 | standard deviation: 3034.2 | 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
-miss_latency_LD_Directory: [binsize: 32 max: 5688 count: 42 average: 4379.24 | standard deviation: 762.412 | 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 2 0 0 0 0 1 0 0 1 0 0 2 1 0 4 1 3 0 1 0 1 2 1 3 0 0 4 1 1 2 2 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ]
-miss_latency_ST_L1Cache: [binsize: 1 max: 118 count: 71 average: 19.338 | standard deviation: 39.1116 | 0 12 12 16 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 3 1 0 0 2 0 1 0 0 1 ]
-miss_latency_ST_L2Cache: [binsize: 32 max: 5708 count: 32 average: 3000.47 | standard deviation: 1710.17 | 2 0 0 3 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 1 1 0 0 1 0 0 2 0 0 0 1 0 0 0 0 1 1 1 1 1 1 0 2 1 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_ST_Directory: [binsize: 32 max: 5995 count: 734 average: 3992.76 | standard deviation: 1120.88 | 0 0 0 0 0 2 1 0 4 3 2 3 5 1 0 10 2 0 2 6 4 1 2 0 1 2 2 1 0 0 1 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 2 2 2 4 4 6 4 12 2 7 10 2 15 12 13 12 11 17 14 15 13 17 28 23 18 14 21 20 16 23 20 26 17 20 21 13 11 20 14 11 10 8 6 7 8 8 10 9 0 7 5 7 4 7 3 3 3 5 3 1 0 5 2 2 0 0 3 0 0 2 0 0 1 4 0 0 0 1 0 0 0 0 1 ]
-miss_latency_IFETCH_L2Cache: [binsize: 1 max: 115 count: 4 average:  33.5 | standard deviation: 54.3476 | 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
-miss_latency_IFETCH_Directory: [binsize: 8 max: 809 count: 45 average: 469.6 | standard deviation: 151.399 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 2 2 1 0 1 0 0 0 0 0 0 1 0 2 4 2 0 0 1 2 1 0 0 2 0 0 1 2 1 0 2 0 1 1 0 0 0 0 1 1 0 1 3 1 1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_FLUSH_L1Cache: [binsize: 32 max: 4507 count: 3 average:  3306 | standard deviation: 1853.78 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 ]
+imcomplete_dir_Times: 846
+miss_latency_LD_L1Cache: [binsize: 1 max: 112 count: 5 average:    24 | standard deviation: 49.2037 | 0 2 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_LD_Directory: [binsize: 32 max: 4368 count: 45 average: 3086.73 | standard deviation: 1075.78 | 0 0 1 0 0 0 0 0 0 2 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 2 1 1 0 1 0 3 0 0 1 1 1 0 0 0 4 1 1 1 0 0 2 0 0 4 3 0 1 0 0 0 0 2 1 0 0 3 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST_L1Cache: [binsize: 1 max: 117 count: 65 average: 9.33846 | standard deviation: 26.6015 | 0 13 15 17 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 1 ]
+miss_latency_ST_L2Cache: [binsize: 32 max: 4319 count: 40 average: 1890.95 | standard deviation: 1603.6 | 6 0 3 0 0 1 2 1 0 1 0 0 1 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 2 0 0 0 1 0 0 0 1 1 1 1 0 0 0 2 0 0 0 1 0 0 2 0 0 1 0 1 0 0 0 0 1 0 2 0 1 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_ST_Directory: [binsize: 32 max: 4954 count: 761 average: 3246.37 | standard deviation: 821.708 | 0 0 1 0 1 4 3 0 1 8 2 1 2 1 0 4 4 0 3 1 0 2 1 1 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 2 0 0 1 1 2 0 1 1 4 3 6 3 3 4 9 5 7 4 7 16 9 16 6 21 18 14 15 17 16 20 14 30 28 20 21 22 23 23 20 23 31 17 13 14 12 15 8 19 13 14 12 9 6 10 6 5 5 9 3 1 4 6 4 4 2 3 0 0 0 1 1 0 0 2 1 0 2 2 0 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_IFETCH_L1Cache: [binsize: 1 max: 1 count: 1 average:     1 | standard deviation: 0 | 0 1 ]
+miss_latency_IFETCH_L2Cache: [binsize: 1 max: 107 count: 9 average: 17.5556 | standard deviation: 33.5764 | 0 0 0 0 1 2 1 1 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_IFETCH_Directory: [binsize: 8 max: 817 count: 40 average: 411.375 | standard deviation: 184.832 | 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 0 0 1 2 1 0 0 0 1 0 0 0 0 0 0 0 3 2 1 2 0 1 0 0 0 0 1 1 2 1 0 1 1 0 0 0 0 1 0 0 0 1 0 2 1 0 1 0 0 0 1 0 0 0 1 1 0 1 1 0 0 1 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_FLUSH_L1Cache: [binsize: 32 max: 4122 count: 5 average:  3751 | standard deviation: 332.267 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -91,60 +91,60 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 11775
+page_reclaims: 8466
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 88
 
 Network Stats
 -------------
 
-total_msg_count_Request_Control: 2475 19800
-total_msg_count_Response_Data: 2469 177768
-total_msg_count_Writeback_Data: 2211 159192
-total_msg_count_Writeback_Control: 5145 41160
-total_msg_count_Unblock_Control: 2460 19680
-total_msgs: 14760 total_bytes: 417600
+total_msg_count_Request_Control: 2554 20432
+total_msg_count_Response_Data: 2550 183600
+total_msg_count_Writeback_Data: 2303 165816
+total_msg_count_Writeback_Control: 5288 42304
+total_msg_count_Unblock_Control: 2535 20280
+total_msgs: 15230 total_bytes: 432432
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 2.11565
-  links_utilized_percent_switch_0_link_0: 2.00014 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 2.23115 bw: 16000 base_latency: 1
+links_utilized_percent_switch_0: 2.61656
+  links_utilized_percent_switch_0_link_0: 2.4663 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 2.76682 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_0_link_0_Response_Data: 823 59256 [ 0 0 0 0 823 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Writeback_Control: 818 6544 [ 0 0 0 818 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Request_Control: 825 6600 [ 0 0 825 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Data: 737 53064 [ 0 0 0 0 0 737 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Writeback_Control: 897 7176 [ 0 0 817 0 0 80 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Unblock_Control: 820 6560 [ 0 0 0 0 0 820 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Data: 850 61200 [ 0 0 0 0 850 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Writeback_Control: 844 6752 [ 0 0 0 844 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Request_Control: 852 6816 [ 0 0 852 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Data: 768 55296 [ 0 0 0 0 0 768 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Writeback_Control: 920 7360 [ 0 0 845 0 0 75 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Unblock_Control: 845 6760 [ 0 0 0 0 0 845 0 0 0 0 ] base_latency: 1
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 2.11565
-  links_utilized_percent_switch_1_link_0: 2.23115 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 2.00014 bw: 16000 base_latency: 1
+links_utilized_percent_switch_1: 2.61482
+  links_utilized_percent_switch_1_link_0: 2.76334 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 2.4663 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_1_link_0_Request_Control: 825 6600 [ 0 0 825 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Writeback_Data: 737 53064 [ 0 0 0 0 0 737 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Writeback_Control: 897 7176 [ 0 0 817 0 0 80 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Unblock_Control: 820 6560 [ 0 0 0 0 0 820 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Response_Data: 823 59256 [ 0 0 0 0 823 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Writeback_Control: 818 6544 [ 0 0 0 818 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Request_Control: 851 6808 [ 0 0 851 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Writeback_Data: 767 55224 [ 0 0 0 0 0 767 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Writeback_Control: 918 7344 [ 0 0 843 0 0 75 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Unblock_Control: 845 6760 [ 0 0 0 0 0 845 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Response_Data: 850 61200 [ 0 0 0 0 850 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Control: 844 6752 [ 0 0 0 844 0 0 0 0 0 0 ] base_latency: 1
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 2.11565
-  links_utilized_percent_switch_2_link_0: 2.00014 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 2.23115 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 2.61613
+  links_utilized_percent_switch_2_link_0: 2.4663 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 2.76595 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_2_link_0_Response_Data: 823 59256 [ 0 0 0 0 823 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Writeback_Control: 818 6544 [ 0 0 0 818 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Request_Control: 825 6600 [ 0 0 825 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Writeback_Data: 737 53064 [ 0 0 0 0 0 737 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Writeback_Control: 897 7176 [ 0 0 817 0 0 80 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Unblock_Control: 820 6560 [ 0 0 0 0 0 820 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Response_Data: 850 61200 [ 0 0 0 0 850 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Writeback_Control: 844 6752 [ 0 0 0 844 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Request_Control: 851 6808 [ 0 0 851 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Writeback_Data: 768 55296 [ 0 0 0 0 0 768 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Writeback_Control: 918 7344 [ 0 0 843 0 0 75 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Unblock_Control: 845 6760 [ 0 0 0 0 0 845 0 0 0 0 ] base_latency: 1
 
 Cache Stats: system.l1_cntrl0.L1IcacheMemory
   system.l1_cntrl0.L1IcacheMemory_total_misses: 49
@@ -158,42 +158,42 @@ Cache Stats: system.l1_cntrl0.L1IcacheMemory
   system.l1_cntrl0.L1IcacheMemory_access_mode_type_Supervisor:   49    100%
 
 Cache Stats: system.l1_cntrl0.L1DcacheMemory
-  system.l1_cntrl0.L1DcacheMemory_total_misses: 812
-  system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 812
+  system.l1_cntrl0.L1DcacheMemory_total_misses: 849
+  system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 849
   system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
   system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
   system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl0.L1DcacheMemory_request_type_LD:   5.41872%
-  system.l1_cntrl0.L1DcacheMemory_request_type_ST:   94.4581%
-  system.l1_cntrl0.L1DcacheMemory_request_type_FLUSH:   0.123153%
+  system.l1_cntrl0.L1DcacheMemory_request_type_LD:   5.41814%
+  system.l1_cntrl0.L1DcacheMemory_request_type_ST:   94.4641%
+  system.l1_cntrl0.L1DcacheMemory_request_type_FLUSH:   0.117786%
 
-  system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor:   812    100%
+  system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor:   849    100%
 
 Cache Stats: system.l1_cntrl0.L2cacheMemory
-  system.l1_cntrl0.L2cacheMemory_total_misses: 863
-  system.l1_cntrl0.L2cacheMemory_total_demand_misses: 863
+  system.l1_cntrl0.L2cacheMemory_total_misses: 902
+  system.l1_cntrl0.L2cacheMemory_total_demand_misses: 902
   system.l1_cntrl0.L2cacheMemory_total_prefetches: 0
   system.l1_cntrl0.L2cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl0.L2cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl0.L2cacheMemory_request_type_LD:   5.09849%
-  system.l1_cntrl0.L2cacheMemory_request_type_ST:   88.876%
-  system.l1_cntrl0.L2cacheMemory_request_type_IFETCH:   5.67787%
-  system.l1_cntrl0.L2cacheMemory_request_type_FLUSH:   0.347625%
+  system.l1_cntrl0.L2cacheMemory_request_type_LD:   5.09978%
+  system.l1_cntrl0.L2cacheMemory_request_type_ST:   88.9135%
+  system.l1_cntrl0.L2cacheMemory_request_type_IFETCH:   5.43237%
+  system.l1_cntrl0.L2cacheMemory_request_type_FLUSH:   0.554324%
 
-  system.l1_cntrl0.L2cacheMemory_access_mode_type_Supervisor:   863    100%
+  system.l1_cntrl0.L2cacheMemory_access_mode_type_Supervisor:   902    100%
 
  --- L1Cache ---
  - Event Counts -
-Load [53 ] 53
-Ifetch [49 ] 49
-Store [861 ] 861
-L2_Replacement [814 ] 814
-L1_to_L2 [15927 ] 15927
-Trigger_L2_to_L1D [35 ] 35
-Trigger_L2_to_L1I [4 ] 4
-Complete_L2_to_L1 [39 ] 39
+Load [52 ] 52
+Ifetch [53 ] 53
+Store [888 ] 888
+L2_Replacement [840 ] 840
+L1_to_L2 [16587 ] 16587
+Trigger_L2_to_L1D [41 ] 41
+Trigger_L2_to_L1I [9 ] 9
+Complete_L2_to_L1 [50 ] 50
 Other_GETX [0 ] 0
 Other_GETS [0 ] 0
 Merged_GETS [0 ] 0
@@ -204,18 +204,18 @@ Ack [0 ] 0
 Shared_Ack [0 ] 0
 Data [0 ] 0
 Shared_Data [0 ] 0
-Exclusive_Data [823 ] 823
-Writeback_Ack [817 ] 817
+Exclusive_Data [850 ] 850
+Writeback_Ack [843 ] 843
 Writeback_Nack [0 ] 0
 All_acks [0 ] 0
-All_acks_no_sharers [823 ] 823
-Flush_line [3 ] 3
+All_acks_no_sharers [850 ] 850
+Flush_line [5 ] 5
 Block_Ack [1 ] 1
 
  - Transitions -
-I  Load [42 ] 42
-I  Ifetch [45 ] 45
-I  Store [735 ] 735
+I  Load [46 ] 46
+I  Ifetch [40 ] 40
+I  Store [762 ] 762
 I  L2_Replacement [0 ] 0
 I  L1_to_L2 [0 ] 0
 I  Trigger_L2_to_L1D [0 ] 0
@@ -225,7 +225,7 @@ I  Other_GETS [0 ] 0
 I  Other_GETS_No_Mig [0 ] 0
 I  NC_DMA_GETS [0 ] 0
 I  Invalidate [0 ] 0
-I  Flush_line [2 ] 2
+I  Flush_line [4 ] 4
 
 S  Load [0 ] 0
 S  Ifetch [0 ] 0
@@ -257,11 +257,11 @@ O  Invalidate [0 ] 0
 O  Flush_line [0 ] 0
 
 M  Load [0 ] 0
-M  Ifetch [0 ] 0
+M  Ifetch [1 ] 1
 M  Store [0 ] 0
-M  L2_Replacement [78 ] 78
-M  L1_to_L2 [84 ] 84
-M  Trigger_L2_to_L1D [6 ] 6
+M  L2_Replacement [71 ] 71
+M  L1_to_L2 [83 ] 83
+M  Trigger_L2_to_L1D [11 ] 11
 M  Trigger_L2_to_L1I [0 ] 0
 M  Other_GETX [0 ] 0
 M  Other_GETS [0 ] 0
@@ -271,13 +271,13 @@ M  NC_DMA_GETS [0 ] 0
 M  Invalidate [0 ] 0
 M  Flush_line [0 ] 0
 
-MM  Load [6 ] 6
+MM  Load [5 ] 5
 MM  Ifetch [0 ] 0
-MM  Store [69 ] 69
-MM  L2_Replacement [736 ] 736
-MM  L1_to_L2 [771 ] 771
-MM  Trigger_L2_to_L1D [29 ] 29
-MM  Trigger_L2_to_L1I [4 ] 4
+MM  Store [62 ] 62
+MM  L2_Replacement [769 ] 769
+MM  L1_to_L2 [809 ] 809
+MM  Trigger_L2_to_L1D [30 ] 30
+MM  Trigger_L2_to_L1I [9 ] 9
 MM  Other_GETX [0 ] 0
 MM  Other_GETS [0 ] 0
 MM  Merged_GETS [0 ] 0
@@ -306,21 +306,21 @@ OR  Flush_line [0 ] 0
 
 MR  Load [0 ] 0
 MR  Ifetch [0 ] 0
-MR  Store [6 ] 6
-MR  L1_to_L2 [25 ] 25
+MR  Store [11 ] 11
+MR  L1_to_L2 [90 ] 90
 MR  Flush_line [0 ] 0
 
-MMR  Load [2 ] 2
-MMR  Ifetch [4 ] 4
-MMR  Store [26 ] 26
-MMR  L1_to_L2 [91 ] 91
+MMR  Load [0 ] 0
+MMR  Ifetch [9 ] 9
+MMR  Store [29 ] 29
+MMR  L1_to_L2 [25 ] 25
 MMR  Flush_line [1 ] 1
 
 IM  Load [0 ] 0
 IM  Ifetch [0 ] 0
 IM  Store [0 ] 0
 IM  L2_Replacement [0 ] 0
-IM  L1_to_L2 [9582 ] 9582
+IM  L1_to_L2 [9996 ] 9996
 IM  Other_GETX [0 ] 0
 IM  Other_GETS [0 ] 0
 IM  Other_GETS_No_Mig [0 ] 0
@@ -328,7 +328,7 @@ IM  NC_DMA_GETS [0 ] 0
 IM  Invalidate [0 ] 0
 IM  Ack [0 ] 0
 IM  Data [0 ] 0
-IM  Exclusive_Data [734 ] 734
+IM  Exclusive_Data [761 ] 761
 IM  Flush_line [0 ] 0
 
 SM  Load [0 ] 0
@@ -375,25 +375,25 @@ M_W  Load [0 ] 0
 M_W  Ifetch [0 ] 0
 M_W  Store [0 ] 0
 M_W  L2_Replacement [0 ] 0
-M_W  L1_to_L2 [253 ] 253
+M_W  L1_to_L2 [306 ] 306
 M_W  Ack [0 ] 0
-M_W  All_acks_no_sharers [87 ] 87
+M_W  All_acks_no_sharers [85 ] 85
 M_W  Flush_line [0 ] 0
 
-MM_W  Load [1 ] 1
+MM_W  Load [0 ] 0
 MM_W  Ifetch [0 ] 0
-MM_W  Store [2 ] 2
+MM_W  Store [3 ] 3
 MM_W  L2_Replacement [0 ] 0
-MM_W  L1_to_L2 [4505 ] 4505
+MM_W  L1_to_L2 [4592 ] 4592
 MM_W  Ack [0 ] 0
-MM_W  All_acks_no_sharers [734 ] 734
+MM_W  All_acks_no_sharers [761 ] 761
 MM_W  Flush_line [0 ] 0
 
 IS  Load [0 ] 0
 IS  Ifetch [0 ] 0
 IS  Store [0 ] 0
 IS  L2_Replacement [0 ] 0
-IS  L1_to_L2 [525 ] 525
+IS  L1_to_L2 [529 ] 529
 IS  Other_GETX [0 ] 0
 IS  Other_GETS [0 ] 0
 IS  Other_GETS_No_Mig [0 ] 0
@@ -403,7 +403,7 @@ IS  Ack [0 ] 0
 IS  Shared_Ack [0 ] 0
 IS  Data [0 ] 0
 IS  Shared_Data [0 ] 0
-IS  Exclusive_Data [87 ] 87
+IS  Exclusive_Data [85 ] 85
 IS  Flush_line [0 ] 0
 
 SS  Load [0 ] 0
@@ -431,9 +431,9 @@ OI  Invalidate [0 ] 0
 OI  Writeback_Ack [0 ] 0
 OI  Flush_line [0 ] 0
 
-MI  Load [0 ] 0
-MI  Ifetch [0 ] 0
-MI  Store [2 ] 2
+MI  Load [1 ] 1
+MI  Ifetch [3 ] 3
+MI  Store [1 ] 1
 MI  L2_Replacement [0 ] 0
 MI  L1_to_L2 [0 ] 0
 MI  Other_GETX [0 ] 0
@@ -442,7 +442,7 @@ MI  Merged_GETS [0 ] 0
 MI  Other_GETS_No_Mig [0 ] 0
 MI  NC_DMA_GETS [0 ] 0
 MI  Invalidate [0 ] 0
-MI  Writeback_Ack [814 ] 814
+MI  Writeback_Ack [838 ] 838
 MI  Flush_line [0 ] 0
 
 II  Load [0 ] 0
@@ -482,23 +482,23 @@ OT  Complete_L2_to_L1 [0 ] 0
 
 MT  Load [0 ] 0
 MT  Ifetch [0 ] 0
-MT  Store [1 ] 1
+MT  Store [2 ] 2
 MT  L2_Replacement [0 ] 0
-MT  L1_to_L2 [14 ] 14
-MT  Complete_L2_to_L1 [6 ] 6
+MT  L1_to_L2 [54 ] 54
+MT  Complete_L2_to_L1 [11 ] 11
 
-MMT  Load [2 ] 2
+MMT  Load [0 ] 0
 MMT  Ifetch [0 ] 0
-MMT  Store [20 ] 20
+MMT  Store [18 ] 18
 MMT  L2_Replacement [0 ] 0
-MMT  L1_to_L2 [77 ] 77
-MMT  Complete_L2_to_L1 [33 ] 33
+MMT  L1_to_L2 [103 ] 103
+MMT  Complete_L2_to_L1 [39 ] 39
 
 MI_F  Load [0 ] 0
 MI_F  Ifetch [0 ] 0
 MI_F  Store [0 ] 0
 MI_F  L1_to_L2 [0 ] 0
-MI_F  Writeback_Ack [3 ] 3
+MI_F  Writeback_Ack [5 ] 5
 MI_F  Flush_line [0 ] 0
 
 MM_F  Load [0 ] 0
@@ -529,7 +529,7 @@ IM_F  NC_DMA_GETS [0 ] 0
 IM_F  Invalidate [0 ] 0
 IM_F  Ack [0 ] 0
 IM_F  Data [0 ] 0
-IM_F  Exclusive_Data [2 ] 2
+IM_F  Exclusive_Data [4 ] 4
 IM_F  Flush_line [0 ] 0
 
 ISM_F  Load [0 ] 0
@@ -578,7 +578,7 @@ MM_WF  Store [0 ] 0
 MM_WF  L2_Replacement [0 ] 0
 MM_WF  L1_to_L2 [0 ] 0
 MM_WF  Ack [0 ] 0
-MM_WF  All_acks_no_sharers [2 ] 2
+MM_WF  All_acks_no_sharers [4 ] 4
 MM_WF  Flush_line [0 ] 0
 
 Cache Stats: system.dir_cntrl0.probeFilter
@@ -590,42 +590,42 @@ Cache Stats: system.dir_cntrl0.probeFilter
 
 
 Memory controller: system.dir_cntrl0.memBuffer:
-  memory_total_requests: 1560
-  memory_reads: 824
-  memory_writes: 736
-  memory_refreshes: 429
-  memory_total_request_delays: 1115
-  memory_delays_per_request: 0.714744
-  memory_delays_in_input_queue: 138
-  memory_delays_behind_head_of_bank_queue: 10
-  memory_delays_stalled_at_head_of_bank_queue: 967
-  memory_stalls_for_bank_busy: 228
+  memory_total_requests: 1617
+  memory_reads: 850
+  memory_writes: 767
+  memory_refreshes: 1196
+  memory_total_request_delays: 599
+  memory_delays_per_request: 0.370439
+  memory_delays_in_input_queue: 48
+  memory_delays_behind_head_of_bank_queue: 1
+  memory_delays_stalled_at_head_of_bank_queue: 550
+  memory_stalls_for_bank_busy: 172
   memory_stalls_for_random_busy: 0
   memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 72
-  memory_stalls_for_bus: 362
+  memory_stalls_for_arbitration: 40
+  memory_stalls_for_bus: 204
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 186
-  memory_stalls_for_read_read_turnaround: 119
-  accesses_per_bank: 47  55  53  77  82  53  68  47  52  57  48  52  53  45  30  61  44  37  47  47  54  41  43  45  39  47  27  43  41  34  39  52  
+  memory_stalls_for_read_write_turnaround: 52
+  memory_stalls_for_read_read_turnaround: 82
+  accesses_per_bank: 60  50  58  80  69  77  71  48  48  38  42  44  39  57  47  44  42  45  53  54  55  41  48  56  29  45  43  51  47  51  42  43  
 
  --- Directory ---
  - Event Counts -
-GETX [735 ] 735
-GETS [88 ] 88
-PUT [864 ] 864
+GETX [761 ] 761
+GETS [87 ] 87
+PUT [913 ] 913
 Unblock [0 ] 0
 UnblockS [0 ] 0
-UnblockM [820 ] 820
+UnblockM [845 ] 845
 Writeback_Clean [0 ] 0
 Writeback_Dirty [0 ] 0
-Writeback_Exclusive_Clean [80 ] 80
-Writeback_Exclusive_Dirty [736 ] 736
+Writeback_Exclusive_Clean [75 ] 75
+Writeback_Exclusive_Dirty [767 ] 767
 Pf_Replacement [0 ] 0
 DMA_READ [0 ] 0
 DMA_WRITE [0 ] 0
-Memory_Data [823 ] 823
-Memory_Ack [735 ] 735
+Memory_Data [850 ] 850
+Memory_Ack [767 ] 767
 Ack [0 ] 0
 Shared_Ack [0 ] 0
 Shared_Data [0 ] 0
@@ -635,8 +635,8 @@ All_acks_and_shared_data [0 ] 0
 All_acks_and_owner_data [0 ] 0
 All_acks_and_data_no_sharers [0 ] 0
 All_Unblocks [0 ] 0
-GETF [3 ] 3
-PUTF [3 ] 3
+GETF [5 ] 5
+PUTF [5 ] 5
 
  - Transitions -
 NX  GETX [0 ] 0
@@ -649,7 +649,7 @@ NX  GETF [0 ] 0
 
 NO  GETX [0 ] 0
 NO  GETS [0 ] 0
-NO  PUT [814 ] 814
+NO  PUT [838 ] 838
 NO  Pf_Replacement [0 ] 0
 NO  DMA_READ [0 ] 0
 NO  DMA_WRITE [0 ] 0
@@ -671,12 +671,12 @@ O  DMA_READ [0 ] 0
 O  DMA_WRITE [0 ] 0
 O  GETF [0 ] 0
 
-E  GETX [735 ] 735
-E  GETS [87 ] 87
+E  GETX [761 ] 761
+E  GETS [85 ] 85
 E  PUT [0 ] 0
 E  DMA_READ [0 ] 0
 E  DMA_WRITE [0 ] 0
-E  GETF [2 ] 2
+E  GETF [4 ] 4
 
 O_R  GETX [0 ] 0
 O_R  GETS [0 ] 0
@@ -713,9 +713,9 @@ NO_R  GETF [0 ] 0
 
 NO_B  GETX [0 ] 0
 NO_B  GETS [0 ] 0
-NO_B  PUT [50 ] 50
+NO_B  PUT [75 ] 75
 NO_B  UnblockS [0 ] 0
-NO_B  UnblockM [820 ] 820
+NO_B  UnblockM [845 ] 845
 NO_B  Pf_Replacement [0 ] 0
 NO_B  DMA_READ [0 ] 0
 NO_B  DMA_WRITE [0 ] 0
@@ -769,7 +769,7 @@ NO_B_W  UnblockM [0 ] 0
 NO_B_W  Pf_Replacement [0 ] 0
 NO_B_W  DMA_READ [0 ] 0
 NO_B_W  DMA_WRITE [0 ] 0
-NO_B_W  Memory_Data [821 ] 821
+NO_B_W  Memory_Data [846 ] 846
 NO_B_W  GETF [0 ] 0
 
 O_B_W  GETX [0 ] 0
@@ -896,8 +896,8 @@ WB  PUT [0 ] 0
 WB  Unblock [0 ] 0
 WB  Writeback_Clean [0 ] 0
 WB  Writeback_Dirty [0 ] 0
-WB  Writeback_Exclusive_Clean [80 ] 80
-WB  Writeback_Exclusive_Dirty [736 ] 736
+WB  Writeback_Exclusive_Clean [75 ] 75
+WB  Writeback_Exclusive_Dirty [767 ] 767
 WB  Pf_Replacement [0 ] 0
 WB  DMA_READ [0 ] 0
 WB  DMA_WRITE [0 ] 0
@@ -913,12 +913,12 @@ WB_O_W  Memory_Ack [0 ] 0
 WB_O_W  GETF [0 ] 0
 
 WB_E_W  GETX [0 ] 0
-WB_E_W  GETS [0 ] 0
+WB_E_W  GETS [1 ] 1
 WB_E_W  PUT [0 ] 0
 WB_E_W  Pf_Replacement [0 ] 0
 WB_E_W  DMA_READ [0 ] 0
 WB_E_W  DMA_WRITE [0 ] 0
-WB_E_W  Memory_Ack [735 ] 735
+WB_E_W  Memory_Ack [767 ] 767
 WB_E_W  GETF [0 ] 0
 
 NO_F  GETX [0 ] 0
@@ -927,7 +927,7 @@ NO_F  PUT [0 ] 0
 NO_F  UnblockM [0 ] 0
 NO_F  Pf_Replacement [0 ] 0
 NO_F  GETF [0 ] 0
-NO_F  PUTF [3 ] 3
+NO_F  PUTF [5 ] 5
 
 NO_F_W  GETX [0 ] 0
 NO_F_W  GETS [0 ] 0
@@ -935,6 +935,6 @@ NO_F_W  PUT [0 ] 0
 NO_F_W  Pf_Replacement [0 ] 0
 NO_F_W  DMA_READ [0 ] 0
 NO_F_W  DMA_WRITE [0 ] 0
-NO_F_W  Memory_Data [2 ] 2
+NO_F_W  Memory_Data [4 ] 4
 NO_F_W  GETF [0 ] 0
 

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout
index a8e08a1e365d0bcfa41ebde25d50efa854b2c93f..4f22200bf3877f6688a7c16f05e5a78db9994bc0 100755 (executable)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout
@@ -1,10 +1,12 @@
+Redirecting stdout to build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer/simout
+Redirecting stderr to build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 28 2012 11:27:37
-gem5 started Jul 28 2012 11:35:39
-gem5 executing on zizzer
+gem5 compiled Sep  1 2012 13:53:26
+gem5 started Sep  1 2012 13:57:00
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer -re tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 205611 because Ruby Tester completed
+Exiting @ tick 172201 because Ruby Tester completed

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt
index 8c3ff8304b1dc3f7a245fd854967c7ef5d5c0bec..9f304868ae2ef74a2039eedb75fae64b3868f77e 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt
@@ -1,12 +1,12 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000206                       # Number of seconds simulated
-sim_ticks                                      205611                       # Number of ticks simulated
-final_tick                                     205611                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.000172                       # Number of seconds simulated
+sim_ticks                                      172201                       # Number of ticks simulated
+final_tick                                     172201                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_tick_rate                                2054687                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 229284                       # Number of bytes of host memory used
-host_seconds                                     0.10                       # Real time elapsed on the host
+host_tick_rate                                1185587                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 260796                       # Number of bytes of host memory used
+host_seconds                                     0.15                       # Real time elapsed on the host
 system.l1_cntrl0.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl0.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
 system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini
index 1875c19df2dbf54179d7993067e22692697943e9..d66b5e6a2bcdddd5a96dec948599e9f5f92d6e44 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini
@@ -10,6 +10,7 @@ time_sync_spin_threshold=100000
 type=System
 children=dir_cntrl0 l1_cntrl0 physmem ruby sys_port_proxy tester
 boot_osflags=a
+clock=1
 init_param=0
 kernel=
 load_addr_mask=1099511627775
@@ -56,9 +57,9 @@ bank_busy_time=11
 bank_queue_size=12
 banks_per_rank=8
 basic_bus_busy_time=2
+clock=3
 dimm_bit_0=12
 dimms_per_channel=2
-mem_bus_cycle_multiplier=10
 mem_ctl_latency=12
 mem_fixed_delay=0
 mem_random_arbitrate=0
@@ -67,6 +68,7 @@ rank_rank_delay=1
 ranks_per_dimm=2
 read_write_delay=2
 refresh_period=1560
+ruby_system=system.ruby
 tFaw=0
 version=0
 
@@ -103,6 +105,7 @@ tagArrayBanks=1
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
 access_phys_mem=false
+clock=1
 dcache=system.l1_cntrl0.cacheMemory
 deadlock_threshold=500000
 icache=system.l1_cntrl0.cacheMemory
@@ -118,6 +121,7 @@ slave=system.tester.cpuDataPort[0] system.tester.cpuInstPort[0]
 
 [system.physmem]
 type=SimpleMemory
+clock=1
 conf_table_reported=false
 file=
 in_addr_map=true
@@ -219,6 +223,7 @@ ruby_system=system.ruby
 [system.sys_port_proxy]
 type=RubyPortProxy
 access_phys_mem=true
+clock=1
 ruby_system=system.ruby
 support_data_reqs=true
 support_inst_reqs=true
@@ -232,6 +237,7 @@ slave=system.system_port
 type=RubyTester
 check_flush=false
 checks_to_complete=100
+clock=1
 deadlock_threshold=50000
 num_cpus=1
 system=system

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats
index 3a69fd2a107308e6659b356907e08d0c67e68c37..ec81e3ed4d078bb79e1dfa11b085fb4e0353299c 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats
@@ -1,4 +1,4 @@
-Real time: Jul/10/2012 17:29:08
+Real time: Sep/01/2012 13:48:35
 
 Profiler Stats
 --------------
@@ -7,20 +7,20 @@ Elapsed_time_in_minutes: 0
 Elapsed_time_in_hours: 0
 Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 0.44
-Virtual_time_in_minutes: 0.00733333
-Virtual_time_in_hours:   0.000122222
-Virtual_time_in_days:    5.09259e-06
+Virtual_time_in_seconds: 0.41
+Virtual_time_in_minutes: 0.00683333
+Virtual_time_in_hours:   0.000113889
+Virtual_time_in_days:    4.74537e-06
 
-Ruby_current_time: 280571
+Ruby_current_time: 221941
 Ruby_start_time: 0
-Ruby_cycles: 280571
+Ruby_cycles: 221941
 
-mbytes_resident: 41.2305
-mbytes_total: 224.867
-resident_ratio: 0.18339
+mbytes_resident: 43.6133
+mbytes_total: 254.102
+resident_ratio: 0.171699
 
-ruby_cycles_executed: [ 280572 ]
+ruby_cycles_executed: [ 221942 ]
 
 Busy Controller Counts:
 L1Cache-0:0  
@@ -29,16 +29,16 @@ Directory-0:0
 
 Busy Bank Count:0
 
-sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1000 average: 15.774 | standard deviation: 1.14469 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 8 93 886 ]
+sequencer_requests_outstanding: [binsize: 1 max: 16 count: 969 average: 15.7379 | standard deviation: 1.20089 | 0 1 1 1 1 1 1 2 1 1 1 1 1 1 9 110 836 ]
 
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
-miss_latency: [binsize: 32 max: 6185 count: 986 average: 4512.83 | standard deviation: 564.917 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 2 0 2 0 1 1 1 0 3 0 1 1 2 5 4 6 5 8 7 2 12 9 11 7 16 19 21 19 24 15 26 28 20 22 22 30 33 30 27 30 31 27 29 27 19 18 31 35 23 21 29 18 15 18 17 12 17 5 13 10 2 9 7 5 6 6 5 5 6 4 1 2 3 1 1 0 3 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ]
-miss_latency_LD: [binsize: 32 max: 5593 count: 43 average:  4526 | standard deviation: 440.983 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 2 2 2 1 1 1 1 1 0 1 1 0 3 1 0 1 1 2 2 1 0 2 1 1 1 2 0 1 1 0 1 0 0 1 1 0 0 0 0 0 0 0 0 2 0 0 0 0 1 ]
-miss_latency_ST: [binsize: 32 max: 6185 count: 886 average: 4517.13 | standard deviation: 578.837 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 2 0 2 0 1 1 1 0 2 0 1 1 2 5 4 6 4 6 4 2 12 9 10 5 15 13 17 16 20 14 20 25 18 21 19 29 32 26 25 26 30 26 26 25 16 17 28 32 21 17 25 17 14 15 16 11 17 5 9 8 2 9 7 5 6 5 5 5 4 4 1 2 3 0 1 0 3 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ]
-miss_latency_IFETCH: [binsize: 32 max: 5314 count: 57 average: 4436.05 | standard deviation: 407.417 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 3 0 0 0 0 1 1 4 2 1 3 0 5 2 1 1 2 0 1 1 1 4 0 0 1 0 2 1 1 2 1 3 2 1 0 2 1 0 0 0 3 1 0 0 0 0 0 1 ]
-miss_latency_L1Cache: [binsize: 32 max: 5682 count: 39 average: 3989.69 | standard deviation: 543.603 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 1 0 2 0 0 1 0 2 1 1 2 1 1 0 3 1 0 0 0 0 1 2 0 0 0 2 1 2 0 1 0 0 2 0 1 0 0 0 1 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
-miss_latency_Directory: [binsize: 32 max: 6185 count: 947 average: 4534.38 | standard deviation: 555.581 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 1 0 1 0 2 3 3 5 3 7 6 2 9 8 11 7 16 19 20 17 24 15 26 26 19 20 22 29 33 30 25 30 30 27 29 27 18 18 29 35 23 21 29 18 15 18 17 11 17 5 13 10 2 9 7 5 6 6 5 5 6 4 1 2 3 1 1 0 2 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ]
+miss_latency: [binsize: 32 max: 5298 count: 954 average: 3683.39 | standard deviation: 578.018 | 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 2 0 1 2 1 0 0 4 1 1 3 4 7 5 7 8 7 5 12 10 2 14 13 15 12 17 17 14 19 13 18 33 11 18 28 22 17 19 33 19 21 25 18 14 24 16 14 26 22 18 13 28 16 20 20 19 12 15 20 16 17 12 14 11 10 14 7 5 6 12 1 4 6 2 1 1 0 0 2 2 0 0 2 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_LD: [binsize: 32 max: 4587 count: 42 average: 3722.1 | standard deviation: 463.961 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 0 1 0 0 0 0 4 0 1 1 0 0 1 0 0 1 2 1 0 0 2 0 0 5 1 1 0 0 4 1 2 0 1 1 0 1 1 0 0 0 1 1 1 0 0 0 0 1 1 1 ]
+miss_latency_ST: [binsize: 32 max: 5298 count: 854 average: 3677.29 | standard deviation: 585.222 | 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 2 0 1 2 1 0 0 3 1 1 3 4 7 5 6 6 6 5 11 6 2 12 12 15 9 15 13 14 18 11 16 33 7 17 27 19 14 18 32 19 18 23 17 8 22 15 14 24 16 14 10 27 14 18 20 17 11 13 19 15 13 11 13 11 9 13 5 4 5 9 0 4 6 2 1 1 0 0 2 2 0 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_IFETCH: [binsize: 32 max: 5106 count: 58 average: 3745.14 | standard deviation: 548.056 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 3 0 1 1 0 3 2 0 0 0 1 2 0 3 1 1 2 1 0 1 0 1 2 1 1 1 0 0 2 2 3 1 1 1 1 0 1 0 2 1 1 3 0 0 0 1 1 2 0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_L1Cache: [binsize: 32 max: 4375 count: 38 average: 3245.53 | standard deviation: 508.825 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 1 0 1 0 2 1 0 2 2 1 2 1 2 1 0 0 0 0 1 2 0 0 3 1 3 0 0 0 0 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_Directory: [binsize: 32 max: 5298 count: 916 average: 3701.55 | standard deviation: 573.776 | 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 4 1 1 2 3 7 4 7 6 6 5 10 8 1 12 12 13 11 17 17 14 19 12 16 33 11 15 27 19 17 19 33 19 21 24 17 14 23 16 13 25 22 18 13 28 16 20 20 19 11 15 19 16 17 12 13 11 10 14 7 5 6 12 1 4 6 2 1 1 0 0 2 2 0 0 2 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -48,12 +48,12 @@ miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average:
 miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
 miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
-imcomplete_dir_Times: 947
-miss_latency_LD_Directory: [binsize: 32 max: 5593 count: 43 average:  4526 | standard deviation: 440.983 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 2 2 2 1 1 1 1 1 0 1 1 0 3 1 0 1 1 2 2 1 0 2 1 1 1 2 0 1 1 0 1 0 0 1 1 0 0 0 0 0 0 0 0 2 0 0 0 0 1 ]
-miss_latency_ST_L1Cache: [binsize: 32 max: 5682 count: 37 average: 4008.19 | standard deviation: 551.275 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 0 1 1 1 0 1 0 0 1 0 2 1 1 2 0 1 0 3 1 0 0 0 0 1 2 0 0 0 2 1 2 0 1 0 0 2 0 1 0 0 0 1 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
-miss_latency_ST_Directory: [binsize: 32 max: 6185 count: 849 average: 4539.31 | standard deviation: 570.066 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 1 0 1 0 2 3 3 5 2 6 3 2 9 8 10 5 15 13 16 14 20 14 20 23 17 19 19 28 32 26 23 26 29 26 26 25 15 17 26 32 21 17 25 17 14 15 16 10 17 5 9 8 2 9 7 5 6 5 5 5 4 4 1 2 3 0 1 0 2 1 4 3 0 1 0 1 4 2 0 0 1 1 0 0 1 ]
-miss_latency_IFETCH_L1Cache: [binsize: 32 max: 3792 count: 2 average: 3647.5 | standard deviation: 204.355 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ]
-miss_latency_IFETCH_Directory: [binsize: 32 max: 5314 count: 55 average: 4464.73 | standard deviation: 384.051 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 0 0 0 1 1 4 2 1 3 0 5 2 1 1 2 0 1 1 1 4 0 0 1 0 2 1 1 2 1 3 2 1 0 2 1 0 0 0 3 1 0 0 0 0 0 1 ]
+imcomplete_dir_Times: 916
+miss_latency_LD_Directory: [binsize: 32 max: 4587 count: 42 average: 3722.1 | standard deviation: 463.961 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 0 1 0 0 0 0 4 0 1 1 0 0 1 0 0 1 2 1 0 0 2 0 0 5 1 1 0 0 4 1 2 0 1 1 0 1 1 0 0 0 1 1 1 0 0 0 0 1 1 1 ]
+miss_latency_ST_L1Cache: [binsize: 32 max: 4375 count: 36 average:  3241 | standard deviation: 520.843 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 1 0 1 0 2 1 0 2 2 1 2 1 2 0 0 0 0 0 1 2 0 0 3 1 2 0 0 0 0 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST_Directory: [binsize: 32 max: 5298 count: 818 average: 3696.49 | standard deviation: 580.688 | 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 3 1 1 2 3 7 4 6 4 5 5 9 4 1 10 11 13 9 15 13 14 18 10 14 33 7 14 26 17 14 18 32 19 18 22 16 8 21 15 13 23 16 14 10 27 14 18 20 17 10 13 18 15 13 11 12 11 9 13 5 4 5 9 0 4 6 2 1 1 0 0 2 2 0 0 2 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_IFETCH_L1Cache: [binsize: 32 max: 3515 count: 2 average:  3327 | standard deviation: 265.872 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_IFETCH_Directory: [binsize: 32 max: 5106 count: 56 average: 3760.07 | standard deviation: 550.834 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 3 0 1 1 0 2 2 0 0 0 1 2 0 3 1 1 1 1 0 1 0 1 2 1 1 1 0 0 2 2 3 1 1 1 1 0 1 0 2 1 1 3 0 0 0 1 1 2 0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -67,11 +67,11 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN
 
 Message Delayed Cycles
 ----------------------
-Total_delay_cycles: [binsize: 1 max: 8 count: 1890 average: 0.140212 | standard deviation: 0.700147 | 1792 21 32 25 7 8 1 1 3 ]
-Total_nonPF_delay_cycles: [binsize: 1 max: 8 count: 1890 average: 0.140212 | standard deviation: 0.700147 | 1792 21 32 25 7 8 1 1 3 ]
+Total_delay_cycles: [binsize: 1 max: 12 count: 1828 average: 0.280088 | standard deviation: 1.03285 | 1658 32 43 46 23 10 9 2 2 2 0 0 1 ]
+Total_nonPF_delay_cycles: [binsize: 1 max: 12 count: 1828 average: 0.280088 | standard deviation: 1.03285 | 1658 32 43 46 23 10 9 2 2 2 0 0 1 ]
   virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
-  virtual_network_1_delay_cycles: [binsize: 1 max: 8 count: 947 average: 0.198522 | standard deviation: 0.78638 | 871 19 27 18 5 5 0 0 2 ]
-  virtual_network_2_delay_cycles: [binsize: 1 max: 8 count: 943 average: 0.0816543 | standard deviation: 0.596344 | 921 2 5 7 2 3 1 1 1 ]
+  virtual_network_1_delay_cycles: [binsize: 1 max: 7 count: 916 average: 0.265284 | standard deviation: 0.915561 | 824 19 30 28 3 6 4 2 ]
+  virtual_network_2_delay_cycles: [binsize: 1 max: 12 count: 912 average: 0.294956 | standard deviation: 1.13907 | 834 13 13 18 20 4 5 0 2 2 0 0 1 ]
   virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
   virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
@@ -85,83 +85,83 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 11714
+page_reclaims: 8164
 page_faults: 0
 swaps: 0
 block_inputs: 0
-block_outputs: 0
+block_outputs: 80
 
 Network Stats
 -------------
 
-total_msg_count_Control: 2841 22728
-total_msg_count_Data: 2833 203976
-total_msg_count_Response_Data: 2841 204552
-total_msg_count_Writeback_Control: 2829 22632
-total_msgs: 11344 total_bytes: 453888
+total_msg_count_Control: 2748 21984
+total_msg_count_Data: 2742 197424
+total_msg_count_Response_Data: 2748 197856
+total_msg_count_Writeback_Control: 2739 21912
+total_msgs: 10977 total_bytes: 439176
 
 switch_0_inlinks: 2
 switch_0_outlinks: 2
-links_utilized_percent_switch_0: 1.68505
-  links_utilized_percent_switch_0_link_0: 1.68692 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_0_link_1: 1.68317 bw: 16000 base_latency: 1
+links_utilized_percent_switch_0: 2.06125
+  links_utilized_percent_switch_0_link_0: 2.06294 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_0_link_1: 2.05956 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_0_link_0_Response_Data: 947 68184 [ 0 0 0 0 947 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_0_Writeback_Control: 943 7544 [ 0 0 0 943 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Control: 947 7576 [ 0 0 947 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_0_link_1_Data: 945 68040 [ 0 0 945 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Response_Data: 916 65952 [ 0 0 0 0 916 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_0_Writeback_Control: 913 7304 [ 0 0 0 913 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Control: 916 7328 [ 0 0 916 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_0_link_1_Data: 914 65808 [ 0 0 914 0 0 0 0 0 0 0 ] base_latency: 1
 
 switch_1_inlinks: 2
 switch_1_outlinks: 2
-links_utilized_percent_switch_1: 1.68487
-  links_utilized_percent_switch_1_link_0: 1.68282 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_1_link_1: 1.68692 bw: 16000 base_latency: 1
+links_utilized_percent_switch_1: 2.06125
+  links_utilized_percent_switch_1_link_0: 2.05956 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_1_link_1: 2.06294 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_1_link_0_Control: 947 7576 [ 0 0 947 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_0_Data: 944 67968 [ 0 0 944 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Response_Data: 947 68184 [ 0 0 0 0 947 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_1_link_1_Writeback_Control: 943 7544 [ 0 0 0 943 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Control: 916 7328 [ 0 0 916 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_0_Data: 914 65808 [ 0 0 914 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Response_Data: 916 65952 [ 0 0 0 0 916 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_1_link_1_Writeback_Control: 913 7304 [ 0 0 0 913 0 0 0 0 0 0 ] base_latency: 1
 
 switch_2_inlinks: 2
 switch_2_outlinks: 2
-links_utilized_percent_switch_2: 1.68487
-  links_utilized_percent_switch_2_link_0: 1.68692 bw: 16000 base_latency: 1
-  links_utilized_percent_switch_2_link_1: 1.68282 bw: 16000 base_latency: 1
+links_utilized_percent_switch_2: 2.06125
+  links_utilized_percent_switch_2_link_0: 2.06294 bw: 16000 base_latency: 1
+  links_utilized_percent_switch_2_link_1: 2.05956 bw: 16000 base_latency: 1
 
-  outgoing_messages_switch_2_link_0_Response_Data: 947 68184 [ 0 0 0 0 947 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_0_Writeback_Control: 943 7544 [ 0 0 0 943 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Control: 947 7576 [ 0 0 947 0 0 0 0 0 0 0 ] base_latency: 1
-  outgoing_messages_switch_2_link_1_Data: 944 67968 [ 0 0 944 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Response_Data: 916 65952 [ 0 0 0 0 916 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_0_Writeback_Control: 913 7304 [ 0 0 0 913 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Control: 916 7328 [ 0 0 916 0 0 0 0 0 0 0 ] base_latency: 1
+  outgoing_messages_switch_2_link_1_Data: 914 65808 [ 0 0 914 0 0 0 0 0 0 0 ] base_latency: 1
 
 Cache Stats: system.l1_cntrl0.cacheMemory
-  system.l1_cntrl0.cacheMemory_total_misses: 949
-  system.l1_cntrl0.cacheMemory_total_demand_misses: 949
+  system.l1_cntrl0.cacheMemory_total_misses: 917
+  system.l1_cntrl0.cacheMemory_total_demand_misses: 917
   system.l1_cntrl0.cacheMemory_total_prefetches: 0
   system.l1_cntrl0.cacheMemory_total_sw_prefetches: 0
   system.l1_cntrl0.cacheMemory_total_hw_prefetches: 0
 
-  system.l1_cntrl0.cacheMemory_request_type_LD:   4.63646%
-  system.l1_cntrl0.cacheMemory_request_type_ST:   89.568%
-  system.l1_cntrl0.cacheMemory_request_type_IFETCH:   5.79557%
+  system.l1_cntrl0.cacheMemory_request_type_LD:   4.58015%
+  system.l1_cntrl0.cacheMemory_request_type_ST:   89.313%
+  system.l1_cntrl0.cacheMemory_request_type_IFETCH:   6.10687%
 
-  system.l1_cntrl0.cacheMemory_access_mode_type_Supervisor:   949    100%
+  system.l1_cntrl0.cacheMemory_access_mode_type_Supervisor:   917    100%
 
  --- L1Cache ---
  - Event Counts -
-Load [44 ] 44
-Ifetch [57 ] 57
-Store [887 ] 887
-Data [947 ] 947
+Load [42 ] 42
+Ifetch [58 ] 58
+Store [855 ] 855
+Data [916 ] 916
 Fwd_GETX [0 ] 0
 Inv [0 ] 0
-Replacement [946 ] 946
-Writeback_Ack [943 ] 943
+Replacement [914 ] 914
+Writeback_Ack [912 ] 912
 Writeback_Nack [0 ] 0
 
  - Transitions -
-I  Load [44 ] 44
-I  Ifetch [55 ] 55
-I  Store [850 ] 850
+I  Load [42 ] 42
+I  Ifetch [56 ] 56
+I  Store [819 ] 819
 I  Inv [0 ] 0
 I  Replacement [0 ] 0
 
@@ -169,61 +169,61 @@ II  Writeback_Nack [0 ] 0
 
 M  Load [0 ] 0
 M  Ifetch [2 ] 2
-M  Store [37 ] 37
+M  Store [36 ] 36
 M  Fwd_GETX [0 ] 0
 M  Inv [0 ] 0
-M  Replacement [946 ] 946
+M  Replacement [914 ] 914
 
 MI  Fwd_GETX [0 ] 0
 MI  Inv [0 ] 0
-MI  Writeback_Ack [943 ] 943
+MI  Writeback_Ack [912 ] 912
 MI  Writeback_Nack [0 ] 0
 
 MII  Fwd_GETX [0 ] 0
 
 IS  Data [98 ] 98
 
-IM  Data [849 ] 849
+IM  Data [818 ] 818
 
 Memory controller: system.dir_cntrl0.memBuffer:
-  memory_total_requests: 1891
-  memory_reads: 947
-  memory_writes: 944
-  memory_refreshes: 585
-  memory_total_request_delays: 2814
-  memory_delays_per_request: 1.4881
-  memory_delays_in_input_queue: 676
-  memory_delays_behind_head_of_bank_queue: 12
-  memory_delays_stalled_at_head_of_bank_queue: 2126
-  memory_stalls_for_bank_busy: 294
+  memory_total_requests: 1830
+  memory_reads: 916
+  memory_writes: 914
+  memory_refreshes: 1542
+  memory_total_request_delays: 1930
+  memory_delays_per_request: 1.05464
+  memory_delays_in_input_queue: 182
+  memory_delays_behind_head_of_bank_queue: 3
+  memory_delays_stalled_at_head_of_bank_queue: 1745
+  memory_stalls_for_bank_busy: 343
   memory_stalls_for_random_busy: 0
   memory_stalls_for_anti_starvation: 0
-  memory_stalls_for_arbitration: 265
-  memory_stalls_for_bus: 935
+  memory_stalls_for_arbitration: 167
+  memory_stalls_for_bus: 617
   memory_stalls_for_tfaw: 0
-  memory_stalls_for_read_write_turnaround: 518
-  memory_stalls_for_read_read_turnaround: 114
-  accesses_per_bank: 46  50  40  88  149  74  58  50  50  48  58  62  54  60  56  58  60  62  54  54  63  54  56  44  54  77  52  48  46  62  46  58  
+  memory_stalls_for_read_write_turnaround: 556
+  memory_stalls_for_read_read_turnaround: 62
+  accesses_per_bank: 64  60  44  96  107  64  62  38  55  54  54  36  48  34  66  48  56  54  60  70  56  62  44  62  48  58  64  72  46  46  36  66  
 
  --- Directory ---
  - Event Counts -
-GETX [947 ] 947
+GETX [916 ] 916
 GETS [0 ] 0
-PUTX [944 ] 944
+PUTX [914 ] 914
 PUTX_NotOwner [0 ] 0
 DMA_READ [0 ] 0
 DMA_WRITE [0 ] 0
-Memory_Data [947 ] 947
-Memory_Ack [944 ] 944
+Memory_Data [916 ] 916
+Memory_Ack [914 ] 914
 
  - Transitions -
-I  GETX [947 ] 947
+I  GETX [916 ] 916
 I  PUTX_NotOwner [0 ] 0
 I  DMA_READ [0 ] 0
 I  DMA_WRITE [0 ] 0
 
 M  GETX [0 ] 0
-M  PUTX [944 ] 944
+M  PUTX [914 ] 914
 M  PUTX_NotOwner [0 ] 0
 M  DMA_READ [0 ] 0
 M  DMA_WRITE [0 ] 0
@@ -246,7 +246,7 @@ IM  PUTX [0 ] 0
 IM  PUTX_NotOwner [0 ] 0
 IM  DMA_READ [0 ] 0
 IM  DMA_WRITE [0 ] 0
-IM  Memory_Data [947 ] 947
+IM  Memory_Data [916 ] 916
 
 MI  GETX [0 ] 0
 MI  GETS [0 ] 0
@@ -254,7 +254,7 @@ MI  PUTX [0 ] 0
 MI  PUTX_NotOwner [0 ] 0
 MI  DMA_READ [0 ] 0
 MI  DMA_WRITE [0 ] 0
-MI  Memory_Ack [944 ] 944
+MI  Memory_Ack [914 ] 914
 
 ID  GETX [0 ] 0
 ID  GETS [0 ] 0

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout
index 61f11453b8f3c9ef68b0f96df82c6f8ccb73274d..7d0232d919e06190edf272758deb63e3d6b82509 100755 (executable)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout
@@ -1,10 +1,12 @@
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 10 2012 16:32:12
-gem5 started Jul 10 2012 17:29:08
-gem5 executing on sc2b0605
+gem5 compiled Sep  1 2012 13:41:29
+gem5 started Sep  1 2012 13:48:35
+gem5 executing on doudou.cs.wisc.edu
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby -re tests/run.py build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 280571 because Ruby Tester completed
+Exiting @ tick 221941 because Ruby Tester completed

diff --git a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt
index 4325e7de4e7aff2b7df4e610e515a6b04ee4d1fb..1afc580a0e6ea9757fc8789efbb1b81cf61c9707 100644 (file)
--- a/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt
+++ b/tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt
@@ -1,11 +1,11 @@
 
 ---------- Begin Simulation Statistics ----------
-sim_seconds                                  0.000281                       # Number of seconds simulated
-sim_ticks                                      280571                       # Number of ticks simulated
-final_tick                                     280571                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds                                  0.000222                       # Number of seconds simulated
+sim_ticks                                      221941                       # Number of ticks simulated
+final_tick                                     221941                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_tick_rate                                2647246                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 230268                       # Number of bytes of host memory used
+host_tick_rate                                2057251                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 260204                       # Number of bytes of host memory used
 host_seconds                                     0.11                       # Real time elapsed on the host
 system.l1_cntrl0.cacheMemory.num_data_array_reads            0                       # number of data array reads
 system.l1_cntrl0.cacheMemory.num_data_array_writes            0                       # number of data array writes