revert: re PR target/70738 (Add -mgeneral-regs-only option)

Revert:

gcc/

	PR target/70738
	* common/config/i386/i386-common.c
	(OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET): New.
	(ix86_handle_option): Disable MPX, MMX, SSE and x87 instructions
	for -mgeneral-regs-only.
	* config/i386/i386.c (ix86_option_override_internal): Don't
	enable x87 instructions if only the general registers are
	allowed.
	* config/i386/i386.opt: Add -mgeneral-regs-only.
	* doc/invoke.texi: Document -mgeneral-regs-only.

gcc/testsuite/

	PR target/70738
	* gcc.target/i386/pr70738-1.c: Likewise.
	* gcc.target/i386/pr70738-2.c: Likewise.
	* gcc.target/i386/pr70738-3.c: Likewise.
	* gcc.target/i386/pr70738-4.c: Likewise.
	* gcc.target/i386/pr70738-5.c: Likewise.
	* gcc.target/i386/pr70738-6.c: Likewise.
	* gcc.target/i386/pr70738-7.c: Likewise.
	* gcc.target/i386/pr70738-8.c: Likewise.
	* gcc.target/i386/pr70738-9.c: Likewise.

From-SVN: r236570

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3702823ca50c991133b5e5602d92e99a935baa6c..e113f7958f9e13bbae2141246d91d9a31bcf5d2b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -103,19 +103,6 @@
 
        * config/nvptx/nvptx.md (sincossf3): New pattern.
 
-2016-05-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-       PR target/70738
-       * common/config/i386/i386-common.c
-       (OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET): New.
-       (ix86_handle_option): Disable MPX, MMX, SSE and x87 instructions
-       for -mgeneral-regs-only.
-       * config/i386/i386.c (ix86_option_override_internal): Don't
-       enable x87 instructions if only the general registers are
-       allowed.
-       * config/i386/i386.opt: Add -mgeneral-regs-only.
-       * doc/invoke.texi: Document -mgeneral-regs-only.
-
 2016-05-20  David Malcolm  <dmalcolm@redhat.com>
 
        * calls.c (maybe_complain_about_tail_call): New function.

diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c
index b150c9e78857521bdad21063314d988502dff184..cc65c8c8a514933f26fc5c9b49ddf08fd2ebce97 100644 (file)
--- a/gcc/common/config/i386/i386-common.c
+++ b/gcc/common/config/i386/i386-common.c
@@ -223,11 +223,6 @@ along with GCC; see the file COPYING3.  If not see
 #define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND
 #define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C
 
-#define OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET \
-  (OPTION_MASK_ISA_MMX_UNSET \
-   | OPTION_MASK_ISA_SSE_UNSET \
-   | OPTION_MASK_ISA_MPX)
-
 /* Implement TARGET_HANDLE_OPTION.  */
 
 bool
@@ -241,21 +236,6 @@ ix86_handle_option (struct gcc_options *opts,
 
   switch (code)
     {
-    case OPT_mgeneral_regs_only:
-      if (value)
-       {
-         /* Disable MPX, MMX, SSE and x87 instructions if only the
-            general registers are allowed..  */
-         opts->x_ix86_isa_flags
-           &= ~OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET;
-         opts->x_ix86_isa_flags_explicit
-           |= OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET;
-         opts->x_target_flags &= ~MASK_80387;
-       }
-      else
-       gcc_unreachable ();
-      return true;
-
     case OPT_mmmx:
       if (value)
        {

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 54483168fed979e8297e8ccfbe2a7e8e4743f6ab..1cb88d6dc0a5eae2ee2abd834fd99967e9f22c02 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -5337,10 +5337,7 @@ ix86_option_override_internal (bool main_args_p,
            && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PKU))
          opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PKU;
 
-       /* Don't enable x87 instructions if only the general registers
-          are allowed.  */
-       if (!(opts_set->x_target_flags & MASK_GENERAL_REGS_ONLY)
-           && !(opts_set->x_target_flags & MASK_80387))
+       if (!(opts_set->x_target_flags & MASK_80387))
          {
            if (processor_alias_table[i].flags & PTA_NO_80387)
              opts->x_target_flags &= ~MASK_80387;

diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index d12b29a672263d4ca432617612f788841e929a4f..36dd4bd1572c582a8b69e100aeedacdf2d86eb13 100644 (file)
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -897,7 +897,3 @@ Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)
 mmitigate-rop
 Target Var(flag_mitigate_rop) Init(0)
 Attempt to avoid generating instruction sequences containing ret bytes.
-
-mgeneral-regs-only
-Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save
-Generate code which uses only the general registers.

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 926e1e6499e62265a38eb2cd13f22247312eccbd..f3d087f9cad4889c88115693416dffa3a97a2008 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1172,7 +1172,7 @@ See RS/6000 and PowerPC Options.
 -msse2avx -mfentry -mrecord-mcount -mnop-mcount -m8bit-idiv @gol
 -mavx256-split-unaligned-load -mavx256-split-unaligned-store @gol
 -malign-data=@var{type} -mstack-protector-guard=@var{guard} @gol
--mmitigate-rop -mgeneral-regs-only}
+-mmitigate-rop}
 
 @emph{x86 Windows Options}
 @gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll @gol
@@ -24264,12 +24264,6 @@ opcodes, to mitigate against certain forms of attack. At the moment,
 this option is limited in what it can do and should not be relied
 on to provide serious protection.
 
-@item -mgeneral-regs-only
-@opindex mgeneral-regs-only
-Generate code that uses only the general-purpose registers.  This
-prevents the compiler from using floating-point, vector, mask and bound
-registers.
-
 @end table
 
 These @samp{-m} switches are supported in addition to the above

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 95728178282e9b0651295c0dae700b650f84282c..07c14704b79b7ad5cbc23e4c4b6e5497d293f82c 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -68,19 +68,6 @@
        PR c++/70572
        * g++.dg/cpp1y/auto-fn31.C: New.
 
-2016-05-20  H.J. Lu  <hongjiu.lu@intel.com>
-
-       PR target/70738
-       * gcc.target/i386/pr70738-1.c: Likewise.
-       * gcc.target/i386/pr70738-2.c: Likewise.
-       * gcc.target/i386/pr70738-3.c: Likewise.
-       * gcc.target/i386/pr70738-4.c: Likewise.
-       * gcc.target/i386/pr70738-5.c: Likewise.
-       * gcc.target/i386/pr70738-6.c: Likewise.
-       * gcc.target/i386/pr70738-7.c: Likewise.
-       * gcc.target/i386/pr70738-8.c: Likewise.
-       * gcc.target/i386/pr70738-9.c: Likewise.
-
 2016-05-20  Bill Seurer  <seurer@linux.vnet.ibm.com>
 
        * gcc.target/powerpc/vec-addec.c: New test.

diff --git a/gcc/testsuite/gcc.target/i386/pr70738-1.c b/gcc/testsuite/gcc.target/i386/pr70738-1.c
deleted file mode 100644 (file)
index 19381c2..0000000
--- a/gcc/testsuite/gcc.target/i386/pr70738-1.c
+++ /dev/null
@@ -1,9 +0,0 @@
-/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-msse2 -mgeneral-regs-only" } */
-
-typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));
-
-int32x2_t test (int32x2_t a, int32x2_t b)
-{ /* { dg-error "SSE register return with SSE disabled" } */
-  return a + b;
-}

diff --git a/gcc/testsuite/gcc.target/i386/pr70738-2.c b/gcc/testsuite/gcc.target/i386/pr70738-2.c
deleted file mode 100644 (file)
index 8b90904..0000000
--- a/gcc/testsuite/gcc.target/i386/pr70738-2.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* { dg-do compile { target ia32 } } */
-/* { dg-options "-mmmx -mgeneral-regs-only" } */
-
-typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));
-
-int32x2_t
-test (int32x2_t a, int32x2_t b) /* { dg-warning "MMX vector argument without MMX enabled" } */
-{ /* { dg-warning "MMX vector return without MMX enabled" } */
-  return a + b;
-}

diff --git a/gcc/testsuite/gcc.target/i386/pr70738-3.c b/gcc/testsuite/gcc.target/i386/pr70738-3.c
deleted file mode 100644 (file)
index 1ac3adb..0000000
--- a/gcc/testsuite/gcc.target/i386/pr70738-3.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-msse2 -mgeneral-regs-only" } */
-
-typedef int int32x4_t __attribute__ ((__vector_size__ ((16))));
-extern int32x4_t c;
-
-void
-test (int32x4_t a, int32x4_t b) /* { dg-warning "SSE vector argument without SSE enabled" } */
-{
-  c = a + b;
-}

diff --git a/gcc/testsuite/gcc.target/i386/pr70738-4.c b/gcc/testsuite/gcc.target/i386/pr70738-4.c
deleted file mode 100644 (file)
index c6d20f2..0000000
--- a/gcc/testsuite/gcc.target/i386/pr70738-4.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* { dg-do compile { target ia32 } } */
-/* { dg-options "-msse2 -mgeneral-regs-only" } */
-
-typedef int int32x4_t __attribute__ ((__vector_size__ ((16))));
-
-int32x4_t
-test (int32x4_t a, int32x4_t b) /* { dg-warning "SSE vector argument without SSE enabled" } */
-{ /* { dg-warning "SSE vector return without SSE enabled" } */
-  return a + b;
-}

diff --git a/gcc/testsuite/gcc.target/i386/pr70738-5.c b/gcc/testsuite/gcc.target/i386/pr70738-5.c
deleted file mode 100644 (file)
index 8b43809..0000000
--- a/gcc/testsuite/gcc.target/i386/pr70738-5.c
+++ /dev/null
@@ -1,16 +0,0 @@
-/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-msse2 -mgeneral-regs-only" } */
-
-#include <stdarg.h>
-
-typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));
-
-int
-test (int i, ...)
-{
-  va_list argp;
-  va_start (argp, i);
-  int32x2_t x = (int32x2_t) {0, 1};
-  x += va_arg (argp, int32x2_t); /* { dg-error "SSE register argument with SSE disabled" } */
-  return x[0] + x[1];
-}

diff --git a/gcc/testsuite/gcc.target/i386/pr70738-6.c b/gcc/testsuite/gcc.target/i386/pr70738-6.c
deleted file mode 100644 (file)
index 3bccabb..0000000
--- a/gcc/testsuite/gcc.target/i386/pr70738-6.c
+++ /dev/null
@@ -1,10 +0,0 @@
-/* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-msse2 -mgeneral-regs-only" } */
-
-extern float a, b, c;
-
-void
-foo (void)
-{
-  c = a * b; /* { dg-error "SSE register return with SSE disabled" } */
-}

diff --git a/gcc/testsuite/gcc.target/i386/pr70738-7.c b/gcc/testsuite/gcc.target/i386/pr70738-7.c
deleted file mode 100644 (file)
index 2e5b49f..0000000
--- a/gcc/testsuite/gcc.target/i386/pr70738-7.c
+++ /dev/null
@@ -1,13 +0,0 @@
-/* { dg-do compile { target ia32 } } */
-/* { dg-options "-msse2 -mgeneral-regs-only" } */
-
-extern float a, b, c;
-
-void
-foo (void)
-{
-  c = a * b;
-}
-
-/* { dg-final { scan-assembler-not "mulss" } } */
-/* { dg-final { scan-assembler "call\[ \t\]__mulsf3" } } */

diff --git a/gcc/testsuite/gcc.target/i386/pr70738-8.c b/gcc/testsuite/gcc.target/i386/pr70738-8.c
deleted file mode 100644 (file)
index 0740460..0000000
--- a/gcc/testsuite/gcc.target/i386/pr70738-8.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/* { dg-do run } */
-/* { dg-options "-O2 -mgeneral-regs-only" } */
-
-extern void abort ();
-
-int
-dec (int a, int b)
-{
-  return a + b;
-}
-
-int
-cal (int a, int b)
-{
-  int sum1 = a * b;
-  int sum2 = a / b;
-  int sum = dec (sum1, sum2);
-  return a + b + sum + sum1 + sum2;
-}
-
-int
-main (int argc, char **argv)
-{
-  int ret = cal (2, 1);
-
-  if (ret != 11)
-    abort ();
-
-  return 0;
-}

diff --git a/gcc/testsuite/gcc.target/i386/pr70738-9.c b/gcc/testsuite/gcc.target/i386/pr70738-9.c
deleted file mode 100644 (file)
index c71f0b0..0000000
--- a/gcc/testsuite/gcc.target/i386/pr70738-9.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/* { dg-do run } */
-/* { dg-options "-O2 -mgeneral-regs-only" } */
-
-extern void abort ();
-
-int
-cal (int a, int b)
-{
-  int sum = a + b;
-  int sum1 = a * b;
-  return (a + b + sum + sum1);
-}
-
-int
-main (int argc, char **argv)
-{
-  int ret = cal (1, 2);
-
-  if (ret != 8)
-    abort ();
-
-  return 0;
-}