i965/fs: introduce non-compressed equivalent of tex_cms

v2: introduces 'SHADER_OPCODE_TXF_UMS' also for gen8

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 12f7e407a622b904495db39732c7c3d36c00690c..7beda72bab05fd1f126b579874f757cde0469e3a 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -771,6 +771,7 @@ enum opcode {
    SHADER_OPCODE_TXS,
    FS_OPCODE_TXB,
    SHADER_OPCODE_TXF_CMS,
+   SHADER_OPCODE_TXF_UMS,
    SHADER_OPCODE_TXF_MCS,
    SHADER_OPCODE_LOD,
    SHADER_OPCODE_TG4,

diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 3cc34c8b430bfbeaea8339de6b11dbb810df1cf3..87280d2c721dc575f0d9cab9504d65084906c711 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -431,6 +431,10 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
          else
             msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LD;
          break;
+      case SHADER_OPCODE_TXF_UMS:
+         assert(brw->gen >= 7);
+         msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS;
+         break;
       case SHADER_OPCODE_TXF_MCS:
          assert(brw->gen >= 7);
          msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS;
@@ -1670,6 +1674,7 @@ fs_generator::generate_code(exec_list *instructions)
       case SHADER_OPCODE_TXD:
       case SHADER_OPCODE_TXF:
       case SHADER_OPCODE_TXF_CMS:
+      case SHADER_OPCODE_TXF_UMS:
       case SHADER_OPCODE_TXF_MCS:
       case SHADER_OPCODE_TXL:
       case SHADER_OPCODE_TXS:

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index b74d6e8e9d5c172e156d0098967f3c86080f8eed..b38032ec70fbf3b9c4f0e4d1abaced4b79b9894c 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -442,6 +442,8 @@ brw_instruction_name(enum opcode op)
       return "txb";
    case SHADER_OPCODE_TXF_CMS:
       return "txf_cms";
+   case SHADER_OPCODE_TXF_UMS:
+      return "txf_ums";
    case SHADER_OPCODE_TXF_MCS:
       return "txf_mcs";
    case SHADER_OPCODE_TG4:
@@ -539,6 +541,7 @@ backend_instruction::is_tex()
            opcode == SHADER_OPCODE_TXD ||
            opcode == SHADER_OPCODE_TXF ||
            opcode == SHADER_OPCODE_TXF_CMS ||
+           opcode == SHADER_OPCODE_TXF_UMS ||
            opcode == SHADER_OPCODE_TXF_MCS ||
            opcode == SHADER_OPCODE_TXL ||
            opcode == SHADER_OPCODE_TXS ||

diff --git a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
index 4e705348295c22a21e147620dc7aafc55dd98e7e..6c710bc8a0c1d5abeaf99dc32ce4e4d87781bacf 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
@@ -197,6 +197,9 @@ gen8_fs_generator::generate_tex(fs_inst *ir,
    case SHADER_OPCODE_TXF_CMS:
       msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS;
       break;
+   case SHADER_OPCODE_TXF_UMS:
+      msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS;
+      break;
    case SHADER_OPCODE_TXF_MCS:
       msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS;
       break;
@@ -864,6 +867,7 @@ gen8_fs_generator::generate_code(exec_list *instructions)
       case SHADER_OPCODE_TXD:
       case SHADER_OPCODE_TXF:
       case SHADER_OPCODE_TXF_CMS:
+      case SHADER_OPCODE_TXF_UMS:
       case SHADER_OPCODE_TXF_MCS:
       case SHADER_OPCODE_TXL:
       case SHADER_OPCODE_TXS: