radv: use EOP_DATA_SEL_* instead of magic numbers

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 2afb35292a648785de40503442677c1e72b67437..8bd41bc41acf17c063bf69bd54f6ffea3cdb3aa6 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -4241,7 +4241,7 @@ static void write_event(struct radv_cmd_buffer *cmd_buffer,
                                   cmd_buffer->device->physical_device->rad_info.chip_class,
                                   radv_cmd_buffer_uses_mec(cmd_buffer),
                                   V_028A90_BOTTOM_OF_PIPE_TS, 0,
-                                  1, va, 2, value);
+                                  EOP_DATA_SEL_VALUE_32BIT, va, 2, value);
 
        assert(cmd_buffer->cs->cdw <= cdw_max);
 }

diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c
index 559b7cd49dcd8845874fe28fc5b891d2477dfa29..e1c91630ff4681ebf0310eaf304c54bda57dab28 100644 (file)
--- a/src/amd/vulkan/radv_query.c
+++ b/src/amd/vulkan/radv_query.c
@@ -1169,7 +1169,8 @@ static void emit_end_query(struct radv_cmd_buffer *cmd_buffer,
                                           cmd_buffer->device->physical_device->rad_info.chip_class,
                                           radv_cmd_buffer_uses_mec(cmd_buffer),
                                           V_028A90_BOTTOM_OF_PIPE_TS, 0,
-                                          1, avail_va, 0, 1);
+                                          EOP_DATA_SEL_VALUE_32BIT,
+                                          avail_va, 0, 1);
                break;
        default:
                unreachable("ending unhandled query type");
@@ -1292,13 +1293,15 @@ void radv_CmdWriteTimestamp(
                                                   cmd_buffer->device->physical_device->rad_info.chip_class,
                                                   mec,
                                                   V_028A90_BOTTOM_OF_PIPE_TS, 0,
-                                                  3, query_va, 0, 0);
+                                                  EOP_DATA_SEL_TIMESTAMP,
+                                                  query_va, 0, 0);
                        si_cs_emit_write_event_eop(cs,
                                                   false,
                                                   cmd_buffer->device->physical_device->rad_info.chip_class,
                                                   mec,
                                                   V_028A90_BOTTOM_OF_PIPE_TS, 0,
-                                                  1, avail_va, 0, 1);
+                                                  EOP_DATA_SEL_VALUE_32BIT,
+                                                  avail_va, 0, 1);
                        break;
                }
                query_va += pool->stride;

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index a663d2add6d97f1591fa809016c9ad3a63d7ed6e..d6b073c78387a96061c850277f5fd56b4f0a500d 100644 (file)
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -799,7 +799,9 @@ si_cs_emit_cache_flush(struct radeon_cmdbuf *cs,
                                                           chip_class,
                                                           is_mec,
                                                           V_028A90_FLUSH_AND_INV_CB_DATA_TS,
-                                                          0, 0, 0, 0, 0);
+                                                          0,
+                                                          EOP_DATA_SEL_DISCARD,
+                                                          0, 0, 0);
                        }
                }
                if (flush_bits & RADV_CMD_FLAG_FLUSH_AND_INV_DB) {
@@ -867,7 +869,8 @@ si_cs_emit_cache_flush(struct radeon_cmdbuf *cs,
                assert(flush_cnt);
                uint32_t old_fence = (*flush_cnt)++;
 
-               si_cs_emit_write_event_eop(cs, false, chip_class, false, cb_db_event, tc_flags, 1,
+               si_cs_emit_write_event_eop(cs, false, chip_class, false, cb_db_event, tc_flags,
+                                          EOP_DATA_SEL_VALUE_32BIT,
                                           flush_va, old_fence, *flush_cnt);
                si_emit_wait_fence(cs, false, flush_va, *flush_cnt, 0xffffffff);
        }