* doc/c-tree.texi (RDIV_EXPR): Fix typo.
* doc/rtl.texi (post_modify): Remove misplaced text, remove "not
implemented" note.
* doc/md.texi (IP2K): Move machine-specific constraints before MIPS
for alphabetic order.
* doc/tm.texi (TARGET_FLOAT_FORMAT): Update description for
VAX_FLOAT_FORMAT. Remove reference to HOST_FLOAT_FORMAT.
(VAX_HALFWORD_ORDER): Document.
(LARGEST_EXPONENT_IS_NORMAL): Remove note about being only for
IEEE float format.
(TARGET_SCHED_ISSUE_RATE): Reword reference to MAX_DFA_ISSUE_RATE.
(ASM_OUTPUT_LABEL_REF): Fix font.
(CASE_VECTOR_SHORTEN_MODE): Ditto.
From-SVN: r56687
+2002-08-30 Paul Koning <pkoning@equallogic.com>
+
+ * doc/c-tree.texi (RDIV_EXPR): Fix typo.
+ * doc/rtl.texi (post_modify): Remove misplaced text, remove "not
+ implemented" note.
+ * doc/md.texi (IP2K): Move machine-specific constraints before MIPS
+ for alphabetic order.
+ * doc/tm.texi (TARGET_FLOAT_FORMAT): Update description for
+ VAX_FLOAT_FORMAT. Remove reference to HOST_FLOAT_FORMAT.
+ (VAX_HALFWORD_ORDER): Document.
+ (LARGEST_EXPONENT_IS_NORMAL): Remove note about being only for
+ IEEE float format.
+ (TARGET_SCHED_ISSUE_RATE): Reword reference to MAX_DFA_ISSUE_RATE.
+ (ASM_OUTPUT_LABEL_REF): Fix font.
+ (CASE_VECTOR_SHORTEN_MODE): Ditto.
+
2002-08-30 Denis Chertykov <denisc@overta.ru>
* config/ip2k/ip2k.c (ip2k_set_compare): Remove all const_double
The result of a @code{TRUNC_DIV_EXPR} is always rounded towards zero.
The @code{TRUNC_MOD_EXPR} of two operands @code{a} and @code{b} is
-always @code{a - a/b} where the division is as if computed by a
+always @code{a - (a/b)*b} where the division is as if computed by a
@code{TRUNC_DIV_EXPR}.
@item ARRAY_REF
Memory operand except postincrement and postdecrement
@end table
-@item MIPS---@file{mips.h}
-@table @code
-@item d
-General-purpose integer register
-
-@item f
-Floating-point register (if available)
-
-@item h
-@samp{Hi} register
-
-@item l
-@samp{Lo} register
-
-@item x
-@samp{Hi} or @samp{Lo} register
-
-@item y
-General-purpose integer register
-
-@item z
-Floating-point status register
-
-@item I
-Signed 16-bit constant (for arithmetic instructions)
-
-@item J
-Zero
-
-@item K
-Zero-extended 16-bit constant (for logic instructions)
-
-@item L
-Constant with low 16 bits zero (can be loaded with @code{lui})
-
-@item M
-32-bit constant which requires two instructions to load (a constant
-which is not @samp{I}, @samp{K}, or @samp{L})
-
-@item N
-Negative 16-bit constant
-
-@item O
-Exact power of two
-
-@item P
-Positive 16-bit constant
-
-@item G
-Floating point zero
-
-@item Q
-Memory reference that can be loaded with more than one instruction
-(@samp{m} is preferable for @code{asm} statements)
-
-@item R
-Memory reference that can be loaded with one instruction
-(@samp{m} is preferable for @code{asm} statements)
-
-@item S
-Memory reference in external OSF/rose PIC format
-(@samp{m} is preferable for @code{asm} statements)
-@end table
-
@item IP2K---@file{ip2k.h}
@table @code
@item a
Integers from 0 to 255
@end table
+@item MIPS---@file{mips.h}
+@table @code
+@item d
+General-purpose integer register
+
+@item f
+Floating-point register (if available)
+
+@item h
+@samp{Hi} register
+
+@item l
+@samp{Lo} register
+
+@item x
+@samp{Hi} or @samp{Lo} register
+
+@item y
+General-purpose integer register
+
+@item z
+Floating-point status register
+
+@item I
+Signed 16-bit constant (for arithmetic instructions)
+
+@item J
+Zero
+
+@item K
+Zero-extended 16-bit constant (for logic instructions)
+
+@item L
+Constant with low 16 bits zero (can be loaded with @code{lui})
+
+@item M
+32-bit constant which requires two instructions to load (a constant
+which is not @samp{I}, @samp{K}, or @samp{L})
+
+@item N
+Negative 16-bit constant
+
+@item O
+Exact power of two
+
+@item P
+Positive 16-bit constant
+
+@item G
+Floating point zero
+
+@item Q
+Memory reference that can be loaded with more than one instruction
+(@samp{m} is preferable for @code{asm} statements)
+
+@item R
+Memory reference that can be loaded with one instruction
+(@samp{m} is preferable for @code{asm} statements)
+
+@item S
+Memory reference in external OSF/rose PIC format
+(@samp{m} is preferable for @code{asm} statements)
+@end table
+
@item Motorola 680x0---@file{m68k.h}
@table @code
@item a
represents @var{x} before @var{x} is modified. @var{x} must be a
@code{reg} or @code{mem}, but most machines allow only a @code{reg}.
@var{m} must be the machine mode for pointers on the machine in use.
-The amount @var{x} is decremented by is the length in bytes of the
-machine mode of the containing memory reference of which this expression
-serves as the address. Note that this is not currently implemented.
The expression @var{y} must be one of three forms:
@table @code
@findex VAX_FLOAT_FORMAT
@item VAX_FLOAT_FORMAT
-This code indicates the ``D float'' format used on the VAX@.
+This code indicates the ``F float'' (for @code{float}) and ``D float''
+or ``G float'' formats (for @code{double}) used on the VAX and PDP-11@.
@findex IBM_FLOAT_FORMAT
@item IBM_FLOAT_FORMAT
This code indicates any other format.
@end table
-The value of this macro is compared with @code{HOST_FLOAT_FORMAT}, which
-is defined by the @command{configure} script, to determine whether the
-target machine has the same format as the host machine. If any other
+If any other
formats are actually in use on supported machines, new codes should be
defined for them.
The ordering of the component words of floating point values stored in
memory is controlled by @code{FLOAT_WORDS_BIG_ENDIAN}.
+@findex VAX_HALFWORD_ORDER
+@item VAX_HALFWORD_ORDER
+This macro is only used if @code{TARGET_FLOAT_FORMAT} is
+@code{VAX_FLOAT_FORMAT}. If defaulted or defined as 1, the halfwords of
+the generated floating point data are in the order used by the VAX. If
+defined as 0, they are reversed, which is used by the PDP-11 target.
+
@findex MODE_HAS_NANS
@item MODE_HAS_NANS (@var{mode})
When defined, this macro should be true if @var{mode} has a NaN
@findex LARGEST_EXPONENT_IS_NORMAL
@item LARGEST_EXPONENT_IS_NORMAL (@var{size})
-This macro should only be defined when the target float format is
-described as IEEE@. It should return true if floats with @var{size}
+This macro should return true if floats with @var{size}
bits do not have a NaN or infinity representation, but use the largest
exponent for normal numbers instead.
it to vary depending on what the instructions are, you must use
@samp{TARGET_SCHED_VARIABLE_ISSUE}.
-You could use the value of macro @samp{MAX_DFA_ISSUE_RATE} to return
-the value of the hook @samp{TARGET_SCHED_ISSUE_RATE} for the automaton
-based pipeline interface.
+For the automaton based pipeline interface, you could define this hook
+to return the value of the macro @code{MAX_DFA_ISSUE_RATE}.
@end deftypefn
@deftypefn {Target Hook} int TARGET_SCHED_VARIABLE_ISSUE (FILE *@var{file}, int @var{verbose}, rtx @var{insn}, int @var{more})
@findex ASM_OUTPUT_LABEL_REF
@item ASM_OUTPUT_LABEL_REF (@var{stream}, @var{buf})
A C statement (sans semicolon) to output a reference to @var{buf}, the
-result of ASM_GENERATE_INTERNAL_LABEL. If not defined,
+result of @code{ASM_GENERATE_INTERNAL_LABEL}. If not defined,
@code{assemble_name} will be used to output the name of the symbol.
This macro is not used by @code{output_asm_label}, or the @code{%l}
specifier that calls it; the intention is that this macro should be set
-when it is necessary to output a label differently when its address
-is being taken.
+when it is necessary to output a label differently when its address is
+being taken.
@findex ASM_OUTPUT_INTERNAL_LABEL
@item ASM_OUTPUT_INTERNAL_LABEL (@var{stream}, @var{prefix}, @var{num})
Optional: return the preferred mode for an @code{addr_diff_vec}
when the minimum and maximum offset are known. If you define this,
it enables extra code in branch shortening to deal with @code{addr_diff_vec}.
-To make this work, you also have to define INSN_ALIGN and
+To make this work, you also have to define @code{INSN_ALIGN} and
make the alignment for @code{addr_diff_vec} explicit.
The @var{body} argument is provided so that the offset_unsigned and scale
flags can be updated.
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