calls.c (expand_call): Use bitfield instructions to extract/deposit word sized hunks...

        * calls.c (expand_call): Use bitfield instructions to extract/deposit
        word sized hunks when loading unaligned args into registers.

From-SVN: r22008

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 06a8f1666562f01bb0a8e07a678c1bca5cba7c14..223e78adb4fd67c3113d280cff9045188f5644f5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -14,6 +14,9 @@ Wed Aug 26 09:30:59 1998  Nick Clifton  <nickc@cygnus.com>
 
 Wed Aug 26 12:57:09 1998  Jeffrey A Law  (law@cygnus.com)
 
+       * calls.c (expand_call): Use bitfield instructions to extract/deposit
+       word sized hunks when loading unaligned args into registers.
+
        * haifa-sched.c (sched_analyze_insn): Only create scheduling
        barriers for LOOP, EH and SETJMP notes on the loop_notes list.
 

diff --git a/gcc/calls.c b/gcc/calls.c
index 233b1a7bd9d1aec502b2e68de8553939e6221007..728d6d68a5d79fde166607dca1d4bf4c16586d85 100644 (file)
--- a/gcc/calls.c
+++ b/gcc/calls.c
@@ -1800,16 +1800,16 @@ expand_call (exp, target, ignore)
            {
              rtx reg = gen_reg_rtx (word_mode);
              rtx word = operand_subword_force (args[i].value, j, BLKmode);
-             int bitsize = TYPE_ALIGN (TREE_TYPE (args[i].tree_value));
-             int bitpos;
+             int bitsize = MIN (bytes * BITS_PER_UNIT, BITS_PER_WORD);
+             int bitalign = TYPE_ALIGN (TREE_TYPE (args[i].tree_value));
 
              args[i].aligned_regs[j] = reg;
 
-             /* Clobber REG and move each partword into it.  Ensure we don't
-                go past the end of the structure.  Note that the loop below
-                works because we've already verified that padding
-                and endianness are compatible.
+             /* There is no need to restrict this code to loading items
+                in TYPE_ALIGN sized hunks.  The bitfield instructions can
+                load up entire word sized registers efficiently.
 
+                ??? This may not be needed anymore.
                 We use to emit a clobber here but that doesn't let later
                 passes optimize the instructions we emit.  By storing 0 into
                 the register later passes know the first AND to zero out the
@@ -1818,20 +1818,14 @@ expand_call (exp, target, ignore)
 
              emit_move_insn (reg, const0_rtx);
 
-             for (bitpos = 0;
-                  bitpos < BITS_PER_WORD && bytes > 0;
-                  bitpos += bitsize, bytes -= bitsize / BITS_PER_UNIT)
-               {
-                 int xbitpos = bitpos + big_endian_correction;
-
-                 store_bit_field (reg, bitsize, xbitpos, word_mode,
-                                  extract_bit_field (word, bitsize, bitpos, 1,
-                                                     NULL_RTX, word_mode,
-                                                     word_mode,
-                                                     bitsize / BITS_PER_UNIT,
-                                                     BITS_PER_WORD),
-                                  bitsize / BITS_PER_UNIT, BITS_PER_WORD);
-               }
+             bytes -= bitsize / BITS_PER_UNIT;
+             store_bit_field (reg, bitsize, big_endian_correction, word_mode,
+                              extract_bit_field (word, bitsize, 0, 1,
+                                                 NULL_RTX, word_mode,
+                                                 word_mode,
+                                                 bitalign / BITS_PER_UNIT,
+                                                 BITS_PER_WORD),
+                              bitalign / BITS_PER_UNIT, BITS_PER_WORD);
            }
        }