radeonsi: don't add the tess ring buffers into the cs_preamble state
authorMarek Olšák <marek.olsak@amd.com>
Tue, 16 Jun 2020 17:56:10 +0000 (13:56 -0400)
committerMarge Bot <eric+marge@anholt.net>
Fri, 26 Jun 2020 07:02:57 +0000 (07:02 +0000)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>

src/gallium/drivers/radeonsi/si_gfx_cs.c
src/gallium/drivers/radeonsi/si_state_shaders.c

index 2e7b34e3a092d9fa536679ffe5928c2136a599e3..188bda0858cb5e2d2ef2a204cf28a1e464d8bcd8 100644 (file)
@@ -415,6 +415,11 @@ void si_begin_new_gfx_cs(struct si_context *ctx)
       return;
    }
 
+   if (ctx->tess_rings) {
+      radeon_add_to_buffer_list(ctx, ctx->gfx_cs, si_resource(ctx->tess_rings),
+                                RADEON_USAGE_READWRITE, RADEON_PRIO_SHADER_RINGS);
+   }
+
    /* set all valid group as dirty so they get reemited on
     * next draw command
     */
index 396737bd2c22dd7d3a16cff2982b906eb2855970..cee13524edc9c390f37b1fa8694991660518eb60 100644 (file)
@@ -3640,9 +3640,6 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
 
    si_cs_preamble_add_vgt_flush(sctx);
 
-   si_pm4_add_bo(sctx->cs_preamble_state, si_resource(sctx->tess_rings), RADEON_USAGE_READWRITE,
-                 RADEON_PRIO_SHADER_RINGS);
-
    uint64_t factor_va =
       si_resource(sctx->tess_rings)->gpu_address + sctx->screen->tess_offchip_ring_size;