in both Horizontal-First and Vertical-First Mode as well as Predication
(Single and Twin) for the GPRs r3, r10 and r30. CR-Field-based
Predicates, if used, may still raise illegal instruction trap.
-* **DSP/VPU**: 128 registers, all SV Branch instructions,
+* **DSP/AV**: 128 registers, all SV Branch instructions,
crweird instructions, element-width
overrides, and all Modes (Saturation, Fail-First, Predicate-Result,
Mapreduce/Iteration)