{
struct r600_screen *rscreen = (struct r600_screen*)ctx->screen;
struct radeon_state *rstate;
+ unsigned db_depth_control;
rstate = radeon_state(rscreen->rw, R600_DSA_TYPE, R600_DSA);
if (rstate == NULL)
return NULL;
- unsigned db_depth_control = 0x00700700 | S_028800_Z_ENABLE(state->depth.enabled) | S_028800_Z_WRITE_ENABLE(state->depth.writemask) | S_028800_ZFUNC(state->depth.func);
+ db_depth_control = 0x00700700 | S_028800_Z_ENABLE(state->depth.enabled) | S_028800_Z_WRITE_ENABLE(state->depth.writemask) | S_028800_ZFUNC(state->depth.func);
rstate->states[R600_DSA__DB_STENCIL_CLEAR] = 0x00000000;
rstate->states[R600_DSA__DB_DEPTH_CLEAR] = 0x3F800000;