add link to list

diff --git a/3d_gpu/architecture/6600scoreboard.mdwn b/3d_gpu/architecture/6600scoreboard.mdwn
index c5a5ae8dd88f5825299085e4f092d4e5e4d6b138..39b60a8e2918811ef27d6604b96c9b3fa0f03ba8 100644 (file)
--- a/3d_gpu/architecture/6600scoreboard.mdwn
+++ b/3d_gpu/architecture/6600scoreboard.mdwn
@@ -271,10 +271,11 @@ Source:
 
 # L0 Cache/Buffer
 
-See bugreports:
+See:
 
 * <https://bugs.libre-soc.org/show_bug.cgi?id=216>
 * <https://bugs.libre-soc.org/show_bug.cgi?id=257>
+* <http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-April/006118.html>
 
 The L0 cache/buffer needs to be kept extremely small due to it having
 significant extra CAM functionality than a normal L1 cache.  However,