#include "utils.h"
#include "xmlpool.h" /* for symbolic values of enum-type options */
-/* hw_tcl_on derives from future_hw_tcl_on when its safe to change it. */
-int future_hw_tcl_on = 1;
-int hw_tcl_on = 1;
-
#define need_GL_VERSION_2_0
#define need_GL_ARB_point_parameters
#define need_GL_ARB_vertex_program
ctx->Const.MaxDrawBuffers = 1;
/* currently bogus data */
- if (screen->chip_flags & RADEON_CHIPSET_TCL) {
+ if (r300->options.hw_tcl_enabled) {
ctx->Const.VertexProgram.MaxInstructions = VSF_MAX_FRAGMENT_LENGTH / 4;
ctx->Const.VertexProgram.MaxNativeInstructions =
VSF_MAX_FRAGMENT_LENGTH / 4;
}
}
+static void r300ParseOptions(r300ContextPtr r300, radeonScreenPtr screen)
+{
+ struct r300_options options = { 0 };
+
+ driParseConfigFiles(&r300->radeon.optionCache, &screen->optionCache,
+ screen->driScreen->myNum, "r300");
+
+ r300->disable_lowimpact_fallback = driQueryOptionb(&r300->radeon.optionCache, "disable_lowimpact_fallback");
+ r300->radeon.initialMaxAnisotropy = driQueryOptionf(&r300->radeon.optionCache, "def_max_anisotropy");
+
+ options.stencil_two_side_disabled = driQueryOptionb(&r300->radeon.optionCache, "disable_stencil_two_side");
+ options.s3tc_force_enabled = driQueryOptionb(&r300->radeon.optionCache, "force_s3tc_enable");
+ options.s3tc_force_disabled = driQueryOptionb(&r300->radeon.optionCache, "disable_s3tc");
+
+ if (!(screen->chip_flags & RADEON_CHIPSET_TCL) || driQueryOptioni(&r300->radeon.optionCache, "tcl_mode") == DRI_CONF_TCL_SW)
+ options.hw_tcl_enabled = 0;
+ else
+ options.hw_tcl_enabled = 1;
+
+ r300->options = options;
+}
+
+static void r300InitGLExtensions(GLcontext *ctx)
+{
+ r300ContextPtr r300 = R300_CONTEXT(ctx);
+
+ driInitExtensions(ctx, card_extensions, GL_TRUE);
+ if (r300->radeon.radeonScreen->kernel_mm)
+ driInitExtensions(ctx, mm_extensions, GL_FALSE);
+
+ if (r300->options.stencil_two_side_disabled)
+ _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
+
+ if (ctx->Mesa_DXTn && !r300->options.s3tc_force_enabled) {
+ _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
+ _mesa_enable_extension(ctx, "GL_S3_s3tc");
+ } else if (r300->options.s3tc_force_disabled) {
+ _mesa_disable_extension(ctx, "GL_EXT_texture_compression_s3tc");
+ }
+}
+
/* Create the device specific rendering context.
*/
GLboolean r300CreateContext(const __GLcontextModes * glVisual,
struct dd_function_table functions;
r300ContextPtr r300;
GLcontext *ctx;
- int tcl_mode;
assert(glVisual);
assert(driContextPriv);
if (!r300)
return GL_FALSE;
- if (!(screen->chip_flags & RADEON_CHIPSET_TCL))
- hw_tcl_on = future_hw_tcl_on = 0;
-
- driParseConfigFiles(&r300->radeon.optionCache, &screen->optionCache,
- screen->driScreen->myNum, "r300");
+ r300ParseOptions(r300, screen);
r300_init_vtbl(&r300->radeon);
}
ctx = r300->radeon.glCtx;
- r300InitConstValues(ctx, screen);
- if (hw_tcl_on)
+ if (r300->options.hw_tcl_enabled)
ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
+ r300InitConstValues(ctx, screen);
+
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext(ctx);
_tnl_allow_pixel_fog(ctx, GL_FALSE);
_tnl_allow_vertex_fog(ctx, GL_TRUE);
+ if (!r300->options.hw_tcl_enabled)
+ r300InitSwtcl(ctx);
+
radeon_fbo_init(&r300->radeon);
- radeonInitSpanFuncs( ctx );
+ radeonInitSpanFuncs( ctx );
r300InitCmdBuf(r300);
r300InitState(r300);
r300InitShaderFunctions(r300);
- if (!(screen->chip_flags & RADEON_CHIPSET_TCL))
- r300InitSwtcl(ctx);
-
- driInitExtensions(ctx, card_extensions, GL_TRUE);
- if (r300->radeon.radeonScreen->kernel_mm)
- driInitExtensions(ctx, mm_extensions, GL_FALSE);
if (screen->chip_family == CHIP_FAMILY_RS600 || screen->chip_family == CHIP_FAMILY_RS690 ||
screen->chip_family == CHIP_FAMILY_RS740) {
r300->radeon.texture_row_align = 64;
}
- r300->radeon.initialMaxAnisotropy = driQueryOptionf(&r300->radeon.optionCache,
- "def_max_anisotropy");
-
- if (driQueryOptionb(&r300->radeon.optionCache, "disable_stencil_two_side"))
- _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
-
- if (ctx->Mesa_DXTn && !driQueryOptionb(&r300->radeon.optionCache, "disable_s3tc")) {
- _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
- _mesa_enable_extension(ctx, "GL_S3_s3tc");
- } else if (driQueryOptionb(&r300->radeon.optionCache, "force_s3tc_enable")) {
- _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
- }
-
- r300->disable_lowimpact_fallback =
- driQueryOptionb(&r300->radeon.optionCache, "disable_lowimpact_fallback");
-
- tcl_mode = driQueryOptioni(&r300->radeon.optionCache, "tcl_mode");
- if (driQueryOptionb(&r300->radeon.optionCache, "no_rast")) {
- fprintf(stderr, "disabling 3D acceleration\n");
-#if R200_MERGED
- FALLBACK(&r300->radeon, RADEON_FALLBACK_DISABLE, 1);
-#endif
- }
- if (tcl_mode == DRI_CONF_TCL_SW ||
- !(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
- if (r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
- r300->radeon.radeonScreen->chip_flags &=
- ~RADEON_CHIPSET_TCL;
- fprintf(stderr, "Disabling HW TCL support\n");
- }
- TCL_FALLBACK(r300->radeon.glCtx,
- RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
- }
+ r300InitGLExtensions(ctx);
return GL_TRUE;
}
#include "drirenderbuffer.h"
-extern int future_hw_tcl_on;
-
static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
{
r300ContextPtr rmesa = R300_CONTEXT(ctx);
GLint *ip;
/* no VAP UCP on non-TCL chipsets */
- if (!(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
+ if (!rmesa->options.hw_tcl_enabled)
return;
p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
GLuint p;
/* no VAP UCP on non-TCL chipsets */
- if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
+ if (!r300->options.hw_tcl_enabled)
return;
p = cap - GL_CLIP_PLANE0;
int fp_reg, high_rr;
int col_ip, tex_ip;
int rs_tex_count = 0;
- int i, count, col_fmt;
+ int i, count, col_fmt, hw_tcl_on;
+ hw_tcl_on = r300->options.hw_tcl_enabled;
if (hw_tcl_on)
OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
else
int fp_reg, high_rr;
int col_ip, tex_ip;
int rs_tex_count = 0;
- int i, count, col_fmt;
+ int i, count, col_fmt, hw_tcl_on;
+ hw_tcl_on = r300->options.hw_tcl_enabled;
if (hw_tcl_on)
OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
else
pvs_num_cntrls = MIN2(6, vtx_mem_size/temp_count);
R300_STATECHANGE(rmesa, vap_cntl);
- if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
+ if (rmesa->options.hw_tcl_enabled) {
rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] =
(pvs_num_slots << R300_PVS_NUM_SLOTS_SHIFT) |
(pvs_num_cntrls << R300_PVS_NUM_CNTLRS_SHIFT) |
0x400 area might have something to do with pixel shaders as it appears right after pfs programming.
0x406 is set to { 0.0, 0.0, 1.0, 0.0 } most of the time but should change with smooth points and in other rare cases. */
//setup_vertex_shader_fragment(rmesa, 0x406, &unk4);
- if (hw_tcl_on && ((struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx))->translated) {
+ if (rmesa->options.hw_tcl_enabled && ((struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx))->translated) {
r300SetupRealVertexProgram(rmesa);
} else {
/* FIXME: This needs to be replaced by vertex shader generation code. */
static void r300ResetHwState(r300ContextPtr r300)
{
GLcontext *ctx = r300->radeon.glCtx;
- int has_tcl = 1;
+ int has_tcl;
- if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
- has_tcl = 0;
+ has_tcl = r300->options.hw_tcl_enabled;
if (RADEON_DEBUG & DEBUG_STATE)
fprintf(stderr, "%s\n", __FUNCTION__);
ctx = rmesa->radeon.glCtx;
- if (rmesa->radeon.NewGLState && hw_tcl_on) {
+ if (rmesa->radeon.NewGLState && rmesa->options.hw_tcl_enabled) {
rmesa->radeon.NewGLState = 0;
for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
r300TranslateVertexShader(vp); */
if (vp->translated == GL_FALSE) {
fprintf(stderr, "Failing back to sw-tcl\n");
- hw_tcl_on = future_hw_tcl_on = 0;
+ rmesa->options.hw_tcl_enabled = 0;
r300ResetHwState(rmesa);
r300UpdateStateParameters(ctx, _NEW_PROGRAM |
rmesa->vtbl.SetupRSUnit(ctx);
- if ((rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
+ if (rmesa->options.hw_tcl_enabled)
r300SetupVertexProgram(rmesa);
}