re PR target/14478 ([3.3 only] rs6000 geu/ltu patterns generate incorrect code)

	PR target/14478
	* config/rs6000/rs6000.c (reg_or_neg_short_operand): Don't allow zero.

From-SVN: r82315

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a13cbdde627d5fd1f122e81720b3c10b8a150d99..353c25cfbbbdf880acebf74dfcb5278f9b94ead3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2004-05-27  Alan Modra  <amodra@bigpond.net.au>
+
+       PR target/14478
+       * config/rs6000/rs6000.c (reg_or_neg_short_operand): Don't allow zero.
+
 2004-05-27  Josef Zlomek  <zlomekj@suse.cz>
 
        PR middle-end/14084

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index e6ce004129b202db168ad9161dec3bb792556ef7..4b23dccb717916ca3ff2063bed0fb0451b03a09d 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1407,13 +1407,16 @@ reg_or_short_operand (rtx op, enum machine_mode mode)
 }
 
 /* Similar, except check if the negation of the constant would be
-   valid for a D-field.  */
+   valid for a D-field.  Don't allow a constant zero, since all the
+   patterns that call this predicate use "addic r1,r2,-constant" on
+   a constant value to set a carry when r2 is greater or equal to
+   "constant".  That doesn't work for zero.  */
 
 int
 reg_or_neg_short_operand (rtx op, enum machine_mode mode)
 {
   if (GET_CODE (op) == CONST_INT)
-    return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
+    return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P') && INTVAL (op) != 0;
 
   return gpc_reg_operand (op, mode);
 }