liteeth/phy/mii: allow use of MII phy on GMII/MII chips that do not have phy clock...

diff --git a/misoclib/com/liteeth/phy/mii.py b/misoclib/com/liteeth/phy/mii.py
index 779c8e3d81ff2f714eba9aa28b8aaef5999e448c..13d39ffb0d45f921b8d5e695475d03669183ffa6 100644 (file)
--- a/misoclib/com/liteeth/phy/mii.py
+++ b/misoclib/com/liteeth/phy/mii.py
@@ -94,7 +94,8 @@ class LiteEthPHYMIICRG(Module, AutoCSR):
        def __init__(self, clock_pads, pads, with_hw_init_reset):
                self._reset = CSRStorage()
                ###
-               self.sync.base50 += clock_pads.phy.eq(~clock_pads.phy)
+               if hasattr(clock_pads, "phy"):
+                       self.sync.base50 += clock_pads.phy.eq(~clock_pads.phy)
 
                self.clock_domains.cd_eth_rx = ClockDomain()
                self.clock_domains.cd_eth_tx = ClockDomain()