REMAP, like all of SV, is abstracted out, meaning that unlike traditional
Vector ISAs which would typically only have a limited set of instructions
-that can be structure-packed (LD/ST typically), REMAP may be applied to
+that can be structure-packed (LD/ST and Move operations
+being the most common), REMAP may be applied to
literally any instruction: CRs, Arithmetic, Logical, LD/ST, anything.
When SUBVL is greater than 1 the group of Subvector