[arm] Further fixes for PR88469

A bitfield that is exactly the same size as an integral type and
naturally aligned will have DECL_BIT_FIELD cleared.  So we need to
check DECL_BIT_FIELD_TYPE to be sure whether or not the underlying
type was declared with a bitfield declaration.

I've also added a test for bitfields that are based on overaligned types.

	PR target/88469
gcc:
	* config/arm/arm.c (arm_needs_double_word_align): Check
	DECL_BIT_FIELD_TYPE.

gcc/testsuite:
	* gcc.target/arm/aapcs/bitfield2.c: New test.
	* gcc.target/arm/aapcs/bitfield3.c: New test.

From-SVN: r268160

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8a077cc7daefe363f93c1ccb6c118ecfdb7ac9e0..84f9622af27be38b556a9806299960805df989b4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-01-22  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/88469
+       * config/arm/arm.c (arm_needs_double_word_align): Check
+       DECL_BIT_FIELD_TYPE.
+
 2019-01-22  Hongtao Liu  <hongtao.liu@intel.com>
            H.J. Lu  <hongjiu.lu@intel.com>
 

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index c6fbda25e9635bbc871160f65e71ac4c2c75192e..16e22eed871ca34d56c83c334688e5a95970638e 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -6634,7 +6634,7 @@ arm_needs_doubleword_align (machine_mode mode, const_tree type)
          ret = -1;
       }
     else if (TREE_CODE (field) == FIELD_DECL
-            && DECL_BIT_FIELD (field)
+            && DECL_BIT_FIELD_TYPE (field)
             && TYPE_ALIGN (DECL_BIT_FIELD_TYPE (field)) > PARM_BOUNDARY)
       ret2 = 1;
 

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 86212e543c0e4bd0b00544c48d8e3ed885b7948f..851e3914ac3815c4900645ded272e73f1f282560 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2019-01-22  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/88469
+       * gcc.target/arm/aapcs/bitfield2.c: New test.
+       * gcc.target/arm/aapcs/bitfield3.c: New test.
+
 2019-01-22  Wilco Dijkstra  <wdijkstr@arm.com>
 
        PR rtl-optimization/87763

diff --git a/gcc/testsuite/gcc.target/arm/aapcs/bitfield2.c b/gcc/testsuite/gcc.target/arm/aapcs/bitfield2.c
new file mode 100644 (file)
index 0000000..9cbe2b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/bitfield2.c
@@ -0,0 +1,26 @@
+/* Test AAPCS layout (alignment).  */
+
+/* { dg-do run { target arm_eabi } } */
+/* { dg-require-effective-target arm32 } */
+/* { dg-options "-O" } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "bitfield2.c"
+
+typedef unsigned int alint __attribute__((aligned (8)));
+
+struct bf
+{
+  alint a: 17;
+  alint b: 15;
+} v = {1, 1};
+
+#include "abitest.h"
+#else
+  ARG (int, 7, R0)
+  ARG (int, 9, R1)
+  ARG (int, 11, R2)
+  /* Alignment of the bitfield type should affect alignment of the overall
+     type, so R3 not used.  */
+  LAST_ARG (struct bf, v, STACK)
+#endif

diff --git a/gcc/testsuite/gcc.target/arm/aapcs/bitfield3.c b/gcc/testsuite/gcc.target/arm/aapcs/bitfield3.c
new file mode 100644 (file)
index 0000000..0386e66
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/aapcs/bitfield3.c
@@ -0,0 +1,26 @@
+/* Test AAPCS layout (alignment).  */
+
+/* { dg-do run { target arm_eabi } } */
+/* { dg-require-effective-target arm32 } */
+/* { dg-options "-O" } */
+
+#ifndef IN_FRAMEWORK
+#define TESTFILE "bitfield3.c"
+
+struct bf
+{
+  /* Internally this may be mapped to unsigned short.  Ensure we still
+     check the original declaration.  */
+  unsigned long long a: 16;
+  unsigned b: 3;
+} v = {1, 3};
+
+#include "abitest.h"
+#else
+  ARG (int, 7, R0)
+  ARG (int, 9, R1)
+  ARG (int, 11, R2)
+  /* Alignment of the bitfield type should affect alignment of the overall
+     type, so R3 not used.  */
+  LAST_ARG (struct bf, v, STACK)
+#endif