picochip.md (cbranchhi4): No :CC for match_operator.
authorHariharan Sandanagobalane <hariharan@picochip.com>
Thu, 26 May 2011 12:21:11 +0000 (12:21 +0000)
committerHariharan Sandanagobalane <hariharans@gcc.gnu.org>
Thu, 26 May 2011 12:21:11 +0000 (12:21 +0000)
        * config/picochip/picochip.md (cbranchhi4): No :CC for match_operator.
          The instruction is then expanded explicitly.
        (supported_compare): Callable instruction.
        (compare): Likewise.

From-SVN: r174277

gcc/ChangeLog
gcc/config/picochip/picochip.md

index 825858ceec81be082a7d1b71428d0e3b0094eb36..5670f01330735d3da6bf08fa6acc6abbbe70bd47 100644 (file)
@@ -1,3 +1,10 @@
+2011-05-26  Hariharan Sandanagobalane <hariharan@picochip.com>
+
+       * config/picochip/picochip.md (cbranchhi4): No :CC for match_operator.
+         The instruction is then expanded explicitly.
+       (supported_compare): Callable instruction.
+       (compare): Likewise.
+
 2011-05-26  Jakub Jelinek  <jakub@redhat.com>
 
        PR c++/49165
index b2f562ff746fed7981fc8c9ee3bc0d20c6f4b868..4e0556443bd2b9ac3ad19259d4a44d981ce1ab8c 100644 (file)
 (define_insn_and_split "cbranchhi4"
   [(set (pc)
         (if_then_else
-            (match_operator:CC 0 "ordered_comparison_operator"
+            (match_operator 0 "ordered_comparison_operator"
                             [(match_operand:HI 1 "register_operand" "r")
                              (match_operand:HI 2 "picochip_comparison_operand" "ri")])
             (label_ref       (match_operand    3 "" ""))
   "* return picochip_output_cbranch(operands);"
   "reload_completed
    && (picochip_schedule_type != DFA_TYPE_NONE || flag_delayed_branch)"
-  [(set (reg:CC CC_REGNUM) (match_dup 0))
-   (parallel [(set (pc)
-                   (if_then_else (match_op_dup:HI 0 [(reg:CC CC_REGNUM) (const_int 0)])
-                                 (label_ref (match_dup 3))
-                                 (pc)))
-              (use (match_dup 4))])]
+  [(const_int 0)]
   "{
-     operands[4] = GEN_INT(GET_CODE(operands[0]));
+     rtx const_int_opnd;
+     const_int_opnd = GEN_INT(GET_CODE(operands[0]));
+     if (picochip_supported_comparison_operator (operands[0], HImode))
+       emit_insn (gen_supported_compare (operands[0], operands[1], operands[2]));
+     else
+       emit_insn (gen_compare (operands[0], operands[1], operands[2]));
+     emit_jump_insn (gen_branch (operands[3], const_int_opnd, operands[0]));
    }")
 
 ;; The only difference between this and the next pattern is that the next pattern
 ;; comparison operator and hence this pattern assumes that the second constraint combo
 ;; would still generate a normal instruction.
 
-(define_insn "*supported_compare"
+(define_insn "supported_compare"
   [(set (reg:CC CC_REGNUM)
         (match_operator:CC 0 "picochip_supported_comparison_operator"
                         [(match_operand:HI 1 "register_operand" "r,r,r")
    (set_attr "length" "2,2,4")
    ])
 
-(define_insn "*compare"
+(define_insn "compare"
   [(set (reg:CC CC_REGNUM)
         (match_operator:CC 0 "comparison_operator"
                         [(match_operand:HI 1 "register_operand" "r,r,r")