radeon/common: add vcn enc ip info query
authorBoyuan Zhang <boyuan.zhang@amd.com>
Tue, 7 Nov 2017 20:41:40 +0000 (15:41 -0500)
committerLeo Liu <leo.liu@amd.com>
Fri, 17 Nov 2017 17:25:47 +0000 (12:25 -0500)
New ip info query is needed for vcn encode

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
src/amd/common/ac_gpu_info.c

index 6c4630f044499e651a18de362d2597e131646d55..6e34a070132eef8fa15cda68de2e7261360a2798 100644 (file)
@@ -98,7 +98,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 {
        struct amdgpu_buffer_size_alignments alignment_info = {};
        struct amdgpu_heap_info vram, vram_vis, gtt;
-       struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {}, vce = {}, vcn_dec = {};
+       struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {}, vce = {}, vcn_dec = {}, vcn_enc = {};
        uint32_t vce_version = 0, vce_feature = 0, uvd_version = 0, uvd_feature = 0;
        int r, i, j;
        drmDevicePtr devinfo;
@@ -174,6 +174,14 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
                }
        }
 
+       if (info->drm_major == 3 && info->drm_minor >= 17) {
+               r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_VCN_ENC, 0, &vcn_enc);
+               if (r) {
+                       fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(vcn_enc) failed.\n");
+                       return false;
+               }
+       }
+
        r = amdgpu_query_firmware_version(dev, AMDGPU_INFO_FW_GFX_ME, 0, 0,
                                        &info->me_fw_version,
                                        &info->me_fw_feature);