arch-arm: Fix HVC trapping beahviour

This patch is fixing HVC trapping behaviour, reusing the pseudocode
implementation provided in the arm arm.

Change-Id: I0bc81478400b99d84534c1c8871f894722f547c5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13776
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

diff --git a/src/arch/arm/isa/insts/misc64.isa b/src/arch/arm/isa/insts/misc64.isa
index 2621905c7fafe07f042dd159f0f8864e7b151bb4..6d40dd913110028f89f08d6ab47d24919a4f3c56 100644 (file)
--- a/src/arch/arm/isa/insts/misc64.isa
+++ b/src/arch/arm/isa/insts/misc64.isa
@@ -51,10 +51,20 @@ let {{
 
     hvcCode = '''
     SCR scr = Scr64;
+    HCR hcr = Hcr64;
+    CPSR cpsr = Cpsr;
 
-    if (!ArmSystem::haveVirtualization(xc->tcBase()) ||
-        (ArmSystem::haveSecurity(xc->tcBase()) && (!scr.ns || !scr.hce))) {
-        fault = disabledFault();
+    auto tc = xc->tcBase();
+    ExceptionLevel pstate_EL = (ExceptionLevel)(uint8_t)(cpsr.el);
+
+    bool unalloc_encod = !ArmSystem::haveEL(tc, EL2) || pstate_EL == EL0 ||
+                         (pstate_EL == EL1 && inSecureState(tc));
+
+    bool hvc_enable = ArmSystem::haveEL(tc, EL3) ?
+        scr.hce : !hcr.hcd;
+
+    if (unalloc_encod || !hvc_enable) {
+        fault = undefinedFault64(tc, pstate_EL);
     } else {
         fault = std::make_shared<HypervisorCall>(machInst, bits(machInst, 20, 5));
     }