"ltgfr\t%2,%0"
[(set_attr "op_type" "RRE")])
+; ltr, lt, ltgr, ltg
(define_insn "*tst<mode>_extimm"
[(set (reg CC_REGNUM)
(compare (match_operand:GPR 0 "nonimmediate_operand" "d,m")
lt<g>\t%2,%0"
[(set_attr "op_type" "RR<E>,RXY")])
+; ltr, lt, ltgr, ltg
(define_insn "*tst<mode>_cconly_extimm"
[(set (reg CC_REGNUM)
(compare (match_operand:GPR 0 "nonimmediate_operand" "d,m")
[(set_attr "op_type" "RS")
(set_attr "atype" "reg")])
+; ltr, ltgr
(define_insn "*tst<mode>_cconly2"
[(set (reg CC_REGNUM)
(compare (match_operand:GPR 0 "register_operand" "d")
chy\t%0,%1"
[(set_attr "op_type" "RX,RXY")])
+; cr, chi, cfi, c, cy, cgr, cghi, cgfi, cg
(define_insn "*cmp<mode>_ccs"
[(set (reg CC_REGNUM)
(compare (match_operand:GPR 0 "register_operand" "d,d,d,d,d")
; (DF|SF) instructions
+; ltxbr, ltdbr, ltebr
(define_insn "*cmp<mode>_ccs_0"
[(set (reg CC_REGNUM)
(compare (match_operand:FPR 0 "register_operand" "f")
[(set_attr "op_type" "RRE")
(set_attr "type" "fsimp<mode>")])
+; ltxr, ltdr, lter
(define_insn "*cmp<mode>_ccs_0_ibm"
[(set (reg CC_REGNUM)
(compare (match_operand:FPR 0 "register_operand" "f")
[(set_attr "op_type" "<RRe>")
(set_attr "type" "fsimp<mode>")])
+; cxbr, cdbr, cebr, cxb, cdb, ceb
(define_insn "*cmp<mode>_ccs"
[(set (reg CC_REGNUM)
(compare (match_operand:FPR 0 "register_operand" "f,f")
[(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fsimp<mode>")])
+; cxr, cdr, cer, cx, cd, ce
(define_insn "*cmp<mode>_ccs_ibm"
[(set (reg CC_REGNUM)
(compare (match_operand:FPR 0 "register_operand" "f,f")
; extendqi(si|di)2 instruction pattern(s).
;
+; lbr, lgbr, lb, lgb
(define_insn "*extendqi<mode>2_extimm"
[(set (match_operand:GPR 0 "register_operand" "=d,d")
(sign_extend:GPR (match_operand:QI 1 "nonimmediate_operand" "d,m")))]
l<g>b\t%0,%1"
[(set_attr "op_type" "RRE,RXY")])
+; lb, lgb
(define_insn "*extendqi<mode>2"
[(set (match_operand:GPR 0 "register_operand" "=d")
(sign_extend:GPR (match_operand:QI 1 "memory_operand" "m")))]
}
})
+; llhr, llcr, llghr, llgcr, llh, llc, llgh, llgc
(define_insn "*zero_extend<HQI:mode><GPR:mode>2_extimm"
[(set (match_operand:GPR 0 "register_operand" "=d,d")
(zero_extend:GPR (match_operand:HQI 1 "nonimmediate_operand" "d,m")))]
ll<g><hc>\t%0,%1"
[(set_attr "op_type" "RRE,RXY")])
+; llgh, llgc
(define_insn "*zero_extend<HQI:mode><GPR:mode>2"
[(set (match_operand:GPR 0 "register_operand" "=d")
(zero_extend:GPR (match_operand:HQI 1 "memory_operand" "m")))]
DONE;
})
+; cgxbr, cgdbr, cgebr, cfxbr, cfdbr, cfebr
(define_insn "fix_trunc<FPR:mode><GPR:mode>2_ieee"
[(set (match_operand:GPR 0 "register_operand" "=d")
(fix:GPR (match_operand:FPR 1 "register_operand" "f")))
; float(si|di)(tf|df|sf)2 instruction pattern(s).
;
+; cxgbr, cdgbr, cegbr
(define_insn "floatdi<mode>2"
[(set (match_operand:FPR 0 "register_operand" "=f")
(float:FPR (match_operand:DI 1 "register_operand" "d")))]
[(set_attr "op_type" "RRE")
(set_attr "type" "itof" )])
+; cxfbr, cdfbr, cefbr
(define_insn "floatsi<mode>2_ieee"
[(set (match_operand:FPR 0 "register_operand" "=f")
(float:FPR (match_operand:SI 1 "register_operand" "d")))]
; add(di|si)3 instruction pattern(s).
;
+; ar, ahi, alfi, slfi, a, ay, agr, aghi, algfi, slgfi, ag
(define_insn "*add<mode>3"
[(set (match_operand:GPR 0 "register_operand" "=d,d,d,d,d,d")
(plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0,0,0,0")
a<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RI,RIL,RIL,RX<Y>,RXY")])
+; alr, alfi, slfi, al, aly, algr, algfi, slgfi, alg
(define_insn "*add<mode>3_carry1_cc"
[(set (reg CC_REGNUM)
(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0,0,0")
al<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RIL,RIL,RX<Y>,RXY")])
+; alr, al, aly, algr, alg
(define_insn "*add<mode>3_carry1_cconly"
[(set (reg CC_REGNUM)
(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0")
al<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
+; alr, alfi, slfi, al, aly, algr, algfi, slgfi, alg
(define_insn "*add<mode>3_carry2_cc"
[(set (reg CC_REGNUM)
(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0,0,0")
al<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RIL,RIL,RX<Y>,RXY")])
+; alr, al, aly, algr, alg
(define_insn "*add<mode>3_carry2_cconly"
[(set (reg CC_REGNUM)
(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0")
al<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
+; alr, alfi, slfi, al, aly, algr, algfi, slgfi, alg
(define_insn "*add<mode>3_cc"
[(set (reg CC_REGNUM)
(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0,0,0")
al<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RIL,RIL,RX<Y>,RXY")])
+; alr, al, aly, algr, alg
(define_insn "*add<mode>3_cconly"
[(set (reg CC_REGNUM)
(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0")
al<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
+; alr, al, aly, algr, alg
(define_insn "*add<mode>3_cconly2"
[(set (reg CC_REGNUM)
(compare (match_operand:GPR 1 "nonimmediate_operand" "%0,0,0")
al<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
+; ahi, afi, aghi, agfi
(define_insn "*add<mode>3_imm_cc"
[(set (reg CC_REGNUM)
(compare (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "0,0")
"TARGET_HARD_FLOAT"
"")
+; axbr, adbr, aebr, axb, adb, aeb
(define_insn "*add<mode>3"
[(set (match_operand:FPR 0 "register_operand" "=f,f")
(plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
[(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fsimp<mode>")])
+; axbr, adbr, aebr, axb, adb, aeb
(define_insn "*add<mode>3_cc"
[(set (reg CC_REGNUM)
(compare (plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
[(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fsimp<mode>")])
+; axbr, adbr, aebr, axb, adb, aeb
(define_insn "*add<mode>3_cconly"
[(set (reg CC_REGNUM)
(compare (plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
[(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fsimp<mode>")])
+; axr, adr, aer, ax, ad, ae
(define_insn "*add<mode>3_ibm"
[(set (match_operand:FPR 0 "register_operand" "=f,f")
(plus:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
; sub(di|si)3 instruction pattern(s).
;
+; sr, s, sy, sgr, sg
(define_insn "*sub<mode>3"
[(set (match_operand:GPR 0 "register_operand" "=d,d,d")
(minus:GPR (match_operand:GPR 1 "register_operand" "0,0,0")
s<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
+; slr, sl, sly, slgr, slg
(define_insn "*sub<mode>3_borrow_cc"
[(set (reg CC_REGNUM)
(compare (minus:GPR (match_operand:GPR 1 "register_operand" "0,0,0")
sl<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
+; slr, sl, sly, slgr, slg
(define_insn "*sub<mode>3_borrow_cconly"
[(set (reg CC_REGNUM)
(compare (minus:GPR (match_operand:GPR 1 "register_operand" "0,0,0")
sl<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
+; slr, sl, sly, slgr, slg
(define_insn "*sub<mode>3_cc"
[(set (reg CC_REGNUM)
(compare (minus:GPR (match_operand:GPR 1 "register_operand" "0,0,0")
sl<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
+; slr, sl, sly, slgr, slg
(define_insn "*sub<mode>3_cc2"
[(set (reg CC_REGNUM)
(compare (match_operand:GPR 1 "register_operand" "0,0,0")
sl<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
+; slr, sl, sly, slgr, slg
(define_insn "*sub<mode>3_cconly"
[(set (reg CC_REGNUM)
(compare (minus:GPR (match_operand:GPR 1 "register_operand" "0,0,0")
sl<y>\t%0,%2"
[(set_attr "op_type" "RR<E>,RX<Y>,RXY")])
+; slr, sl, sly, slgr, slg
(define_insn "*sub<mode>3_cconly2"
[(set (reg CC_REGNUM)
(compare (match_operand:GPR 1 "register_operand" "0,0,0")
"TARGET_HARD_FLOAT"
"")
+; sxbr, sdbr, sebr, sxb, sdb, seb
(define_insn "*sub<mode>3"
[(set (match_operand:FPR 0 "register_operand" "=f,f")
(minus:FPR (match_operand:FPR 1 "register_operand" "0,0")
[(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fsimp<mode>")])
+; sxbr, sdbr, sebr, sxb, sdb, seb
(define_insn "*sub<mode>3_cc"
[(set (reg CC_REGNUM)
(compare (minus:FPR (match_operand:FPR 1 "nonimmediate_operand" "0,0")
[(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fsimp<mode>")])
+; sxbr, sdbr, sebr, sxb, sdb, seb
(define_insn "*sub<mode>3_cconly"
[(set (reg CC_REGNUM)
(compare (minus:FPR (match_operand:FPR 1 "nonimmediate_operand" "0,0")
[(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fsimp<mode>")])
+; sxr, sdr, ser, sx, sd, se
(define_insn "*sub<mode>3_ibm"
[(set (match_operand:FPR 0 "register_operand" "=f,f")
(minus:FPR (match_operand:FPR 1 "register_operand" "0,0")
; add(di|si)cc instruction pattern(s).
;
+; alcr, alc, alcgr, alcg
(define_insn "*add<mode>3_alc_cc"
[(set (reg CC_REGNUM)
(compare
alc<g>\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
+; alcr, alc, alcgr, alcg
(define_insn "*add<mode>3_alc"
[(set (match_operand:GPR 0 "register_operand" "=d,d")
(plus:GPR (plus:GPR (match_operand:GPR 1 "nonimmediate_operand" "%0,0")
alc<g>\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
+; slbr, slb, slbgr, slbg
(define_insn "*sub<mode>3_slb_cc"
[(set (reg CC_REGNUM)
(compare
slb<g>\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
+; slbr, slb, slbgr, slbg
(define_insn "*sub<mode>3_slb"
[(set (match_operand:GPR 0 "register_operand" "=d,d")
(minus:GPR (minus:GPR (match_operand:GPR 1 "nonimmediate_operand" "0,0")
"TARGET_HARD_FLOAT"
"")
+; mxbr mdbr, meebr, mxb, mxb, meeb
(define_insn "*mul<mode>3"
[(set (match_operand:FPR 0 "register_operand" "=f,f")
(mult:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
[(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fmul<mode>")])
+; mxr, mdr, mer, mx, md, me
(define_insn "*mul<mode>3_ibm"
[(set (match_operand:FPR 0 "register_operand" "=f,f")
(mult:FPR (match_operand:FPR 1 "nonimmediate_operand" "%0,0")
[(set_attr "op_type" "<RRe>,<RXe>")
(set_attr "type" "fmul<mode>")])
+; maxbr, madbr, maebr, maxb, madb, maeb
(define_insn "*fmadd<mode>"
[(set (match_operand:DSF 0 "register_operand" "=f,f")
(plus:DSF (mult:DSF (match_operand:DSF 1 "register_operand" "%f,f")
[(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fmul<mode>")])
+; msxbr, msdbr, msebr, msxb, msdb, mseb
(define_insn "*fmsub<mode>"
[(set (match_operand:DSF 0 "register_operand" "=f,f")
(minus:DSF (mult:DSF (match_operand:DSF 1 "register_operand" "f,f")
"TARGET_HARD_FLOAT"
"")
+; dxbr, ddbr, debr, dxb, ddb, deb
(define_insn "*div<mode>3"
[(set (match_operand:FPR 0 "register_operand" "=f,f")
(div:FPR (match_operand:FPR 1 "register_operand" "0,0")
[(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fdiv<mode>")])
+; dxr, ddr, der, dx, dd, de
(define_insn "*div<mode>3_ibm"
[(set (match_operand:FPR 0 "register_operand" "=f,f")
(div:FPR (match_operand:FPR 1 "register_operand" "0,0")
"lcgfr\t%0,%1"
[(set_attr "op_type" "RRE")])
+; lcr, lcgr
(define_insn "*neg<mode>2_cc"
[(set (reg CC_REGNUM)
(compare (neg:GPR (match_operand:GPR 1 "register_operand" "d"))
"s390_match_ccmode (insn, CCAmode)"
"lc<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")])
-
+
+; lcr, lcgr
(define_insn "*neg<mode>2_cconly"
[(set (reg CC_REGNUM)
(compare (neg:GPR (match_operand:GPR 1 "register_operand" "d"))
"s390_match_ccmode (insn, CCAmode)"
"lc<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")])
-
+
+; lcr, lcgr
(define_insn "*neg<mode>2"
[(set (match_operand:GPR 0 "register_operand" "=d")
(neg:GPR (match_operand:GPR 1 "register_operand" "d")))
"TARGET_HARD_FLOAT"
"")
+; lcxbr, lcdbr, lcebr
(define_insn "*neg<mode>2_cc"
[(set (reg CC_REGNUM)
(compare (neg:FPR (match_operand:FPR 1 "register_operand" "f"))
"lc<xde>br\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "type" "fsimp<mode>")])
-
+
+; lcxbr, lcdbr, lcebr
(define_insn "*neg<mode>2_cconly"
[(set (reg CC_REGNUM)
(compare (neg:FPR (match_operand:FPR 1 "register_operand" "f"))
"lc<xde>br\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "type" "fsimp<mode>")])
-
+
+; lcxbr, lcdbr, lcebr
(define_insn "*neg<mode>2"
[(set (match_operand:FPR 0 "register_operand" "=f")
(neg:FPR (match_operand:FPR 1 "register_operand" "f")))
[(set_attr "op_type" "RRE")
(set_attr "type" "fsimp<mode>")])
+; lcxr, lcdr, lcer
(define_insn "*neg<mode>2_ibm"
[(set (match_operand:FPR 0 "register_operand" "=f")
(neg:FPR (match_operand:FPR 1 "register_operand" "f")))
"lpgfr\t%0,%1"
[(set_attr "op_type" "RRE")])
+; lpr, lpgr
(define_insn "*abs<mode>2_cc"
[(set (reg CC_REGNUM)
(compare (abs:GPR (match_operand:DI 1 "register_operand" "d"))
"s390_match_ccmode (insn, CCAmode)"
"lp<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")])
-
+
+; lpr, lpgr
(define_insn "*abs<mode>2_cconly"
[(set (reg CC_REGNUM)
(compare (abs:GPR (match_operand:GPR 1 "register_operand" "d"))
"s390_match_ccmode (insn, CCAmode)"
"lp<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")])
-
+
+; lpr, lpgr
(define_insn "abs<mode>2"
[(set (match_operand:GPR 0 "register_operand" "=d")
(abs:GPR (match_operand:GPR 1 "register_operand" "d")))
"TARGET_HARD_FLOAT"
"")
+; lpxbr, lpdbr, lpebr
(define_insn "*abs<mode>2_cc"
[(set (reg CC_REGNUM)
(compare (abs:FPR (match_operand:FPR 1 "register_operand" "f"))
"lp<xde>br\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "type" "fsimp<mode>")])
-
+
+; lpxbr, lpdbr, lpebr
(define_insn "*abs<mode>2_cconly"
[(set (reg CC_REGNUM)
(compare (abs:FPR (match_operand:FPR 1 "register_operand" "f"))
"lp<xde>br\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "type" "fsimp<mode>")])
-
+
+; lpxbr, lpdbr, lpebr
(define_insn "*abs<mode>2"
[(set (match_operand:FPR 0 "register_operand" "=f")
(abs:FPR (match_operand:FPR 1 "register_operand" "f")))
[(set_attr "op_type" "RRE")
(set_attr "type" "fsimp<mode>")])
+; lpxr, lpdr, lper
(define_insn "*abs<mode>2_ibm"
[(set (match_operand:FPR 0 "register_operand" "=f")
(abs:FPR (match_operand:FPR 1 "register_operand" "f")))
"lngfr\t%0,%1"
[(set_attr "op_type" "RRE")])
+; lnr, lngr
(define_insn "*negabs<mode>2_cc"
[(set (reg CC_REGNUM)
(compare (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d")))
"s390_match_ccmode (insn, CCAmode)"
"ln<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")])
-
+
+; lnr, lngr
(define_insn "*negabs<mode>2_cconly"
[(set (reg CC_REGNUM)
(compare (neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d")))
"s390_match_ccmode (insn, CCAmode)"
"ln<g>r\t%0,%1"
[(set_attr "op_type" "RR<E>")])
-
+
+; lnr, lngr
(define_insn "*negabs<mode>2"
[(set (match_operand:GPR 0 "register_operand" "=d")
(neg:GPR (abs:GPR (match_operand:GPR 1 "register_operand" "d"))))
; Floating point
;
+; lnxbr, lndbr, lnebr
(define_insn "*negabs<mode>2_cc"
[(set (reg CC_REGNUM)
(compare (neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f")))
"ln<xde>br\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "type" "fsimp<mode>")])
-
+
+; lnxbr, lndbr, lnebr
(define_insn "*negabs<mode>2_cconly"
[(set (reg CC_REGNUM)
(compare (neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f")))
"ln<xde>br\t%0,%1"
[(set_attr "op_type" "RRE")
(set_attr "type" "fsimp<mode>")])
-
+
+; lnxbr, lndbr, lnebr
(define_insn "*negabs<mode>2"
[(set (match_operand:FPR 0 "register_operand" "=f")
(neg:FPR (abs:FPR (match_operand:FPR 1 "register_operand" "f"))))
; sqrt(df|sf)2 instruction pattern(s).
;
+; sqxbr, sqdbr, sqebr, sqxb, sqdb, sqeb
(define_insn "sqrt<mode>2"
[(set (match_operand:FPR 0 "register_operand" "=f,f")
(sqrt:FPR (match_operand:FPR 1 "general_operand" "f,<Rf>")))]
; rotl(di|si)3 instruction pattern(s).
;
+; rll, rllg
(define_insn "rotl<mode>3"
[(set (match_operand:GPR 0 "register_operand" "=d")
(rotate:GPR (match_operand:GPR 1 "register_operand" "d")
[(set_attr "op_type" "RSE")
(set_attr "atype" "reg")])
+; rll, rllg
(define_insn "*rotl<mode>3_and"
[(set (match_operand:GPR 0 "register_operand" "=d")
(rotate:GPR (match_operand:GPR 1 "register_operand" "d")
""
"")
+; sldl, srdl
(define_insn "*<shift>di3_31"
[(set (match_operand:DI 0 "register_operand" "=d")
(SHIFT:DI (match_operand:DI 1 "register_operand" "0")
[(set_attr "op_type" "RS")
(set_attr "atype" "reg")])
+; sll, srl, sllg, srlg
(define_insn "*<shift><mode>3"
[(set (match_operand:GPR 0 "register_operand" "=d")
(SHIFT:GPR (match_operand:GPR 1 "register_operand" "<d0>")
[(set_attr "op_type" "RS<E>")
(set_attr "atype" "reg")])
+; sldl, srdl
(define_insn "*<shift>di3_31_and"
[(set (match_operand:DI 0 "register_operand" "=d")
(SHIFT:DI (match_operand:DI 1 "register_operand" "0")
[(set_attr "op_type" "RS")
(set_attr "atype" "reg")])
+; sll, srl, sllg, srlg
(define_insn "*<shift><mode>3_and"
[(set (match_operand:GPR 0 "register_operand" "=d")
(SHIFT:GPR (match_operand:GPR 1 "register_operand" "<d0>")
[(set_attr "op_type" "RS")
(set_attr "atype" "reg")])
+; sra, srag
(define_insn "*ashr<mode>3_cc"
[(set (reg CC_REGNUM)
(compare (ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
[(set_attr "op_type" "RS<E>")
(set_attr "atype" "reg")])
+; sra, srag
(define_insn "*ashr<mode>3_cconly"
[(set (reg CC_REGNUM)
(compare (ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
[(set_attr "op_type" "RS<E>")
(set_attr "atype" "reg")])
+; sra, srag
(define_insn "*ashr<mode>3"
[(set (match_operand:GPR 0 "register_operand" "=d")
(ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
[(set_attr "op_type" "RS")
(set_attr "atype" "reg")])
+; sra, srag
(define_insn "*ashr<mode>3_cc_and"
[(set (reg CC_REGNUM)
(compare (ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
[(set_attr "op_type" "RS<E>")
(set_attr "atype" "reg")])
+; sra, srag
(define_insn "*ashr<mode>3_cconly_and"
[(set (reg CC_REGNUM)
(compare (ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
[(set_attr "op_type" "RS<E>")
(set_attr "atype" "reg")])
+; sra, srag
(define_insn "*ashr<mode>3_and"
[(set (match_operand:GPR 0 "register_operand" "=d")
(ashiftrt:GPR (match_operand:GPR 1 "register_operand" "<d0>")
s390_compare_emitted = operands[4];
})
+; cds, cdsg
(define_insn "*sync_compare_and_swap<mode>"
[(set (match_operand:DP 0 "register_operand" "=r")
(match_operand:DP 1 "memory_operand" "+Q"))
[(set_attr "op_type" "RS<TE>")
(set_attr "type" "sem")])
+; cs, csg
(define_insn "*sync_compare_and_swap<mode>"
[(set (match_operand:GPR 0 "register_operand" "=r")
(match_operand:GPR 1 "memory_operand" "+Q"))