We can reuse pipe_scissor_state.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4278>
struct pipe_depth_stencil_alpha_state *zsa;
struct compiled_vertex_elements_state *vertex_elements;
struct compiled_shader_state shader_state;
- struct compiled_scissor_state clipping;
+ struct pipe_scissor_state clipping;
/* to simplify the emit process we store pre compiled state objects,
* which got 'compiled' during state change. */
struct compiled_blend_color blend_color;
struct compiled_stencil_ref stencil_ref;
struct compiled_framebuffer_state framebuffer;
- struct compiled_scissor_state scissor;
struct compiled_viewport_state viewport;
unsigned num_fragment_sampler_views;
uint32_t active_sampler_views;
/*00A3C*/ EMIT_STATE(PA_WIDE_LINE_WIDTH1, rasterizer->PA_LINE_WIDTH);
}
if (unlikely(dirty & (ETNA_DIRTY_SCISSOR_CLIP))) {
- /*00C00*/ EMIT_STATE_FIXP(SE_SCISSOR_LEFT, ctx->clipping.SE_SCISSOR_LEFT << 16);
- /*00C04*/ EMIT_STATE_FIXP(SE_SCISSOR_TOP, ctx->clipping.SE_SCISSOR_TOP << 16);
- /*00C08*/ EMIT_STATE_FIXP(SE_SCISSOR_RIGHT, (ctx->clipping.SE_SCISSOR_RIGHT << 16) + ETNA_SE_SCISSOR_MARGIN_RIGHT);
- /*00C0C*/ EMIT_STATE_FIXP(SE_SCISSOR_BOTTOM, (ctx->clipping.SE_SCISSOR_BOTTOM << 16) + ETNA_SE_SCISSOR_MARGIN_BOTTOM);
+ /*00C00*/ EMIT_STATE_FIXP(SE_SCISSOR_LEFT, ctx->clipping.minx << 16);
+ /*00C04*/ EMIT_STATE_FIXP(SE_SCISSOR_TOP, ctx->clipping.miny << 16);
+ /*00C08*/ EMIT_STATE_FIXP(SE_SCISSOR_RIGHT, (ctx->clipping.maxx << 16) + ETNA_SE_SCISSOR_MARGIN_RIGHT);
+ /*00C0C*/ EMIT_STATE_FIXP(SE_SCISSOR_BOTTOM, (ctx->clipping.maxy << 16) + ETNA_SE_SCISSOR_MARGIN_BOTTOM);
}
if (unlikely(dirty & (ETNA_DIRTY_RASTERIZER))) {
struct etna_rasterizer_state *rasterizer = etna_rasterizer_state(ctx->rasterizer);
/*00C18*/ EMIT_STATE(SE_CONFIG, rasterizer->SE_CONFIG);
}
if (unlikely(dirty & (ETNA_DIRTY_SCISSOR_CLIP))) {
- /*00C20*/ EMIT_STATE_FIXP(SE_CLIP_RIGHT, (ctx->clipping.SE_SCISSOR_RIGHT << 16) + ETNA_SE_CLIP_MARGIN_RIGHT);
- /*00C24*/ EMIT_STATE_FIXP(SE_CLIP_BOTTOM, (ctx->clipping.SE_SCISSOR_BOTTOM << 16) + ETNA_SE_CLIP_MARGIN_BOTTOM);
+ /*00C20*/ EMIT_STATE_FIXP(SE_CLIP_RIGHT, (ctx->clipping.maxx << 16) + ETNA_SE_CLIP_MARGIN_RIGHT);
+ /*00C24*/ EMIT_STATE_FIXP(SE_CLIP_BOTTOM, (ctx->clipping.maxy << 16) + ETNA_SE_CLIP_MARGIN_BOTTOM);
}
if (unlikely(dirty & (ETNA_DIRTY_SHADER))) {
/*00E00*/ EMIT_STATE(RA_CONTROL, ctx->shader_state.RA_CONTROL);
uint32_t PE_STENCIL_CONFIG_EXT[2];
};
-/* Compiled pipe_scissor_state */
-struct compiled_scissor_state {
- uint32_t SE_SCISSOR_LEFT;
- uint32_t SE_SCISSOR_TOP;
- uint32_t SE_SCISSOR_RIGHT;
- uint32_t SE_SCISSOR_BOTTOM;
-};
-
/* Compiled pipe_viewport_state */
struct compiled_viewport_state {
uint32_t PA_VIEWPORT_SCALE_X;
unsigned num_scissors, const struct pipe_scissor_state *ss)
{
struct etna_context *ctx = etna_context(pctx);
- struct compiled_scissor_state *cs = &ctx->scissor;
assert(ss->minx <= ss->maxx);
assert(ss->miny <= ss->maxy);
- /* note that this state is only used when rasterizer_state->scissor is on */
ctx->scissor_s = *ss;
- cs->SE_SCISSOR_LEFT = ss->minx;
- cs->SE_SCISSOR_TOP = ss->miny;
- cs->SE_SCISSOR_RIGHT = ss->maxx;
- cs->SE_SCISSOR_BOTTOM = ss->maxy;
-
ctx->dirty |= ETNA_DIRTY_SCISSOR;
}
/* clip against scissor */
if (rasterizer->scissor) {
- scissor_left = MAX2(ctx->scissor.SE_SCISSOR_LEFT, scissor_left);
- scissor_top = MAX2(ctx->scissor.SE_SCISSOR_TOP, scissor_top);
- scissor_right = MIN2(ctx->scissor.SE_SCISSOR_RIGHT, scissor_right);
- scissor_bottom = MIN2(ctx->scissor.SE_SCISSOR_BOTTOM, scissor_bottom);
+ scissor_left = MAX2(ctx->scissor_s.minx, scissor_left);
+ scissor_top = MAX2(ctx->scissor_s.miny, scissor_top);
+ scissor_right = MIN2(ctx->scissor_s.maxx, scissor_right);
+ scissor_bottom = MIN2(ctx->scissor_s.maxy, scissor_bottom);
}
- ctx->clipping.SE_SCISSOR_LEFT = scissor_left;
- ctx->clipping.SE_SCISSOR_TOP = scissor_top;
- ctx->clipping.SE_SCISSOR_RIGHT = scissor_right;
- ctx->clipping.SE_SCISSOR_BOTTOM = scissor_bottom;
+ ctx->clipping.minx = scissor_left;
+ ctx->clipping.miny = scissor_top;
+ ctx->clipping.maxx = scissor_right;
+ ctx->clipping.maxy = scissor_bottom;
ctx->dirty |= ETNA_DIRTY_SCISSOR_CLIP;