Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture feasibility

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+Subject: Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture
+ feasibility
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+Lauri Kasanen schreef op ma 16-03-2020 om 11:27 [+0200]:
+> On Mon, 16 Mar 2020 09:53:38 +0100Staf Verhaegen <staf@fibraservi.eu> wro=
+te:
+> > Lauri Kasanen schreef op ma 16-03-2020 om 09:14 [+0200]:
+> > > 486 and 586 patents had expired years ago, and we had Chinese 1 GHzim=
+plementations of those (vortex86). Now they have 686 models, so Itake penti=
+um pro patents are also up for use.
+> >=20
+> > I think these were because Via had cross-patent license agreement with =
+Intel.
+>=20
+> DMP is not related to VIA. Via's C and Nano lines happened muchearlier, w=
+ith the licensing.
+
+I stand corrected; it was SiS which did the first Vortex86 and sold that li=
+ne to DM&P.
+
+Staf.
+
+
+
+
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