-# RFC ls014
+# RFC ls014 Advanced Scalar Bitmanipulation
**URLs**:
* <https://libre-soc.org/openpower/sv/rfc/ls014/>
* <https://git.openpower.foundation/isa/PowerISA/issues/TODO>
-* <https://bugs.libre-soc.org/show_bug.cgi?id=1057>
+* <https://bugs.libre-soc.org/show_bug.cgi?id=1065>
**Severity**: Major
**Summary**
```
- Instructions added
+ Instructions added: bmask, grevlut, grevluti
```
**Submitter**: Luke Leighton (Libre-SOC)
**Keywords**:
```
- TODO
+ LUTs, Bitmanipulation, GPR
```
**Motivation**
-TODO
+Scalar Bitmanipulation in other high-end ISAs have had BMI subsets for over a decade.
+Their use and benefit is well-understood and compiler integration well-established.
+`bmask` brings *twenty four* BMI instructions to the Power ISA.
+
+`grevlut` on the other hand is highly experimental and extremely powerful. Normally
+only `grev` (Generalised Reverse) and occasionally `gor` are added to a Bitmanip-strong
+ISA: grevlut utilises LUTs and inversion to add 512 Generalised Reverse instructions.
+Desirable savings in general binary size are achieved.
**Notes and Observations**:
-1. TODO
+1. bmask is a synthesis and generalisation of every "TBM" instruction with additional
+ options not found in any other ISA BMI group.
+2. grevluti as a 32-bit Defined Word is capable of generating over a thousand useful
+ regular-patterned 64-bit "magic constants" that otherwise require either a Load
+ or require several instructions to synthesise
+3. word halfword byte nibble 2-bit 1-bit reversal at multiple levels are all achieved
+ with grevlut. Some of these instructions were explicitly added in Power ISA v3.1
+ but grevlut is akin to xxeval.
+4. grevlut is expensive in hardware (estimated 20,000 gates)
**Changes**
Add the following entries to:
* the Appendices of Book I
-* Book I 3.3.9 Fixed-Point Arithmetic Instructions
-* Book I 4.6.6.1 Floating-Point Elementary Arithmetic Instructions
+* Book I 3.3.9 Fixed-Point Logical Instructions
* Book I 1.6.1 and 1.6.2
----------