ubsan: m10300: shift exponent -4

	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	and XRREG value earlier to avoid a shift with negative exponent.
	* m10200-dis.c (disassemble): Similarly.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index eb67b55db7b020840e51ff60bc065e99be603dce..7c5f16bbc6b3910480e90f038c895123e18c3449 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2020-01-10  Alan Modra  <amodra@gmail.com>
+
+       * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
+       and XRREG value earlier to avoid a shift with negative exponent.
+       * m10200-dis.c (disassemble): Similarly.
+
 2020-01-09  Nick Clifton  <nickc@redhat.com>
 
        PR 25224

diff --git a/opcodes/m10200-dis.c b/opcodes/m10200-dis.c
index 4f5006a4e9441d17c0c1e1076e28699d4414f784..537ce46ae02d736652c75ca2055c3925469524ee 100644 (file)
--- a/opcodes/m10200-dis.c
+++ b/opcodes/m10200-dis.c
@@ -83,16 +83,18 @@ disassemble (bfd_vma memaddr,
 
              operand = &mn10200_operands[*opindex_ptr];
 
-             if ((operand->flags & MN10200_OPERAND_EXTENDED) != 0)
+             if ((operand->flags & MN10200_OPERAND_DREG) != 0
+                 || (operand->flags & MN10200_OPERAND_AREG) != 0)
+               value = ((insn >> (operand->shift + extra_shift))
+                        & ((1 << operand->bits) - 1));
+             else if ((operand->flags & MN10200_OPERAND_EXTENDED) != 0)
                {
                  value = (insn & 0xffff) << 8;
                  value |= extension;
                }
              else
-               {
-                 value = ((insn >> (operand->shift))
-                          & ((1L << operand->bits) - 1L));
-               }
+               value = ((insn >> (operand->shift))
+                        & ((1L << operand->bits) - 1L));
 
              if ((operand->flags & MN10200_OPERAND_SIGNED) != 0)
                value = ((long)(value << (32 - operand->bits))
@@ -106,18 +108,10 @@ disassemble (bfd_vma memaddr,
              nocomma = 0;
 
              if ((operand->flags & MN10200_OPERAND_DREG) != 0)
-               {
-                 value = ((insn >> (operand->shift + extra_shift))
-                          & ((1 << operand->bits) - 1));
-                 (*info->fprintf_func) (info->stream, "d%ld", value);
-               }
+               (*info->fprintf_func) (info->stream, "d%ld", value);
 
              else if ((operand->flags & MN10200_OPERAND_AREG) != 0)
-               {
-                 value = ((insn >> (operand->shift + extra_shift))
-                          & ((1 << operand->bits) - 1));
-                 (*info->fprintf_func) (info->stream, "a%ld", value);
-               }
+               (*info->fprintf_func) (info->stream, "a%ld", value);
 
              else if ((operand->flags & MN10200_OPERAND_PSW) != 0)
                (*info->fprintf_func) (info->stream, "psw");

diff --git a/opcodes/m10300-dis.c b/opcodes/m10300-dis.c
index 2362518b6234df018c5ee404ab0542399468ecc3..00210c25cd359a67c3316d72a832fbe360efbc92 100644 (file)
--- a/opcodes/m10300-dis.c
+++ b/opcodes/m10300-dis.c
@@ -318,7 +318,13 @@ disassemble (bfd_vma memaddr,
              if ((operand->flags & MN10300_OPERAND_PLUS) != 0)
                nocomma = 1;
 
-             if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
+             if ((operand->flags & MN10300_OPERAND_DREG) != 0
+                 || (operand->flags & MN10300_OPERAND_AREG) != 0
+                 || (operand->flags & MN10300_OPERAND_RREG) != 0
+                 || (operand->flags & MN10300_OPERAND_XRREG) != 0)
+               value = ((insn >> (operand->shift + extra_shift))
+                        & ((1 << operand->bits) - 1));
+             else if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
                {
                  unsigned long temp;
 
@@ -410,18 +416,10 @@ disassemble (bfd_vma memaddr,
              nocomma = 0;
 
              if ((operand->flags & MN10300_OPERAND_DREG) != 0)
-               {
-                 value = ((insn >> (operand->shift + extra_shift))
-                          & ((1 << operand->bits) - 1));
-                 (*info->fprintf_func) (info->stream, "d%d", (int) value);
-               }
+               (*info->fprintf_func) (info->stream, "d%d", (int) value);
 
              else if ((operand->flags & MN10300_OPERAND_AREG) != 0)
-               {
-                 value = ((insn >> (operand->shift + extra_shift))
-                          & ((1 << operand->bits) - 1));
-                 (*info->fprintf_func) (info->stream, "a%d", (int) value);
-               }
+               (*info->fprintf_func) (info->stream, "a%d", (int) value);
 
              else if ((operand->flags & MN10300_OPERAND_SP) != 0)
                (*info->fprintf_func) (info->stream, "sp");
@@ -434,8 +432,6 @@ disassemble (bfd_vma memaddr,
 
              else if ((operand->flags & MN10300_OPERAND_RREG) != 0)
                {
-                 value = ((insn >> (operand->shift + extra_shift))
-                          & ((1 << operand->bits) - 1));
                  if (value < 8)
                    (*info->fprintf_func) (info->stream, "r%d", (int) value);
                  else if (value < 12)
@@ -446,8 +442,6 @@ disassemble (bfd_vma memaddr,
 
              else if ((operand->flags & MN10300_OPERAND_XRREG) != 0)
                {
-                 value = ((insn >> (operand->shift + extra_shift))
-                          & ((1 << operand->bits) - 1));
                  if (value == 0)
                    (*info->fprintf_func) (info->stream, "sp");
                  else